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SDL renderer improvements and fixes and added SDL OpenGL option;

Browse Source 
Various performance improvements;
Fixed USB UHCI HCHalt;
Cirrus Logic CL-GD 5422/24 fixes and removed them from the Dev branch;
The Storage controllers sections of Settings now has its own corresponding section of the configuration file;
Fixed the AT clock divisors for some Pentium OverDrive CPU's;
Added the ACPI RTC status (no ACPI RTC alarm event yet).
This commit is contained in:
OBattler
2020-11-26 18:20:24 +01:00
parent 21d6f2e9f1
commit 6e233f4ac8
53 changed files with 618 additions and 279 deletions
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2
src/video/vid_cga.c
View File

@@ -123,7 +123,7 @@ cga_waitstates(void *p)
int ws;
ws = ws_array[cycles & 0xf];
sub_cycles(ws);
cycles -= ws;
}

24
src/video/vid_cl54xx.c
View File

@@ -42,11 +42,7 @@
#define BIOS_GD5402_PATH L"roms/video/cirruslogic/avga2.rom"
#define BIOS_GD5402_ONBOARD_PATH L"roms/machines/cbm_sl386sx25/Commodore386SX-25_AVGA2.bin"
#define BIOS_GD5420_PATH L"roms/video/cirruslogic/5420.vbi"
#if defined(DEV_BRANCH) && defined(USE_CL5422)
#define BIOS_GD5422_PATH L"roms/video/cirruslogic/cl5422.bin"
#endif
#define BIOS_GD5426_PATH L"roms/video/cirruslogic/Diamond SpeedStar PRO VLB v3.04.bin"
#define BIOS_GD5428_ISA_PATH L"roms/video/cirruslogic/5428.bin"
#define BIOS_GD5428_PATH L"roms/video/cirruslogic/vlbusjapan.BIN"
@@ -535,6 +531,8 @@ gd54xx_out(uint16_t addr, uint8_t val, void *p)
svga->adv_flags = FLAG_EXTRA_BANKS;
if (svga->gdcreg[0xb] & 0x02)
svga->adv_flags |= FLAG_ADDR_BY8;
if (svga->gdcreg[0xb] & 0x04)
svga->adv_flags |= FLAG_EXT_WRITE;
if (svga->gdcreg[0xb] & 0x08)
svga->adv_flags |= FLAG_LATCH8;
gd54xx_recalc_banking(gd54xx);
@@ -1447,6 +1445,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
case 4:
if (svga->gdcreg[0xb] & 0x10) {
addr <<= 2;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
if (val & svga->seqregs[2] & (0x80 >> i)) {
@@ -1456,6 +1455,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
}
} else {
addr <<= 1;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
if (val & svga->seqregs[2] & (0x80 >> i))
@@ -1467,6 +1467,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
case 5:
if (svga->gdcreg[0xb] & 0x10) {
addr <<= 2;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
j = (0x80 >> i);
@@ -1479,6 +1480,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
}
} else {
addr <<= 1;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
j = (0x80 >> i);
@@ -1602,7 +1604,7 @@ gd54xx_readw_linear(uint32_t addr, void *p)
temp |= (svga_readb_linear(addr, svga) << 8);
if (svga->fast)
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
return temp;
case 3:
@@ -1653,7 +1655,7 @@ gd54xx_readl_linear(uint32_t addr, void *p)
temp |= (svga_readb_linear(addr + 2, svga) << 24);
if (svga->fast)
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
return temp;
case 2:
@@ -1663,7 +1665,7 @@ gd54xx_readl_linear(uint32_t addr, void *p)
temp |= (svga_readb_linear(addr, svga) << 24);
if (svga->fast)
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
return temp;
case 3:
@@ -1852,7 +1854,7 @@ gd54xx_writew_linear(uint32_t addr, uint16_t val, void *p)
svga_writeb_linear(addr, val >> 8, svga);
if (svga->fast)
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
case 3:
return;
}
@@ -3072,12 +3074,10 @@ static void
romfn = BIOS_GD5420_PATH;
break;
#if defined(DEV_BRANCH) && defined(USE_CL5422)
case CIRRUS_ID_CLGD5422:
case CIRRUS_ID_CLGD5424:
romfn = BIOS_GD5422_PATH;
break;
#endif
case CIRRUS_ID_CLGD5426:
if (info->local & 0x200)
@@ -3295,13 +3295,11 @@ gd5420_available(void)
return rom_present(BIOS_GD5420_PATH);
}
#if defined(DEV_BRANCH) && defined(USE_CL5422)
static int
gd5422_available(void)
{
return rom_present(BIOS_GD5422_PATH);
}
#endif
static int
gd5426_available(void)
@@ -3589,7 +3587,6 @@ const device_t gd5420_isa_device =
gd5422_config,
};
#if defined(DEV_BRANCH) && defined(USE_CL5422)
const device_t gd5422_isa_device = {
"Cirrus Logic GD-5422",
DEVICE_AT | DEVICE_ISA,
@@ -3613,7 +3610,6 @@ const device_t gd5424_vlb_device = {
gd54xx_force_redraw,
gd5422_config,
};
#endif
const device_t gd5426_vlb_device =
{

4
src/video/vid_colorplus.c
View File

@@ -100,7 +100,7 @@ void colorplus_write(uint32_t addr, uint8_t val, void *p)
colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff];
}
egawrites++;
sub_cycles(4);
cycles -= 4;
}
uint8_t colorplus_read(uint32_t addr, void *p)
@@ -117,7 +117,7 @@ uint8_t colorplus_read(uint32_t addr, void *p)
{
addr &= 0x3FFF;
}
sub_cycles(4);
cycles -= 4;
if (colorplus->cga.snow_enabled)
{
int offset = ((timer_get_remaining_u64(&colorplus->cga.timer) / CGACONST) * 2) & 0xfc;

4
src/video/vid_ega.c
View File

@@ -732,7 +732,7 @@ ega_write(uint32_t addr, uint8_t val, void *p)
int writemask2 = ega->writemask;
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
if (addr >= 0xB0000) addr &= 0x7fff;
else addr &= 0xffff;
@@ -859,7 +859,7 @@ ega_read(uint32_t addr, void *p)
int readplane = ega->readplane;
egareads++;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
if (addr >= 0xb0000) addr &= 0x7fff;
else addr &= 0xffff;

2
src/video/vid_genius.c
View File

@@ -253,7 +253,7 @@ genius_waitstates(void)
int ws;
ws = ws_array[cycles & 0xf];
sub_cycles(ws);
cycles -= ws;
}

2
src/video/vid_hercules.c
View File

@@ -212,7 +212,7 @@ hercules_waitstates(void *p)
int ws;
ws = ws_array[cycles & 0xf];
sub_cycles(ws);
cycles -= ws;
}

4
src/video/vid_ht216.c
View File

@@ -729,7 +729,7 @@ ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val)
svga_t *svga = &ht216->svga;
uint8_t bit_mask = 0, rop_select = 0;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
egawrites++;
@@ -911,7 +911,7 @@ ht216_read_common(ht216_t *ht216, uint32_t addr)
addr &= 0xfffff;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
egareads++;

12
src/video/vid_mga.c
View File

@@ -2132,7 +2132,7 @@ mystique_readb_linear(uint32_t addr, void *p)
egareads++;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2149,7 +2149,7 @@ mystique_readw_linear(uint32_t addr, void *p)
egareads += 2;
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2166,7 +2166,7 @@ mystique_readl_linear(uint32_t addr, void *p)
egareads += 4;
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2183,7 +2183,7 @@ mystique_writeb_linear(uint32_t addr, uint8_t val, void *p)
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2201,7 +2201,7 @@ mystique_writew_linear(uint32_t addr, uint16_t val, void *p)
egawrites += 2;
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2219,7 +2219,7 @@ mystique_writel_linear(uint32_t addr, uint32_t val, void *p)
egawrites += 4;
sub_cycles(video_timing_write_l);
cycles -= video_timing_write_l;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)

4
src/video/vid_sigma.c
View File

@@ -344,7 +344,7 @@ sigma_write(uint32_t addr, uint8_t val, void *p)
sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)] = val;
egawrites++;
sub_cycles(4);
cycles -= 4;
}
@@ -353,7 +353,7 @@ sigma_read(uint32_t addr, void *p)
{
sigma_t *sigma = (sigma_t *)p;
sub_cycles(4);
cycles -= 4;
egareads++;
return sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)];
}

82
src/video/vid_svga.c
View File

@@ -1015,7 +1015,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
if (!linear) {
addr = svga_decode_addr(svga, addr, 1);
@@ -1057,14 +1057,23 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
if (svga->adv_flags & FLAG_LATCH8)
count = 8;
/* Undocumented Cirrus Logic behavior: The datasheet says that, with EXT_WRITE and FLAG_ADDR_BY8, the write mask only
changes meaning in write modes 4 and 5, as well as write mode 1. In reality, however, all other write modes are also
affected, as proven by the Windows 3.1 CL-GD 5422/4 drivers in 8bpp modes. */
switch (svga->writemode) {
case 0:
if (svga->gdcreg[3] & 7)
val = svga_rotate[svga->gdcreg[3] & 7][val];
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
// if (svga->gdcreg[3] & 7)
// val = svga_rotate[svga->gdcreg[3] & 7][val];
if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) {
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = val;
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = val;
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = val;
}
}
return;
} else {
@@ -1078,8 +1087,13 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
break;
case 1:
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = svga->latch.b[i];
}
}
return;
case 2:
@@ -1095,8 +1109,9 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
}
break;
case 3:
if (svga->gdcreg[3] & 7)
val = svga_rotate[svga->gdcreg[3] & 7][val];
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
// if (svga->gdcreg[3] & 7)
// val = svga_rotate[svga->gdcreg[3] & 7][val];
wm = svga->gdcreg[8];
svga->gdcreg[8] &= val;
@@ -1114,26 +1129,46 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
switch (svga->gdcreg[3] & 0x18) {
case 0x00: /* Set */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
}
}
break;
case 0x08: /* AND */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
}
}
break;
case 0x10: /* OR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
}
}
break;
case 0x18: /* XOR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
}
}
break;
}
@@ -1156,7 +1191,7 @@ svga_read_common(uint32_t addr, uint8_t linear, void *p)
if (svga->adv_flags & FLAG_ADDR_BY8)
readplane = svga->gdcreg[4] & 7;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
egareads++;
@@ -1182,6 +1217,9 @@ svga_read_common(uint32_t addr, uint8_t linear, void *p)
addr = svga->translate_address(addr, p);
if (addr >= svga->vram_max)
return 0xff;
latch_addr = (addr & svga->vram_mask) & ~3;
for (i = 0; i < count; i++)
svga->latch.b[i] = svga->vram[latch_addr | i];
return svga->vram[addr & svga->vram_mask];
} else if (svga->chain2_read) {
readplane = (readplane & 2) | (addr & 1);
@@ -1381,7 +1419,7 @@ svga_writew_common(uint32_t addr, uint16_t val, uint8_t linear, void *p)
egawrites += 2;
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
if (!linear) {
addr = svga_decode_addr(svga, addr, 1);
@@ -1442,7 +1480,7 @@ svga_writel_common(uint32_t addr, uint32_t val, uint8_t linear, void *p)
egawrites += 4;
sub_cycles(video_timing_write_l);
cycles -= video_timing_write_l;
if (!linear) {
addr = svga_decode_addr(svga, addr, 1);
@@ -1526,7 +1564,7 @@ svga_readw_common(uint32_t addr, uint8_t linear, void *p)
egareads += 2;
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
if (!linear) {
addr = svga_decode_addr(svga, addr, 0);
@@ -1579,7 +1617,7 @@ svga_readl_common(uint32_t addr, uint8_t linear, void *p)
egareads += 4;
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
if (!linear) {
addr = svga_decode_addr(svga, addr, 0);

4
src/video/vid_table.c
View File

@@ -71,9 +71,7 @@ video_cards[] = {
{ "cl_gd5401_isa", &gd5401_isa_device },
{ "cl_gd5402_isa", &gd5402_isa_device },
{ "cl_gd5420_isa", &gd5420_isa_device },
#if defined(DEV_BRANCH) && defined(USE_CL5422)
{ "cl_gd5422_isa", &gd5422_isa_device },
#endif
{ "cl_gd5428_isa", &gd5428_isa_device },
{ "cl_gd5429_isa", &gd5429_isa_device },
{ "cl_gd5434_isa", &gd5434_isa_device },
@@ -154,9 +152,7 @@ video_cards[] = {
{ "voodoo3_3k_pci", &voodoo_3_3000_device },
{ "mach64gx_vlb", &mach64gx_vlb_device },
{ "et4000w32p_vlb", &et4000w32p_cardex_vlb_device },
#if defined(DEV_BRANCH) && defined(USE_CL5422)
{ "cl_gd5424_vlb", &gd5424_vlb_device },
#endif
{ "cl_gd5428_vlb", &gd5428_vlb_device },
{ "cl_gd5429_vlb", &gd5429_vlb_device },
{ "cl_gd5434_vlb", &gd5434_vlb_device },

6
src/video/vid_tgui9440.c
View File

@@ -798,7 +798,7 @@ static uint8_t tgui_ext_linear_read(uint32_t addr, void *p)
tgui_t *tgui = (tgui_t *)svga->p;
int c;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -829,7 +829,7 @@ static void tgui_ext_linear_write(uint32_t addr, uint8_t val, void *p)
uint8_t bg[2] = {tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2]};
uint8_t mask = tgui->ext_gdc_regs[7];
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -898,7 +898,7 @@ static void tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *p)
uint8_t bg[2] = {tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2]};
uint16_t mask = (tgui->ext_gdc_regs[7] << 8) | tgui->ext_gdc_regs[8];
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)

10
src/video/vid_voodoo.c
View File

@@ -151,7 +151,7 @@ static uint16_t voodoo_readw(uint32_t addr, void *p)
addr &= 0xffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/
{
@@ -190,7 +190,7 @@ static uint32_t voodoo_readl(uint32_t addr, void *p)
voodoo->rd_count++;
addr &= 0xffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
if (addr & 0x800000) /*Texture*/
{
@@ -403,7 +403,7 @@ static void voodoo_writew(uint32_t addr, uint16_t val, void *p)
voodoo->wr_count++;
addr &= 0xffffff;
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/
voodoo_queue_command(voodoo, addr | FIFO_WRITEW_FB, val);
@@ -418,9 +418,9 @@ static void voodoo_writel(uint32_t addr, uint32_t val, void *p)
addr &= 0xffffff;
if (addr == voodoo->last_write_addr+4)
sub_cycles(voodoo->burst_time);
cycles -= voodoo->burst_time;
else
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
voodoo->last_write_addr = addr;
if (addr & 0x800000) /*Texture*/

36
src/video/vid_voodoo_banshee.c
View File

@@ -835,7 +835,7 @@ static uint32_t banshee_ext_inl(uint16_t addr, void *p)
svga_t *svga = &banshee->svga;
uint32_t ret = 0xffffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
switch (addr & 0xff)
{
@@ -1026,7 +1026,7 @@ static uint32_t banshee_reg_readl(uint32_t addr, void *p)
voodoo_t *voodoo = banshee->voodoo;
uint32_t ret = 0xffffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
switch (addr & 0x1f00000)
{
@@ -1178,7 +1178,7 @@ static void banshee_reg_writew(uint32_t addr, uint16_t val, void *p)
banshee_t *banshee = (banshee_t *)p;
voodoo_t *voodoo = banshee->voodoo;
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
// banshee_log("banshee_reg_writew: addr=%08x val=%04x\n", addr, val);
switch (addr & 0x1f00000)
@@ -1253,9 +1253,9 @@ static void banshee_reg_writel(uint32_t addr, uint32_t val, void *p)
voodoo_t *voodoo = banshee->voodoo;
if (addr == voodoo->last_write_addr+4)
sub_cycles(voodoo->burst_time);
cycles -= voodoo->burst_time;
else
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
voodoo->last_write_addr = addr;
// banshee_log("banshee_reg_writel: addr=%08x val=%08x\n", addr, val);
@@ -1351,7 +1351,7 @@ static uint8_t banshee_read_linear(uint32_t addr, void *p)
voodoo_t *voodoo = banshee->voodoo;
svga_t *svga = &banshee->svga;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
@@ -1369,7 +1369,7 @@ static uint8_t banshee_read_linear(uint32_t addr, void *p)
return 0xff;
egareads++;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1385,8 +1385,7 @@ static uint16_t banshee_read_linear_w(uint32_t addr, void *p)
if (addr & 1)
return banshee_read_linear(addr, p) | (banshee_read_linear(addr+1, p) << 8);
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
{
@@ -1403,7 +1402,7 @@ static uint16_t banshee_read_linear_w(uint32_t addr, void *p)
return 0xff;
egareads++;
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1419,7 +1418,7 @@ static uint32_t banshee_read_linear_l(uint32_t addr, void *p)
if (addr & 3)
return banshee_read_linear_w(addr, p) | (banshee_read_linear_w(addr+2, p) << 16);
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
@@ -1437,7 +1436,7 @@ static uint32_t banshee_read_linear_l(uint32_t addr, void *p)
return 0xff;
egareads++;
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1450,7 +1449,7 @@ static void banshee_write_linear(uint32_t addr, uint8_t val, void *p)
voodoo_t *voodoo = banshee->voodoo;
svga_t *svga = &banshee->svga;
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
addr &= svga->decode_mask;
@@ -1470,7 +1469,7 @@ static void banshee_write_linear(uint32_t addr, uint8_t val, void *p)
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
svga->changedvram[addr >> 12] = changeframecount;
svga->vram[addr & svga->vram_mask] = val;
@@ -1489,8 +1488,7 @@ static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p)
return;
}
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
@@ -1509,7 +1507,7 @@ static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p)
egawrites++;
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
svga->changedvram[addr >> 12] = changeframecount;
*(uint16_t *)&svga->vram[addr & svga->vram_mask] = val;
@@ -1533,7 +1531,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
timing = voodoo->burst_time;
else
timing = voodoo->write_time;
sub_cycles(timing);
cycles -= timing;
voodoo->last_write_addr = addr;
// /*if (val) */banshee_log("write_linear_l: addr=%08x val=%08x %08x\n", addr, val, voodoo->tile_base);
@@ -1555,7 +1553,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
egawrites += 4;
sub_cycles(video_timing_write_l);
cycles -= video_timing_write_l;
svga->changedvram[addr >> 12] = changeframecount;
*(uint32_t *)&svga->vram[addr & svga->vram_mask] = val;

18
src/video/video.c
View File

@@ -336,7 +336,7 @@ static png_infop info_ptr;
static void
video_take_screenshot(const wchar_t *fn, int startx, int starty, int w, int h)
video_take_screenshot(const wchar_t *fn, int startx, int starty, int y1, int y2, int w, int h)
{
int i, x, y;
png_bytep *b_rgb = NULL;
@@ -382,7 +382,7 @@ video_take_screenshot(const wchar_t *fn, int startx, int starty, int w, int h)
for (y = 0; y < h; ++y) {
b_rgb[y] = (png_byte *) malloc(png_get_rowbytes(png_ptr, info_ptr));
for (x = 0; x < w; ++x) {
temp = render_buffer->line[y + starty][x + startx];
temp = render_buffer->dat[(y * w) + x];
b_rgb[y][(x) * 3 + 0] = (temp >> 16) & 0xff;
b_rgb[y][(x) * 3 + 1] = (temp >> 8) & 0xff;
@@ -407,7 +407,7 @@ video_take_screenshot(const wchar_t *fn, int startx, int starty, int w, int h)
static void
video_screenshot(int x, int y, int w, int h)
video_screenshot(int x, int y, int y1, int y2, int w, int h)
{
wchar_t path[1024], fn[128];
@@ -426,7 +426,7 @@ video_screenshot(int x, int y, int w, int h)
video_log("taking screenshot to: %S\n", path);
video_take_screenshot((const wchar_t *) path, x, y, w, h);
video_take_screenshot((const wchar_t *) path, x, y, y1, y2, w, h);
png_destroy_write_struct(&png_ptr, &info_ptr);
}
@@ -449,20 +449,20 @@ video_blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
{
int yy;
if ((w > 0) && (h > 0)) {
for (yy = 0; yy < h; yy++) {
if (y2 > 0) {
for (yy = y1; yy < y2; yy++) {
if (((y + yy) >= 0) && ((y + yy) < buffer32->h)) {
if (video_grayscale || invert_display)
video_transform_copy(&(render_buffer->line[y + yy][x]), &(buffer32->line[y + yy][x]), w);
video_transform_copy(&(render_buffer->dat)[yy * w], &(buffer32->line[y + yy][x]), w);
else
memcpy(&(render_buffer->line[y + yy][x]), &(buffer32->line[y + yy][x]), w << 2);
memcpy(&(render_buffer->dat)[yy * w], &(buffer32->line[y + yy][x]), w << 2);
}
}
}
if (screenshots) {
if (render_buffer != NULL)
video_screenshot(x, y, w, h);
video_screenshot(x, y, y1, y2, w, h);
screenshots--;
video_log("screenshot taken, %i left\n", screenshots);
}