Pretty much all timer counters are now 32-bit again;
Fixed FDI stream parameters passed to the 86F handler, FDI stream images now read correctly again; The National Semiconductors PC87306 SuperI/O chip now supports enhanced FDC mode.
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@@ -251,6 +251,7 @@ process_value:
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break;
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case 9:
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// pclog("Setting DENSEL polarity to: %i (before: %i)\n", (val & 0x40 ? 1 : 0), fdc_get_densel_polarity());
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fdc_update_enh_mode((val & 4) ? 1 : 0);
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fdc_update_densel_polarity((val & 0x40) ? 1 : 0);
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break;
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case 0xF:
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@@ -309,6 +310,7 @@ void pc87306_init()
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{
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pc87306_regs[0] = 0xF;
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pc87306_regs[1] = 0x11;
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pc87306_regs[3] = 2;
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pc87306_regs[5] = 0xD;
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pc87306_regs[8] = 0x70;
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pc87306_regs[9] = 0xFF;
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@@ -321,6 +323,7 @@ void pc87306_init()
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1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5"
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*/
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fdc_update_is_nsc(1);
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fdc_update_enh_mode(0);
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fdc_update_densel_polarity(1);
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fdc_update_max_track(85);
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fdd_swap = 0;
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