Some Cyrix MII table/ID fixes and added some Cyrix CPU blocking for the NuPRO 592 and the P5MMS98.
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@@ -384,6 +384,14 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
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if (cpu_override)
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if (cpu_override)
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return 1;
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return 1;
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/* Cyrix 6x86MX on the NuPRO 592. */
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if (((cpu_s->cyrix_id & 0xff00) == 0x0400) && (strstr(machine_s->internal_name, "nupro") != NULL))
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return 0;
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/* Cyrix 6x86MX or MII on the P5MMS98. */
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if ((cpu_s->cpu_type == CPU_Cx6x86MX) && (strstr(machine_s->internal_name, "p5mms98") != NULL))
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return 0;
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/* Check CPU blocklist. */
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/* Check CPU blocklist. */
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if (machine_s->cpu.block) {
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if (machine_s->cpu.block) {
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i = 0;
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i = 0;
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@@ -6366,6 +6366,74 @@ const cpu_family_t cpu_families[] = {
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.name = "MII",
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.name = "MII",
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.internal_name = "mii",
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.internal_name = "mii",
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.cpus = (const CPU[]) {
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.cpus = (const CPU[]) {
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{
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.name = "IBM 133 (PR166)",
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.cpu_type = CPU_Cx6x86MX,
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.fpus = fpus_internal,
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.rspeed = 133333333,
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.multi = 2.0,
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.voltage = 2900,
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.edx_reset = 0x601,
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.cpuid_model = 0x601,
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.cyrix_id = 0x0851,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.mem_read_cycles = 12,
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.mem_write_cycles = 12,
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.cache_read_cycles = 6,
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.cache_write_cycles = 6,
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.atclk_div = 16
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},
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{
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.name = "166 (PR200)",
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.cpu_type = CPU_Cx6x86MX,
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.fpus = fpus_internal,
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.rspeed = 166666666,
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.multi = 2.5,
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.voltage = 2900,
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.edx_reset = 0x601,
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.cpuid_model = 0x601,
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.cyrix_id = 0x0852,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.mem_read_cycles = 15,
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.mem_write_cycles = 15,
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.cache_read_cycles = 7,
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.cache_write_cycles = 7,
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.atclk_div = 20
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},
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{
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.name = "187.5 (PR233)",
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.cpu_type = CPU_Cx6x86MX,
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.fpus = fpus_internal,
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.rspeed = 187500000,
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.multi = 2.5,
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.voltage = 2900,
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.edx_reset = 0x601,
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.cpuid_model = 0x601,
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.cyrix_id = 0x0852,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.mem_read_cycles = 15,
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.mem_write_cycles = 15,
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.cache_read_cycles = 7,
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.cache_write_cycles = 7,
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.atclk_div = 45/2
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},
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{
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.name = "208.3 (PR266)",
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.cpu_type = CPU_Cx6x86MX,
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.fpus = fpus_internal,
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.rspeed = 208333333,
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.multi = 2.5,
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.voltage = 2700,
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.edx_reset = 0x601,
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.cpuid_model = 0x601,
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.cyrix_id = 0x0852,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.mem_read_cycles = 17,
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.mem_write_cycles = 17,
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.cache_read_cycles = 7,
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.cache_write_cycles = 7,
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.atclk_div = 25
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},
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{
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{
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.name = "233 (PR300)",
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.name = "233 (PR300)",
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.cpu_type = CPU_Cx6x86MX,
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.cpu_type = CPU_Cx6x86MX,
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@@ -6375,7 +6443,7 @@ const cpu_family_t cpu_families[] = {
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.voltage = 2900,
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.voltage = 2900,
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.edx_reset = 0x601,
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.edx_reset = 0x601,
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.cpuid_model = 0x601,
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.cpuid_model = 0x601,
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.cyrix_id = 0x0852,
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.cyrix_id = 0x0854,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.mem_read_cycles = 21,
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.mem_read_cycles = 21,
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.mem_write_cycles = 21,
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.mem_write_cycles = 21,
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@@ -6409,7 +6477,7 @@ const cpu_family_t cpu_families[] = {
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.voltage = 2900,
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.voltage = 2900,
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.edx_reset = 0x601,
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.edx_reset = 0x601,
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.cpuid_model = 0x601,
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.cpuid_model = 0x601,
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.cyrix_id = 0x0853,
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.cyrix_id = 0x0852,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.mem_read_cycles = 23,
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.mem_read_cycles = 23,
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.mem_write_cycles = 23,
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.mem_write_cycles = 23,
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@@ -6417,6 +6485,23 @@ const cpu_family_t cpu_families[] = {
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.cache_write_cycles = 7,
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.cache_write_cycles = 7,
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.atclk_div = 30
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.atclk_div = 30
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},
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},
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{
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.name = "270 (PR350)",
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.cpu_type = CPU_Cx6x86MX,
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.fpus = fpus_internal,
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.rspeed = 270000000,
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.multi = 3.0,
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.voltage = 2900,
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.edx_reset = 0x601,
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.cpuid_model = 0x601,
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.cyrix_id = 0x0853,
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.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC,
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.mem_read_cycles = 25,
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.mem_write_cycles = 25,
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.cache_read_cycles = 8,
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.cache_write_cycles = 8,
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.atclk_div = 32
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},
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{
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{
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.name = "285 (PR400)",
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.name = "285 (PR400)",
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.cpu_type = CPU_Cx6x86MX,
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.cpu_type = CPU_Cx6x86MX,
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