Generic MO Device ID changes and implemented the VPCEXT instructions (on the Virtual PC 2007 VM only).
This commit is contained in:
@@ -1651,7 +1651,7 @@ int opcode_0f_modrm[256] =
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1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, /*00*/
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1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, /*00*/
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0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/
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0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/
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1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*20*/
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1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*20*/
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*30*/
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, /*30*/
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*40*/
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*40*/
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/
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@@ -206,6 +206,56 @@ extern void x386_dynarec_log(const char *fmt, ...);
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#include "x86_ops_3dnow.h"
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#include "x86_ops_3dnow.h"
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static int opVPCEXT(uint32_t fetchdat)
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{
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uint8_t b1, b2;
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if (!is_vpc)
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return ILLEGAL(fetchdat);
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cpu_state.pc += 2;
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b1 = fetchdat & 0xff;
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b2 = (fetchdat >> 8) & 0xff;
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ILLEGAL_ON(CPL > 0);
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CLOCK_CYCLES(1);
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if ((b1 == 0x07) && (b2 == 0x0b)) {
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EBX = 0x00000000;
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EDX = 0x00000003;
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} else if ((b1 == 0x03) && (b2 == 0x00)) {
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/* TODO: Return host BCD time in DX/CX/AX */
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EDX = 0x00000000;
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ECX = 0x00000000;
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EAX = 0x00000000;
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} else if ((b1 == 0x03) && (b2 == 0x01)) {
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/* TODO: Return host BCD date in DX/CX/AX */
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EDX = 0x00000001;
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ECX = 0x00000001;
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EAX = 0x00001980;
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} else if ((b1 == 0x0a) && (b2 == 0x00)) {
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EAX = mem_size;
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} else if ((b1 == 0x11) && (b2 == 0x00))
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; /* Do nothing */
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else if ((b1 == 0x11) && (b2 == 0x01)) {
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EAX = 0x00000000;
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cpu_state.flags &= ~(Z_FLAG);
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} else if ((b1 == 0x11) && (b2 == 0x02))
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; /* Do nothing */
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else {
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cpu_state.pc = cpu_state.oldpc;
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pclog("Illegal VPCEXT %08X (%02X %02X)\n", fetchdat, b1, b2);
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x86illegal();
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return 0;
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}
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return 1;
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}
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static int op0F_w_a16(uint32_t fetchdat)
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static int op0F_w_a16(uint32_t fetchdat)
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{
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{
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int opcode = fetchdat & 0xff;
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int opcode = fetchdat & 0xff;
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@@ -1439,7 +1489,7 @@ const OpFn OP_TABLE(pentium2d_0f)[1024] =
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/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16,
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/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opVPCEXT,
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/*40*/ opCMOVO_w_a16, opCMOVNO_w_a16, opCMOVB_w_a16, opCMOVNB_w_a16, opCMOVE_w_a16, opCMOVNE_w_a16, opCMOVBE_w_a16, opCMOVNBE_w_a16,opCMOVS_w_a16, opCMOVNS_w_a16, opCMOVP_w_a16, opCMOVNP_w_a16, opCMOVL_w_a16, opCMOVNL_w_a16, opCMOVLE_w_a16, opCMOVNLE_w_a16,
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/*40*/ opCMOVO_w_a16, opCMOVNO_w_a16, opCMOVB_w_a16, opCMOVNB_w_a16, opCMOVE_w_a16, opCMOVNE_w_a16, opCMOVBE_w_a16, opCMOVNBE_w_a16,opCMOVS_w_a16, opCMOVNS_w_a16, opCMOVP_w_a16, opCMOVNP_w_a16, opCMOVL_w_a16, opCMOVNL_w_a16, opCMOVLE_w_a16, opCMOVNLE_w_a16,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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@@ -1461,7 +1511,7 @@ const OpFn OP_TABLE(pentium2d_0f)[1024] =
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/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16, opHINT_NOP_a16,
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/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opVPCEXT,
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/*40*/ opCMOVO_l_a16, opCMOVNO_l_a16, opCMOVB_l_a16, opCMOVNB_l_a16, opCMOVE_l_a16, opCMOVNE_l_a16, opCMOVBE_l_a16, opCMOVNBE_l_a16,opCMOVS_l_a16, opCMOVNS_l_a16, opCMOVP_l_a16, opCMOVNP_l_a16, opCMOVL_l_a16, opCMOVNL_l_a16, opCMOVLE_l_a16, opCMOVNLE_l_a16,
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/*40*/ opCMOVO_l_a16, opCMOVNO_l_a16, opCMOVB_l_a16, opCMOVNB_l_a16, opCMOVE_l_a16, opCMOVNE_l_a16, opCMOVBE_l_a16, opCMOVNBE_l_a16,opCMOVS_l_a16, opCMOVNS_l_a16, opCMOVP_l_a16, opCMOVNP_l_a16, opCMOVL_l_a16, opCMOVNL_l_a16, opCMOVLE_l_a16, opCMOVNLE_l_a16,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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@@ -1483,7 +1533,7 @@ const OpFn OP_TABLE(pentium2d_0f)[1024] =
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/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32,
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/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opVPCEXT,
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/*40*/ opCMOVO_w_a32, opCMOVNO_w_a32, opCMOVB_w_a32, opCMOVNB_w_a32, opCMOVE_w_a32, opCMOVNE_w_a32, opCMOVBE_w_a32, opCMOVNBE_w_a32,opCMOVS_w_a32, opCMOVNS_w_a32, opCMOVP_w_a32, opCMOVNP_w_a32, opCMOVL_w_a32, opCMOVNL_w_a32, opCMOVLE_w_a32, opCMOVNLE_w_a32,
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/*40*/ opCMOVO_w_a32, opCMOVNO_w_a32, opCMOVB_w_a32, opCMOVNB_w_a32, opCMOVE_w_a32, opCMOVNE_w_a32, opCMOVBE_w_a32, opCMOVNBE_w_a32,opCMOVS_w_a32, opCMOVNS_w_a32, opCMOVP_w_a32, opCMOVNP_w_a32, opCMOVL_w_a32, opCMOVNL_w_a32, opCMOVLE_w_a32, opCMOVNLE_w_a32,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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@@ -1505,7 +1555,7 @@ const OpFn OP_TABLE(pentium2d_0f)[1024] =
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/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opNOP, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32, opHINT_NOP_a32,
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/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opVPCEXT,
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/*40*/ opCMOVO_l_a32, opCMOVNO_l_a32, opCMOVB_l_a32, opCMOVNB_l_a32, opCMOVE_l_a32, opCMOVNE_l_a32, opCMOVBE_l_a32, opCMOVNBE_l_a32,opCMOVS_l_a32, opCMOVNS_l_a32, opCMOVP_l_a32, opCMOVNP_l_a32, opCMOVL_l_a32, opCMOVNL_l_a32, opCMOVLE_l_a32, opCMOVNLE_l_a32,
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/*40*/ opCMOVO_l_a32, opCMOVNO_l_a32, opCMOVB_l_a32, opCMOVNB_l_a32, opCMOVE_l_a32, opCMOVNE_l_a32, opCMOVBE_l_a32, opCMOVNBE_l_a32,opCMOVS_l_a32, opCMOVNS_l_a32, opCMOVP_l_a32, opCMOVNP_l_a32, opCMOVL_l_a32, opCMOVNL_l_a32, opCMOVLE_l_a32, opCMOVNLE_l_a32,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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@@ -157,6 +157,7 @@ int cpu_cache_int_enabled, cpu_cache_ext_enabled;
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int cpu_pci_speed, cpu_alt_reset;
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int cpu_pci_speed, cpu_alt_reset;
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uint16_t cpu_fast_off_count, cpu_fast_off_val;
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uint16_t cpu_fast_off_count, cpu_fast_off_val;
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uint32_t cpu_fast_off_flags;
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uint32_t cpu_fast_off_flags;
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int is_vpc;
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uint32_t cpu_features;
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uint32_t cpu_features;
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@@ -174,6 +174,7 @@ extern CPU cpus_Cyrix3[];
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extern CPU cpus_PentiumPro[];
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extern CPU cpus_PentiumPro[];
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extern CPU cpus_PentiumII66[];
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extern CPU cpus_PentiumII66[];
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extern CPU cpus_PentiumII[];
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extern CPU cpus_PentiumII[];
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extern CPU cpus_PentiumIID[];
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extern CPU cpus_Xeon[];
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extern CPU cpus_Xeon[];
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extern CPU cpus_Celeron[];
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extern CPU cpus_Celeron[];
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@@ -487,7 +488,7 @@ extern uint32_t old_rammask;
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#ifdef USE_ACYCS
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#ifdef USE_ACYCS
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extern int acycs;
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extern int acycs;
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#endif
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#endif
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extern int pic_pending;
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extern int pic_pending, is_vpc;
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extern uint16_t cpu_fast_off_count, cpu_fast_off_val;
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extern uint16_t cpu_fast_off_count, cpu_fast_off_val;
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extern uint32_t cpu_fast_off_flags;
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extern uint32_t cpu_fast_off_flags;
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@@ -782,7 +782,6 @@ CPU cpus_PentiumII[] = {
|
|||||||
{"Pentium II Deschutes 400", CPU_PENTIUM2D, fpus_internal, 400000000, 4.0, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 36,36,12,12, 48},
|
{"Pentium II Deschutes 400", CPU_PENTIUM2D, fpus_internal, 400000000, 4.0, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 36,36,12,12, 48},
|
||||||
{"Pentium II Deschutes 450", CPU_PENTIUM2D, fpus_internal, 450000000, 4.5, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 41,41,14,14, 54},
|
{"Pentium II Deschutes 450", CPU_PENTIUM2D, fpus_internal, 450000000, 4.5, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 41,41,14,14, 54},
|
||||||
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
|
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|
||||||
CPU cpus_Xeon[] = {
|
CPU cpus_Xeon[] = {
|
||||||
@@ -815,6 +814,21 @@ CPU cpus_Celeron[] = {
|
|||||||
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
|
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
CPU cpus_PentiumIID[] = {
|
||||||
|
/*Intel Pentium II Deschutes*/
|
||||||
|
{"Pentium II Deschutes 50", CPU_PENTIUM2D, fpus_internal, 50000000, 1.0, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4, 4, 3, 3, 6},
|
||||||
|
{"Pentium II Deschutes 60", CPU_PENTIUM2D, fpus_internal, 60000000, 1.0, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6, 6, 3, 3, 7},
|
||||||
|
{"Pentium II Deschutes 66", CPU_PENTIUM2D, fpus_internal, 66666666, 1.0, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6, 6, 3, 3, 8},
|
||||||
|
{"Pentium II Deschutes 75", CPU_PENTIUM2D, fpus_internal, 75000000, 1.5, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7, 7, 4, 4, 9},
|
||||||
|
{"Pentium II Deschutes 266", CPU_PENTIUM2D, fpus_internal, 266666666, 4.0, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
|
||||||
|
{"Pentium II Deschutes 300/66", CPU_PENTIUM2D, fpus_internal, 300000000, 4.5, 0x651, 0x651, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,12,12, 36},
|
||||||
|
{"Pentium II Deschutes 333", CPU_PENTIUM2D, fpus_internal, 333333333, 5.0, 0x651, 0x651, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 40},
|
||||||
|
{"Pentium II Deschutes 350", CPU_PENTIUM2D, fpus_internal, 350000000, 3.5, 0x651, 0x651, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 32,32,11,11, 42},
|
||||||
|
{"Pentium II Deschutes 400", CPU_PENTIUM2D, fpus_internal, 400000000, 4.0, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 36,36,12,12, 48},
|
||||||
|
{"Pentium II Deschutes 450", CPU_PENTIUM2D, fpus_internal, 450000000, 4.5, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 41,41,14,14, 54},
|
||||||
|
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
|
||||||
|
};
|
||||||
|
|
||||||
CPU cpus_Cyrix3[] = {
|
CPU cpus_Cyrix3[] = {
|
||||||
/*VIA Cyrix III (Samuel)*/
|
/*VIA Cyrix III (Samuel)*/
|
||||||
{"Cyrix III 66", CPU_CYRIX3S, fpus_internal, 66666666, 1.0, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC, 6, 6, 3, 3, 8}, /*66 MHz version*/
|
{"Cyrix III 66", CPU_CYRIX3S, fpus_internal, 66666666, 1.0, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC, 6, 6, 3, 3, 8}, /*66 MHz version*/
|
||||||
|
|||||||
@@ -36,6 +36,7 @@
|
|||||||
#include <86box/hdc.h>
|
#include <86box/hdc.h>
|
||||||
#include <86box/hdc_ide.h>
|
#include <86box/hdc_ide.h>
|
||||||
#include <86box/mo.h>
|
#include <86box/mo.h>
|
||||||
|
#include <86box/version.h>
|
||||||
|
|
||||||
#ifdef _WIN32
|
#ifdef _WIN32
|
||||||
#include <windows.h>
|
#include <windows.h>
|
||||||
@@ -1324,6 +1325,7 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
|
|||||||
int32_t alloc_length;
|
int32_t alloc_length;
|
||||||
int size_idx, idx = 0;
|
int size_idx, idx = 0;
|
||||||
unsigned preamble_len;
|
unsigned preamble_len;
|
||||||
|
char device_identify[9] = { '8', '6', 'B', '_', 'M', 'O', '0', '0', 0 };
|
||||||
int32_t blen = 0;
|
int32_t blen = 0;
|
||||||
int32_t *BufLen;
|
int32_t *BufLen;
|
||||||
uint32_t previous_pos = 0;
|
uint32_t previous_pos = 0;
|
||||||
@@ -1339,6 +1341,8 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
|
|||||||
dev->packet_len = 0;
|
dev->packet_len = 0;
|
||||||
dev->request_pos = 0;
|
dev->request_pos = 0;
|
||||||
|
|
||||||
|
device_identify[7] = dev->id + 0x30;
|
||||||
|
|
||||||
memcpy(dev->current_cdb, cdb, 12);
|
memcpy(dev->current_cdb, cdb, 12);
|
||||||
|
|
||||||
if (cdb[0] != 0) {
|
if (cdb[0] != 0) {
|
||||||
@@ -1725,9 +1729,15 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
|
|||||||
}
|
}
|
||||||
dev->buffer[7] |= 0x02;
|
dev->buffer[7] |= 0x02;
|
||||||
|
|
||||||
ide_padstr8(dev->buffer + 8, 8, mo_drive_types[dev->drv->type].vendor); /* Vendor */
|
if (dev->drv->type > 0) {
|
||||||
ide_padstr8(dev->buffer + 16, 16, mo_drive_types[dev->drv->type].model); /* Product */
|
ide_padstr8(dev->buffer + 8, 8, mo_drive_types[dev->drv->type].vendor); /* Vendor */
|
||||||
ide_padstr8(dev->buffer + 32, 4, mo_drive_types[dev->drv->type].revision); /* Revision */
|
ide_padstr8(dev->buffer + 16, 16, mo_drive_types[dev->drv->type].model); /* Product */
|
||||||
|
ide_padstr8(dev->buffer + 32, 4, mo_drive_types[dev->drv->type].revision); /* Revision */
|
||||||
|
} else {
|
||||||
|
ide_padstr8(dev->buffer + 8, 8, EMU_NAME); /* Vendor */
|
||||||
|
ide_padstr8(dev->buffer + 16, 16, device_identify); /* Product */
|
||||||
|
ide_padstr8(dev->buffer + 32, 4, EMU_VERSION); /* Revision */
|
||||||
|
}
|
||||||
idx = 36;
|
idx = 36;
|
||||||
|
|
||||||
if (max_len == 96) {
|
if (max_len == 96) {
|
||||||
@@ -2038,13 +2048,20 @@ static void
|
|||||||
mo_do_identify(ide_t *ide, int ide_has_dma)
|
mo_do_identify(ide_t *ide, int ide_has_dma)
|
||||||
{
|
{
|
||||||
char model[40];
|
char model[40];
|
||||||
mo_t* mo = (mo_t*)ide->sc;
|
|
||||||
|
mo_t* mo = (mo_t*) ide->sc;
|
||||||
|
|
||||||
memset(model, 0, 40);
|
memset(model, 0, 40);
|
||||||
snprintf(model, 40, "%s %s", mo_drive_types[mo_drives[mo->id].type].vendor, mo_drive_types[mo_drives[mo->id].type].model);
|
|
||||||
|
|
||||||
ide_padstr((char *) (ide->buffer + 23), mo_drive_types[mo_drives[mo->id].type].revision, 8); /* Firmware */
|
if (mo_drives[mo->id].type > 0) {
|
||||||
ide_padstr((char *) (ide->buffer + 27), model, 40); /* Model */
|
snprintf(model, 40, "%s %s", mo_drive_types[mo_drives[mo->id].type].vendor, mo_drive_types[mo_drives[mo->id].type].model);
|
||||||
|
ide_padstr((char *) (ide->buffer + 23), mo_drive_types[mo_drives[mo->id].type].revision, 8); /* Firmware */
|
||||||
|
ide_padstr((char *) (ide->buffer + 27), model, 40); /* Model */
|
||||||
|
} else {
|
||||||
|
snprintf(model, 40, "%s %s%02i", EMU_NAME, "86B_MO", mo->id);
|
||||||
|
ide_padstr((char *) (ide->buffer + 23), EMU_VERSION, 8); /* Firmware */
|
||||||
|
ide_padstr((char *) (ide->buffer + 27), model, 40); /* Model */
|
||||||
|
}
|
||||||
|
|
||||||
if (ide_has_dma) {
|
if (ide_has_dma) {
|
||||||
ide->buffer[80] = 0x30; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-5*/
|
ide->buffer[80] = 0x30; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-5*/
|
||||||
|
|||||||
@@ -543,6 +543,7 @@ machine_at_vpc2007_init(const machine_t *model)
|
|||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
machine_at_common_init_ex(model, 2);
|
machine_at_common_init_ex(model, 2);
|
||||||
|
is_vpc = 1;
|
||||||
|
|
||||||
pci_init(PCI_CONFIG_TYPE_1);
|
pci_init(PCI_CONFIG_TYPE_1);
|
||||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||||
|
|||||||
@@ -73,6 +73,8 @@ machine_init_ex(int m)
|
|||||||
if (!bios_only) {
|
if (!bios_only) {
|
||||||
machine_log("Initializing as \"%s\"\n", machine_getname_ex(m));
|
machine_log("Initializing as \"%s\"\n", machine_getname_ex(m));
|
||||||
|
|
||||||
|
is_vpc = 0;
|
||||||
|
|
||||||
/* Set up the architecture flags. */
|
/* Set up the architecture flags. */
|
||||||
AT = IS_ARCH(machine, MACHINE_AT);
|
AT = IS_ARCH(machine, MACHINE_AT);
|
||||||
PCI = IS_ARCH(machine, MACHINE_PCI);
|
PCI = IS_ARCH(machine, MACHINE_PCI);
|
||||||
|
|||||||
@@ -356,7 +356,7 @@ const machine_t machines[] = {
|
|||||||
{ "[i440BX] Tyan Tsunami ATX", "tsunamiatx", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_SOUND, 8, 1024, 8, 255, machine_at_tsunamiatx_init, at_tsunamiatx_get_device },
|
{ "[i440BX] Tyan Tsunami ATX", "tsunamiatx", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_SOUND, 8, 1024, 8, 255, machine_at_tsunamiatx_init, at_tsunamiatx_get_device },
|
||||||
{ "[i440BX] SuperMicro Super P6SBA", "p6sba", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_p6sba_init, NULL },
|
{ "[i440BX] SuperMicro Super P6SBA", "p6sba", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_p6sba_init, NULL },
|
||||||
#if defined(DEV_BRANCH) && defined(USE_VIRTUALPC)
|
#if defined(DEV_BRANCH) && defined(USE_VIRTUALPC)
|
||||||
{ "[i440BX] Microsoft Virtual PC 2007", "vpc2007", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_vpc2007_init, NULL },
|
{ "[i440BX] Microsoft Virtual PC 2007", "vpc2007", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumIID}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_vpc2007_init, NULL },
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Slot 2 machines(Including Slot 1/2 Hybrids) */
|
/* Slot 2 machines(Including Slot 1/2 Hybrids) */
|
||||||
|
|||||||
Reference in New Issue
Block a user