diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c
index 8524306dc..db8c89ebb 100644
--- a/src/cpu/cpu_table.c
+++ b/src/cpu/cpu_table.c
@@ -688,6 +688,23 @@ const cpu_family_t cpu_families[] = {
                 .cache_write_cycles = 0,
                 .atclk_div          = 1
             },
+            {
+                .name               = "8",
+                .cpu_type           = CPU_V20,
+                .fpus               = fpus_8088,
+                .rspeed             = 8000000,
+                .multi              = 1,
+                .voltage            = 5000,
+                .edx_reset          = 0,
+                .cpuid_model        = 0,
+                .cyrix_id           = 0,
+                .cpu_flags          = 0,
+                .mem_read_cycles    = 0,
+                .mem_write_cycles   = 0,
+                .cache_read_cycles  = 0,
+                .cache_write_cycles = 0,
+                .atclk_div          = 1
+            },
             {
                 .name               = "10",
                 .cpu_type           = CPU_V20,
@@ -911,10 +928,10 @@ const cpu_family_t cpu_families[] = {
         .internal_name = "necv30",
         .cpus          = (const CPU[]) {
             {
-                .name               = "5",
+                .name               = "7.16",
                 .cpu_type           = CPU_V30,
                 .fpus               = fpus_80186,
-                .rspeed             = 5000000,
+                .rspeed             = 7159092,
                 .multi              = 1,
                 .voltage            = 5000,
                 .edx_reset          = 0,
@@ -944,6 +961,23 @@ const cpu_family_t cpu_families[] = {
                 .cache_write_cycles = 0,
                 .atclk_div          = 1
             },
+            {
+                .name               = "9.54",
+                .cpu_type           = CPU_V30,
+                .fpus               = fpus_80186,
+                .rspeed             = 9545456,
+                .multi              = 1,
+                .voltage            = 5000,
+                .edx_reset          = 0,
+                .cpuid_model        = 0,
+                .cyrix_id           = 0,
+                .cpu_flags          = 0,
+                .mem_read_cycles    = 0,
+                .mem_write_cycles   = 0,
+                .cache_read_cycles  = 0,
+                .cache_write_cycles = 0,
+                .atclk_div          = 1
+            },
             {
                 .name               = "10",
                 .cpu_type           = CPU_V30,