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Finished the Intel 450KX, changes to the memory and SMRAM API's, removed the ASUS P/I-P6RP4 from the Dev branch, added the CMD646 PCI IDE controller, and fixed some bugs on the CMD640.

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This commit is contained in:
OBattler
2021-10-26 01:54:35 +02:00
parent 08f64058eb
commit 77d73ed3c2
22 changed files with 1269 additions and 305 deletions
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4
src/machine/CMakeLists.txt
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@@ -28,10 +28,6 @@ if(HEDAKA)
target_compile_definitions(mch PRIVATE USE_HEDAKA)
endif()
if(I450KX)
target_compile_definitions(mch PRIVATE USE_I450KX)
endif()
if(LASERXT)
target_sources(mch PRIVATE m_xt_laserxt.c)
target_compile_definitions(mch PRIVATE USE_LASERXT)

14
src/machine/m_at_socket8.c
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@@ -30,6 +30,8 @@
#include <86box/hdc_ide.h>
#include <86box/keyboard.h>
#include <86box/flash.h>
#include <86box/timer.h>
#include <86box/nvr.h>
#include <86box/sio.h>
#include <86box/hwm.h>
#include <86box/spd.h>
@@ -37,7 +39,7 @@
#include "cpu.h"
#include <86box/machine.h>
#if defined(DEV_BRANCH) && defined(USE_I450KX)
int
machine_at_p6rp4_init(const machine_t *model)
{
@@ -49,11 +51,12 @@ machine_at_p6rp4_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
device_add(&p6rp4_nvr_device);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x19, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x12, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x14, PCI_CARD_AGPBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_NORMAL, 1, 2, 3, 4);
@@ -62,16 +65,15 @@ machine_at_p6rp4_init(const machine_t *model)
pci_register_slot(0x04, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i450kx_device);
device_add(&sio_zb_device);
// device_add(&keyboard_ps2_ami_pci_device);
device_add(&ide_cmd646_device);
/* Input port bit 2 must be 1 or CMOS Setup is disabled. */
device_add(&keyboard_ps2_ami_pci_device);
device_add(&fdc37c665_device);
device_add(&ide_cmd640_pci_device);
device_add(&intel_flash_bxt_device);
return ret;
}
#endif
int
machine_at_686nx_init(const machine_t *model)

4
src/machine/machine_table.c
View File

@@ -398,6 +398,8 @@ const machine_t machines[] = {
{ "[SiS 471] DTK PKM-0038S E-2", "dtk486", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_VLB | MACHINE_IDE, 1024, 65536, 1024, 127, machine_at_dtk486_init, NULL },
/* Unknown Epox VLB Socket 3 board, has AMIKey F keyboard BIOS. */
{ "[SiS 471] Epox 486SX/DX Green", "ami471", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_VLB | MACHINE_IDE, 1024, 65536, 1024, 127, machine_at_ami471_init, NULL },
/* Has an Intel 82C42PE with Phoenix MultiKey KBC firmware. */
{ "[UMC 491/493] Epson Action Tower 3000", "actiontower3000", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 262144, 1024, 255, machine_at_actiontower3000_init, NULL },
/* 486 machines which utilize the PCI bus */
/* This has an AMIKey-2, which is an updated version of type 'H'. */
@@ -750,10 +752,8 @@ const machine_t machines[] = {
/* Socket 8 machines */
/* 450KX */
#if defined(DEV_BRANCH) && defined(USE_I450KX)
/* This has an AMIKey-2, which is an updated version of type 'H'. */
{ "[i450KX] ASUS P/I-P6RP4", "p6rp4", MACHINE_TYPE_SOCKET8, CPU_PKG_SOCKET8, 0, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, machine_at_p6rp4_init, NULL },
#endif
/* 440FX */
/* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */