Merge branch 'master' of https://github.com/OBattler/86Box
This commit is contained in:
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
BIN
roms/mda.rom
BIN
roms/mda.rom
Binary file not shown.
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
@@ -1 +0,0 @@
|
|||||||
This directory needs to contain some ROM files.
|
|
||||||
52
src/jim.c
52
src/jim.c
@@ -7,7 +7,10 @@
|
|||||||
#include "CPU/cpu.h"
|
#include "CPU/cpu.h"
|
||||||
#include "io.h"
|
#include "io.h"
|
||||||
#include "device.h"
|
#include "device.h"
|
||||||
|
#include "jim.h"
|
||||||
|
#include "mem.h"
|
||||||
#include "model.h"
|
#include "model.h"
|
||||||
|
#include "rom.h"
|
||||||
|
|
||||||
|
|
||||||
uint8_t europcdat[16];
|
uint8_t europcdat[16];
|
||||||
@@ -15,11 +18,43 @@ uint8_t europcdat[16];
|
|||||||
struct
|
struct
|
||||||
{
|
{
|
||||||
uint8_t dat[16];
|
uint8_t dat[16];
|
||||||
int stat;
|
uint8_t stat;
|
||||||
int addr;
|
uint8_t addr;
|
||||||
} europc_rtc;
|
} europc_rtc;
|
||||||
|
|
||||||
|
|
||||||
|
static uint8_t jim_load_nvr(void)
|
||||||
|
{
|
||||||
|
FILE *f;
|
||||||
|
|
||||||
|
f = nvrfopen(L"europc_jim.nvr", L"rb");
|
||||||
|
if (f)
|
||||||
|
{
|
||||||
|
fread(europcdat, 1, 16, f);
|
||||||
|
fread(europc_rtc.dat, 1, 16, f);
|
||||||
|
fclose(f);
|
||||||
|
f = NULL;
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void jim_save_nvr(void)
|
||||||
|
{
|
||||||
|
FILE *f;
|
||||||
|
|
||||||
|
f = nvrfopen(L"europc_jim.nvr", L"wb");
|
||||||
|
if (f)
|
||||||
|
{
|
||||||
|
fwrite(europcdat, 1, 16, f);
|
||||||
|
fwrite(europc_rtc.dat, 1, 16, f);
|
||||||
|
fclose(f);
|
||||||
|
f = NULL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
static void writejim(uint16_t addr, uint8_t val, void *p)
|
static void writejim(uint16_t addr, uint8_t val, void *p)
|
||||||
{
|
{
|
||||||
if ((addr&0xFF0)==0x250) europcdat[addr&0xF]=val;
|
if ((addr&0xFF0)==0x250) europcdat[addr&0xF]=val;
|
||||||
@@ -73,12 +108,15 @@ void jim_init(void)
|
|||||||
{
|
{
|
||||||
uint8_t viddat;
|
uint8_t viddat;
|
||||||
memset(europc_rtc.dat,0,16);
|
memset(europc_rtc.dat,0,16);
|
||||||
europc_rtc.dat[0xF]=1;
|
if (!jim_load_nvr())
|
||||||
europc_rtc.dat[3]=1;
|
{
|
||||||
europc_rtc.dat[4]=1;
|
europc_rtc.dat[0xF]=1;
|
||||||
europc_rtc.dat[5]=0x88;
|
europc_rtc.dat[3]=1;
|
||||||
|
europc_rtc.dat[4]=1;
|
||||||
|
europc_rtc.dat[5]=0x88;
|
||||||
|
}
|
||||||
if (gfxcard==GFX_CGA || gfxcard == GFX_COLORPLUS) viddat=0x12;
|
if (gfxcard==GFX_CGA || gfxcard == GFX_COLORPLUS) viddat=0x12;
|
||||||
else if (gfxcard==GFX_MDA || gfxcard==GFX_HERCULES || gfxcard==GFX_INCOLOR) viddat=3;
|
else if (gfxcard==GFX_MDA || gfxcard==GFX_HERCULES || gfxcard==GFX_INCOLOR) viddat=3;
|
||||||
else viddat=0x10;
|
else viddat=0x10;
|
||||||
europc_rtc.dat[0xB]=viddat;
|
europc_rtc.dat[0xB]=viddat;
|
||||||
europc_rtc.dat[0xD]=viddat; /*Checksum*/
|
europc_rtc.dat[0xD]=viddat; /*Checksum*/
|
||||||
|
|||||||
@@ -146,7 +146,7 @@ MODEL models[] =
|
|||||||
{"[8088] Generic XT clone", ROM_GENXT, "genxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, xt_init, NULL },
|
{"[8088] Generic XT clone", ROM_GENXT, "genxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, xt_init, NULL },
|
||||||
{"[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, xt_init, NULL },
|
{"[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, xt_init, NULL },
|
||||||
{"[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, xt_init, NULL },
|
{"[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, 0, xt_init, NULL },
|
||||||
{"[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"", cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 512, 640, 128, 63, europc_init, NULL },
|
{"[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"", cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 512, 640, 128, 0, europc_init, NULL },
|
||||||
{"[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 128, 640, 128, 0, tandy1k_init, &tandy1000_device },
|
{"[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 128, 640, 128, 0, tandy1k_init, &tandy1000_device },
|
||||||
{"[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 256, 640, 128, 0, tandy1k_init, &tandy1000hx_device },
|
{"[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, 0, 256, 640, 128, 0, tandy1k_init, &tandy1000hx_device },
|
||||||
{"[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 1152, 64, 0, xt_laserxt_init, NULL },
|
{"[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, 0, 64, 1152, 64, 0, xt_laserxt_init, NULL },
|
||||||
|
|||||||
@@ -25,6 +25,7 @@
|
|||||||
#include "CPU/cpu.h"
|
#include "CPU/cpu.h"
|
||||||
#include "device.h"
|
#include "device.h"
|
||||||
#include "io.h"
|
#include "io.h"
|
||||||
|
#include "jim.h"
|
||||||
#include "mem.h"
|
#include "mem.h"
|
||||||
#include "model.h"
|
#include "model.h"
|
||||||
#include "nmi.h"
|
#include "nmi.h"
|
||||||
@@ -279,6 +280,12 @@ void savenvr(void)
|
|||||||
wchar_t *model_name;
|
wchar_t *model_name;
|
||||||
wchar_t *nvr_name;
|
wchar_t *nvr_name;
|
||||||
|
|
||||||
|
if (romset == ROM_EUROPC)
|
||||||
|
{
|
||||||
|
jim_save_nvr();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
model_name = (wchar_t *) malloc((strlen(model_get_internal_name_ex(oldmodel)) << 1) + 2);
|
model_name = (wchar_t *) malloc((strlen(model_get_internal_name_ex(oldmodel)) << 1) + 2);
|
||||||
mbstowcs(model_name, model_get_internal_name_ex(oldmodel), strlen(model_get_internal_name_ex(oldmodel)) + 1);
|
mbstowcs(model_name, model_get_internal_name_ex(oldmodel), strlen(model_get_internal_name_ex(oldmodel)) + 1);
|
||||||
nvr_name = (wchar_t *) malloc((wcslen(model_name) << 1) + 2 + 8);
|
nvr_name = (wchar_t *) malloc((wcslen(model_name) << 1) + 2 + 8);
|
||||||
|
|||||||
@@ -53,7 +53,7 @@ static SCSI_CARD scsi_cards[] = {
|
|||||||
{ "Adaptec AHA-1542CF", "aha1542cf", &aha1542cf_device, aha_device_reset },
|
{ "Adaptec AHA-1542CF", "aha1542cf", &aha1542cf_device, aha_device_reset },
|
||||||
{ "Adaptec AHA-1640", "aha1640", &aha1640_device, aha_device_reset },
|
{ "Adaptec AHA-1640", "aha1640", &aha1640_device, aha_device_reset },
|
||||||
{ "BusLogic BT-542B", "bt542b", &buslogic_device, BuslogicDeviceReset },
|
{ "BusLogic BT-542B", "bt542b", &buslogic_device, BuslogicDeviceReset },
|
||||||
{ "BusLogic BT-958D PCI", "bt958d", &buslogic_pci_device, BuslogicDeviceReset },
|
{ "BusLogic BT-946C PCI", "bt946c", &buslogic_pci_device, BuslogicDeviceReset },
|
||||||
{ "", "", NULL, NULL },
|
{ "", "", NULL, NULL },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -8,7 +8,7 @@
|
|||||||
* supported:
|
* supported:
|
||||||
*
|
*
|
||||||
* 0 - BT-542B ISA;
|
* 0 - BT-542B ISA;
|
||||||
* 1 - BT-958 PCI (but BT-542B ISA on non-PCI machines)
|
* 1 - BT-946C PCI (but BT-542B ISA on non-PCI machines)
|
||||||
*
|
*
|
||||||
* Version: @(#)scsi_buslogic.c 1.0.8 2017/08/23
|
* Version: @(#)scsi_buslogic.c 1.0.8 2017/08/23
|
||||||
*
|
*
|
||||||
@@ -39,7 +39,7 @@
|
|||||||
#include "scsi_buslogic.h"
|
#include "scsi_buslogic.h"
|
||||||
|
|
||||||
|
|
||||||
#define BUSLOGIC_RESET_DURATION_NS UINT64_C(250000)
|
#define BUSLOGIC_RESET_DURATION_US UINT64_C(50000)
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -119,24 +119,10 @@ typedef struct {
|
|||||||
fIrqAutoConfiguration :1;
|
fIrqAutoConfiguration :1;
|
||||||
uint8_t uDMATransferRate;
|
uint8_t uDMATransferRate;
|
||||||
uint8_t uSCSIId;
|
uint8_t uSCSIId;
|
||||||
uint8_t fLowByteTerminated :1,
|
uint8_t uSCSIConfiguration;
|
||||||
fParityCheckingEnabled :1,
|
|
||||||
fHighByteTerminated :1,
|
|
||||||
fNoisyCablingEnvironment:1,
|
|
||||||
fFastSyncNegotiation :1,
|
|
||||||
fBusResetEnabled :1,
|
|
||||||
fReserved3 :1,
|
|
||||||
fActiveNegotiationEna :1;
|
|
||||||
uint8_t uBusOnDelay;
|
uint8_t uBusOnDelay;
|
||||||
uint8_t uBusOffDelay;
|
uint8_t uBusOffDelay;
|
||||||
uint8_t fHostAdapterBIOSEnabled :1,
|
uint8_t uBIOSConfiguration;
|
||||||
fBIOSRedirectionOfInt19 :1,
|
|
||||||
fExtendedTranslation :1,
|
|
||||||
fMapRemovableAsFixed :1,
|
|
||||||
fReserved4 :1,
|
|
||||||
fBIOSMoreThan2Drives :1,
|
|
||||||
fBIOSInterruptMode :1,
|
|
||||||
fFlopticalSupport :1;
|
|
||||||
uint16_t u16DeviceEnabledMask;
|
uint16_t u16DeviceEnabledMask;
|
||||||
uint16_t u16WidePermittedMask;
|
uint16_t u16WidePermittedMask;
|
||||||
uint16_t u16FastPermittedMask;
|
uint16_t u16FastPermittedMask;
|
||||||
@@ -162,14 +148,16 @@ typedef struct {
|
|||||||
uint8_t fInt13Extension : 1;
|
uint8_t fInt13Extension : 1;
|
||||||
uint8_t fReserved9 : 1;
|
uint8_t fReserved9 : 1;
|
||||||
uint8_t fCDROMBoot : 1;
|
uint8_t fCDROMBoot : 1;
|
||||||
unsigned char uReserved10 : 5;
|
unsigned char uReserved10 : 2;
|
||||||
|
uint8_t fMultiBoot : 1;
|
||||||
|
unsigned char uReserved11 : 2;
|
||||||
unsigned char uBootTargetId : 4;
|
unsigned char uBootTargetId : 4;
|
||||||
unsigned char uBootChannel : 4;
|
unsigned char uBootChannel : 4;
|
||||||
uint8_t fForceBusDeviceScanningOrder : 1;
|
uint8_t fForceBusDeviceScanningOrder : 1;
|
||||||
unsigned char uReserved11 : 7;
|
unsigned char uReserved12 : 7;
|
||||||
uint16_t u16NonTaggedToAlternateLunPermittedMask;
|
uint16_t u16NonTaggedToAlternateLunPermittedMask;
|
||||||
uint16_t u16RenegotiateSyncAfterCheckConditionMask;
|
uint16_t u16RenegotiateSyncAfterCheckConditionMask;
|
||||||
uint8_t aReserved12[10];
|
uint8_t aReserved14[10];
|
||||||
uint8_t aManufacturingDiagnostic[2];
|
uint8_t aManufacturingDiagnostic[2];
|
||||||
uint16_t u16Checksum;
|
uint16_t u16Checksum;
|
||||||
} AutoSCSIRam;
|
} AutoSCSIRam;
|
||||||
@@ -491,7 +479,7 @@ typedef struct {
|
|||||||
uint8_t CmdBuf[128];
|
uint8_t CmdBuf[128];
|
||||||
uint8_t CmdParam;
|
uint8_t CmdParam;
|
||||||
uint8_t CmdParamLeft;
|
uint8_t CmdParamLeft;
|
||||||
uint8_t DataBuf[128];
|
uint8_t DataBuf[65536];
|
||||||
uint16_t DataReply;
|
uint16_t DataReply;
|
||||||
uint16_t DataReplyLeft;
|
uint16_t DataReplyLeft;
|
||||||
uint32_t MailboxCount;
|
uint32_t MailboxCount;
|
||||||
@@ -517,6 +505,7 @@ typedef struct {
|
|||||||
uint32_t bios_addr,
|
uint32_t bios_addr,
|
||||||
bios_size,
|
bios_size,
|
||||||
bios_mask;
|
bios_mask;
|
||||||
|
uint8_t AutoSCSIROM[32768];
|
||||||
} Buslogic_t;
|
} Buslogic_t;
|
||||||
#pragma pack(pop)
|
#pragma pack(pop)
|
||||||
|
|
||||||
@@ -529,6 +518,7 @@ static Buslogic_t *BuslogicResetDevice;
|
|||||||
|
|
||||||
enum {
|
enum {
|
||||||
CHIP_BUSLOGIC_ISA,
|
CHIP_BUSLOGIC_ISA,
|
||||||
|
CHIP_BUSLOGIC_MCA,
|
||||||
CHIP_BUSLOGIC_PCI
|
CHIP_BUSLOGIC_PCI
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -594,6 +584,127 @@ BuslogicInterrupt(Buslogic_t *bl, int set)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static wchar_t *
|
||||||
|
BuslogicGetNVRFileName(Buslogic_t *bl)
|
||||||
|
{
|
||||||
|
switch(bl->chip)
|
||||||
|
{
|
||||||
|
case CHIP_BUSLOGIC_ISA:
|
||||||
|
return L"bt542b.nvr";
|
||||||
|
case CHIP_BUSLOGIC_MCA:
|
||||||
|
return L"bt640.nvr";
|
||||||
|
case CHIP_BUSLOGIC_PCI:
|
||||||
|
return L"bt946c.nvr";
|
||||||
|
default:
|
||||||
|
fatal("Unrecognized BusLogic chip: %i\n", bl->chip);
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static void
|
||||||
|
BuslogicInitializeAutoSCSIRam(Buslogic_t *bl, uint8_t safe)
|
||||||
|
{
|
||||||
|
HALocalRAM *HALR = &bl->LocalRAM;
|
||||||
|
|
||||||
|
memset(&(HALR->structured.autoSCSIData), 0, sizeof(AutoSCSIRam));
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.aInternalSignature[0] = 'F';
|
||||||
|
HALR->structured.autoSCSIData.aInternalSignature[1] = 'A';
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.cbInformation = 64;
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.aHostAdaptertype[0] = ' ';
|
||||||
|
HALR->structured.autoSCSIData.aHostAdaptertype[1] = (bl->chip == CHIP_BUSLOGIC_PCI) ? '9' : '5';
|
||||||
|
HALR->structured.autoSCSIData.aHostAdaptertype[2] = '4';
|
||||||
|
HALR->structured.autoSCSIData.aHostAdaptertype[3] = (bl->chip == CHIP_BUSLOGIC_PCI) ? '6' : '2';
|
||||||
|
HALR->structured.autoSCSIData.aHostAdaptertype[4] = (bl->chip == CHIP_BUSLOGIC_PCI) ? 'C' : 'B';
|
||||||
|
HALR->structured.autoSCSIData.aHostAdaptertype[5] = ' ';
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.fLevelSensitiveInterrupt = (bl->chip == CHIP_BUSLOGIC_PCI) ? 1 : 0;
|
||||||
|
HALR->structured.autoSCSIData.uSystemRAMAreForBIOS = 6;
|
||||||
|
|
||||||
|
if (bl->chip != CHIP_BUSLOGIC_PCI)
|
||||||
|
{
|
||||||
|
switch(bl->DmaChannel)
|
||||||
|
{
|
||||||
|
case 5:
|
||||||
|
HALR->structured.autoSCSIData.uDMAChannel = 1;
|
||||||
|
break;
|
||||||
|
case 6:
|
||||||
|
HALR->structured.autoSCSIData.uDMAChannel = 2;
|
||||||
|
break;
|
||||||
|
case 7:
|
||||||
|
HALR->structured.autoSCSIData.uDMAChannel = 3;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
HALR->structured.autoSCSIData.uDMAChannel = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
HALR->structured.autoSCSIData.fDMAAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 1;
|
||||||
|
|
||||||
|
if (bl->chip != CHIP_BUSLOGIC_PCI)
|
||||||
|
{
|
||||||
|
switch(bl->Irq)
|
||||||
|
{
|
||||||
|
case 9:
|
||||||
|
HALR->structured.autoSCSIData.uIrqChannel = 1;
|
||||||
|
break;
|
||||||
|
case 10:
|
||||||
|
HALR->structured.autoSCSIData.uIrqChannel = 2;
|
||||||
|
break;
|
||||||
|
case 11:
|
||||||
|
HALR->structured.autoSCSIData.uIrqChannel = 3;
|
||||||
|
break;
|
||||||
|
case 12:
|
||||||
|
HALR->structured.autoSCSIData.uIrqChannel = 4;
|
||||||
|
break;
|
||||||
|
case 14:
|
||||||
|
HALR->structured.autoSCSIData.uIrqChannel = 5;
|
||||||
|
break;
|
||||||
|
case 15:
|
||||||
|
HALR->structured.autoSCSIData.uIrqChannel = 6;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
HALR->structured.autoSCSIData.uIrqChannel = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
HALR->structured.autoSCSIData.fIrqAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 1;
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.uDMATransferRate = (bl->chip == CHIP_BUSLOGIC_ISA) ? 1 : 0;
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.uSCSIId = 7;
|
||||||
|
HALR->structured.autoSCSIData.uSCSIConfiguration = 0x3F;
|
||||||
|
HALR->structured.autoSCSIData.uBusOnDelay = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 7;
|
||||||
|
HALR->structured.autoSCSIData.uBusOffDelay = (bl->chip == CHIP_BUSLOGIC_PCI) ? 0 : 4;
|
||||||
|
HALR->structured.autoSCSIData.uBIOSConfiguration = (bl->has_bios) ? 0x33 : 0x32;
|
||||||
|
if (!safe)
|
||||||
|
{
|
||||||
|
HALR->structured.autoSCSIData.uBIOSConfiguration |= 0x04;
|
||||||
|
}
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.u16DeviceEnabledMask = 0xffff;
|
||||||
|
HALR->structured.autoSCSIData.u16WidePermittedMask = 0xffff;
|
||||||
|
HALR->structured.autoSCSIData.u16FastPermittedMask = 0xffff;
|
||||||
|
HALR->structured.autoSCSIData.u16SynchronousPermittedMask = 0xffff;
|
||||||
|
HALR->structured.autoSCSIData.u16DisconnectPermittedMask = 0xffff;
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.uPCIInterruptPin = PCI_INTB;
|
||||||
|
HALR->structured.autoSCSIData.fVesaBusSpeedGreaterThan33MHz = 1;
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.uAutoSCSIMaximumLUN = 7;
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.fForceBusDeviceScanningOrder = 1;
|
||||||
|
HALR->structured.autoSCSIData.uReserved12 = 0x7f;
|
||||||
|
|
||||||
|
HALR->structured.autoSCSIData.fInt13Extension = safe ? 0 : 1;
|
||||||
|
HALR->structured.autoSCSIData.fCDROMBoot = safe ? 0 : 1;
|
||||||
|
HALR->structured.autoSCSIData.fMultiBoot = safe ? 0 : 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
static void
|
static void
|
||||||
BuslogicClearInterrupt(Buslogic_t *bl)
|
BuslogicClearInterrupt(Buslogic_t *bl)
|
||||||
{
|
{
|
||||||
@@ -645,7 +756,7 @@ BuslogicResetControl(Buslogic_t *bl, uint8_t Reset)
|
|||||||
bl->Status |= STAT_STST;
|
bl->Status |= STAT_STST;
|
||||||
bl->Status &= ~STAT_IDLE;
|
bl->Status &= ~STAT_IDLE;
|
||||||
}
|
}
|
||||||
BuslogicResetCallback = BUSLOGIC_RESET_DURATION_NS * TIMER_USEC;
|
BuslogicResetCallback = BUSLOGIC_RESET_DURATION_US * TIMER_USEC;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -1590,14 +1701,7 @@ BuslogicRead(uint16_t Port, void *p)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case 1:
|
case 1:
|
||||||
if (bl->UseLocalRAM && (bl->Command == 0x91))
|
Temp = bl->DataBuf[bl->DataReply];
|
||||||
{
|
|
||||||
Temp = bl->LocalRAM.u8View[bl->DataReply];
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
Temp = bl->DataBuf[bl->DataReply];
|
|
||||||
}
|
|
||||||
if (bl->DataReplyLeft)
|
if (bl->DataReplyLeft)
|
||||||
{
|
{
|
||||||
bl->DataReply++;
|
bl->DataReply++;
|
||||||
@@ -1617,7 +1721,8 @@ BuslogicRead(uint16_t Port, void *p)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Port < 0x1000) {
|
/* if (Port < 0x1000) { */
|
||||||
|
if (Port & 3) {
|
||||||
pclog("Buslogic: Read Port 0x%02X, Returned Value %02X\n",
|
pclog("Buslogic: Read Port 0x%02X, Returned Value %02X\n",
|
||||||
Port, Temp);
|
Port, Temp);
|
||||||
}
|
}
|
||||||
@@ -1640,6 +1745,29 @@ BuslogicReadL(uint16_t Port, void *p)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static uint8_t
|
||||||
|
BuslogicMemRead(uint32_t addr, void *p)
|
||||||
|
{
|
||||||
|
pclog("BuslogicMemRead(%08X, %08X)\n", addr, p);
|
||||||
|
return BuslogicRead(addr & 3, p);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static uint16_t
|
||||||
|
BuslogicMemReadW(uint32_t addr, void *p)
|
||||||
|
{
|
||||||
|
pclog("BuslogicMemReadW(%08X, %08X)\n", addr, p);
|
||||||
|
return BuslogicReadW(addr & 3, p);
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint32_t
|
||||||
|
BuslogicMemReadL(uint32_t addr, void *p)
|
||||||
|
{
|
||||||
|
pclog("BuslogicMemReadL(%08X, %08X)\n", addr, p);
|
||||||
|
return BuslogicReadL(addr & 3, p);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
static void BuslogicWriteW(uint16_t Port, uint16_t Val, void *p);
|
static void BuslogicWriteW(uint16_t Port, uint16_t Val, void *p);
|
||||||
static void BuslogicWriteL(uint16_t Port, uint32_t Val, void *p);
|
static void BuslogicWriteL(uint16_t Port, uint32_t Val, void *p);
|
||||||
static void
|
static void
|
||||||
@@ -1659,6 +1787,7 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
int cCharsToTransfer;
|
int cCharsToTransfer;
|
||||||
uint16_t cyl = 0;
|
uint16_t cyl = 0;
|
||||||
uint8_t temp = 0;
|
uint8_t temp = 0;
|
||||||
|
FILE *f;
|
||||||
|
|
||||||
pclog("Buslogic: Write Port 0x%02X, Value %02X\n", Port, Val);
|
pclog("Buslogic: Write Port 0x%02X, Value %02X\n", Port, Val);
|
||||||
|
|
||||||
@@ -1784,6 +1913,7 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
if (!bl->CmdParamLeft)
|
if (!bl->CmdParamLeft)
|
||||||
{
|
{
|
||||||
SpecificLog("Running Operation Code 0x%02X\n", bl->Command);
|
SpecificLog("Running Operation Code 0x%02X\n", bl->Command);
|
||||||
|
bl->DataReply = 0;
|
||||||
switch (bl->Command) {
|
switch (bl->Command) {
|
||||||
case 0x00:
|
case 0x00:
|
||||||
bl->DataReplyLeft = 0;
|
bl->DataReplyLeft = 0;
|
||||||
@@ -1828,8 +1958,8 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
pclog("Inquire Board\n");
|
pclog("Inquire Board\n");
|
||||||
bl->DataBuf[0] = 0x41;
|
bl->DataBuf[0] = 0x41;
|
||||||
bl->DataBuf[1] = 0x41;
|
bl->DataBuf[1] = 0x41;
|
||||||
bl->DataBuf[2] = '2';
|
bl->DataBuf[2] = (bl->chip == CHIP_BUSLOGIC_PCI) ? '5' : '2';
|
||||||
bl->DataBuf[3] = '2';
|
bl->DataBuf[3] = (bl->chip == CHIP_BUSLOGIC_PCI) ? '0' : '2';
|
||||||
bl->DataReplyLeft = 4;
|
bl->DataReplyLeft = 4;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -1871,7 +2001,7 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
for (i=0; i<8; i++) {
|
for (i=0; i<8; i++) {
|
||||||
bl->DataBuf[i] = 0;
|
bl->DataBuf[i] = 0;
|
||||||
for (j=0; j<8; j++) {
|
for (j=0; j<8; j++) {
|
||||||
if (scsi_device_present(i, j))
|
if (scsi_device_present(i, j) && (i != 7))
|
||||||
bl->DataBuf[i] |= (1 << j);
|
bl->DataBuf[i] |= (1 << j);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -1889,8 +2019,7 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
bl->DataBuf[1] = 0;
|
bl->DataBuf[1] = 0;
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
/* bl->DataBuf[2] = 7; */ /* HOST ID */
|
bl->DataBuf[2] = 7; /* HOST ID */
|
||||||
bl->DataBuf[2] = 15; /* HOST ID */
|
|
||||||
bl->DataReplyLeft = 3;
|
bl->DataReplyLeft = 3;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -1972,7 +2101,6 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
bl->DataBuf[i-8] |= (1<<j);
|
bl->DataBuf[i-8] |= (1<<j);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
bl->DataBuf[7] = 0;
|
|
||||||
bl->DataReplyLeft = 8;
|
bl->DataReplyLeft = 8;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -1981,7 +2109,7 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
uint16_t TargetsPresentMask = 0;
|
uint16_t TargetsPresentMask = 0;
|
||||||
|
|
||||||
for (i=0; i<15; i++) {
|
for (i=0; i<15; i++) {
|
||||||
if (scsi_device_present(i, j))
|
if (scsi_device_present(i, 0) && (i != 7))
|
||||||
TargetsPresentMask |= (1 << i);
|
TargetsPresentMask |= (1 << i);
|
||||||
}
|
}
|
||||||
bl->DataBuf[0] = TargetsPresentMask & 0xFF;
|
bl->DataBuf[0] = TargetsPresentMask & 0xFF;
|
||||||
@@ -2033,12 +2161,12 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x84:
|
case 0x84:
|
||||||
bl->DataBuf[0] = '1';
|
bl->DataBuf[0] = (bl->chip == CHIP_BUSLOGIC_PCI) ? '7' : '1';
|
||||||
bl->DataReplyLeft = 1;
|
bl->DataReplyLeft = 1;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x85:
|
case 0x85:
|
||||||
bl->DataBuf[0] = 'E';
|
bl->DataBuf[0] = (bl->chip == CHIP_BUSLOGIC_PCI) ? 'B' : 'E';
|
||||||
bl->DataReplyLeft = 1;
|
bl->DataReplyLeft = 1;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -2087,9 +2215,9 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
memset(bl->DataBuf, 0, bl->DataReplyLeft);
|
memset(bl->DataBuf, 0, bl->DataReplyLeft);
|
||||||
if (bl->chip == CHIP_BUSLOGIC_PCI) {
|
if (bl->chip == CHIP_BUSLOGIC_PCI) {
|
||||||
aModelName[0] = '9';
|
aModelName[0] = '9';
|
||||||
aModelName[1] = '5';
|
aModelName[1] = '4';
|
||||||
aModelName[2] = '8';
|
aModelName[2] = '6';
|
||||||
aModelName[3] = 'D';
|
aModelName[3] = 'C';
|
||||||
}
|
}
|
||||||
cCharsToTransfer = bl->DataReplyLeft <= sizeof(aModelName)
|
cCharsToTransfer = bl->DataReplyLeft <= sizeof(aModelName)
|
||||||
? bl->DataReplyLeft
|
? bl->DataReplyLeft
|
||||||
@@ -2127,7 +2255,7 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
ReplyIESI->fLevelSensitiveInterrupt = 1;
|
ReplyIESI->fLevelSensitiveInterrupt = 1;
|
||||||
ReplyIESI->fHostUltraSCSI = 1;
|
ReplyIESI->fHostUltraSCSI = 1;
|
||||||
}
|
}
|
||||||
memcpy(ReplyIESI->aFirmwareRevision, "21E", sizeof(ReplyIESI->aFirmwareRevision));
|
memcpy(ReplyIESI->aFirmwareRevision, (bl->chip == CHIP_BUSLOGIC_PCI) ? "07B" : "21E", sizeof(ReplyIESI->aFirmwareRevision));
|
||||||
SpecificLog("Return Extended Setup Information: %d\n", bl->CmdBuf[0]);
|
SpecificLog("Return Extended Setup Information: %d\n", bl->CmdBuf[0]);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -2148,28 +2276,65 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
|
|||||||
|
|
||||||
case 0x90:
|
case 0x90:
|
||||||
pclog("Store Local RAM\n");
|
pclog("Store Local RAM\n");
|
||||||
|
|
||||||
Offset = bl->CmdBuf[0];
|
Offset = bl->CmdBuf[0];
|
||||||
bl->DataReplyLeft = 0;
|
bl->DataReplyLeft = 0;
|
||||||
|
memcpy(&(bl->LocalRAM.u8View[Offset]), &(bl->CmdBuf[2]), bl->CmdBuf[1]);
|
||||||
for (i = 0; i < bl->CmdBuf[1]; i++)
|
|
||||||
{
|
bl->DataReply = 0;
|
||||||
bl->LocalRAM.u8View[Offset + i] = bl->CmdBuf[i + 2];
|
|
||||||
}
|
|
||||||
|
|
||||||
bl->UseLocalRAM = 0;
|
|
||||||
bl->DataReply = Offset;
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x91:
|
case 0x91:
|
||||||
pclog("Fetch Local RAM\n");
|
pclog("Fetch Local RAM\n");
|
||||||
Offset = bl->CmdBuf[0];
|
Offset = bl->CmdBuf[0];
|
||||||
bl->DataReplyLeft = bl->CmdBuf[1];
|
bl->DataReplyLeft = bl->CmdBuf[1];
|
||||||
|
memcpy(bl->DataBuf, &(bl->LocalRAM.u8View[Offset]), bl->CmdBuf[1]);
|
||||||
bl->UseLocalRAM = 1;
|
|
||||||
bl->DataReply = Offset;
|
bl->DataReply = 0;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case 0x92:
|
||||||
|
bl->DataReplyLeft = 0;
|
||||||
|
|
||||||
|
switch (bl->CmdBuf[0])
|
||||||
|
{
|
||||||
|
case 0:
|
||||||
|
case 2:
|
||||||
|
BuslogicInitializeAutoSCSIRam(bl, 0);
|
||||||
|
break;
|
||||||
|
case 3:
|
||||||
|
BuslogicInitializeAutoSCSIRam(bl, 3);
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
f = nvrfopen(BuslogicGetNVRFileName(bl), L"wb");
|
||||||
|
if (f)
|
||||||
|
{
|
||||||
|
fwrite(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f);
|
||||||
|
fclose(f);
|
||||||
|
f = NULL;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
bl->Status |= STAT_INVCMD;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x94:
|
||||||
|
if (bl->CmdBuf[0])
|
||||||
|
{
|
||||||
|
SpecificLog("Invalid AutoSCSI command mode %x\n", bl->CmdBuf[0]);
|
||||||
|
bl->DataReplyLeft = 0;
|
||||||
|
bl->Status |= STAT_INVCMD;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
bl->DataReplyLeft = bl->CmdBuf[2];
|
||||||
|
bl->DataReplyLeft <<= 8;
|
||||||
|
bl->DataReplyLeft |= bl->CmdBuf[1];
|
||||||
|
memcpy(bl->DataBuf, bl->AutoSCSIROM, bl->DataReplyLeft);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
case 0x95:
|
case 0x95:
|
||||||
if (bl->chip == CHIP_BUSLOGIC_PCI) {
|
if (bl->chip == CHIP_BUSLOGIC_PCI) {
|
||||||
if (bl->Base != 0) {
|
if (bl->Base != 0) {
|
||||||
@@ -2276,6 +2441,30 @@ BuslogicWriteL(uint16_t Port, uint32_t Val, void *p)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static void
|
||||||
|
BuslogicMemWrite(uint32_t addr, uint8_t Val, void *p)
|
||||||
|
{
|
||||||
|
pclog("BuslogicMemWrite(%08X, %02X, %08X)\n", addr, Val, p);
|
||||||
|
BuslogicWrite(addr & 3, Val, p);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static void
|
||||||
|
BuslogicMemWriteW(uint32_t addr, uint16_t Val, void *p)
|
||||||
|
{
|
||||||
|
pclog("BuslogicMemWriteW(%08X, %04X, %08X)\n", addr, Val, p);
|
||||||
|
BuslogicWriteW(addr & 3, Val, p);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static void
|
||||||
|
BuslogicMemWriteL(uint32_t addr, uint32_t Val, void *p)
|
||||||
|
{
|
||||||
|
pclog("BuslogicMemWriteL(%08X, %08X, %08X)\n", addr, Val, p);
|
||||||
|
BuslogicWriteL(addr & 3, Val, p);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
static void
|
static void
|
||||||
BuslogicSenseBufferFree(Req_t *req, int Copy)
|
BuslogicSenseBufferFree(Req_t *req, int Copy)
|
||||||
{
|
{
|
||||||
@@ -2551,27 +2740,6 @@ BuslogicCommandCallback(void *p)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static uint8_t
|
|
||||||
mem_read_null(uint32_t addr, void *priv)
|
|
||||||
{
|
|
||||||
return(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static uint16_t
|
|
||||||
mem_read_nullw(uint32_t addr, void *priv)
|
|
||||||
{
|
|
||||||
return(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static uint32_t
|
|
||||||
mem_read_nulll(uint32_t addr, void *priv)
|
|
||||||
{
|
|
||||||
return(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
typedef union {
|
typedef union {
|
||||||
uint32_t addr;
|
uint32_t addr;
|
||||||
uint8_t addr_regs[4];
|
uint8_t addr_regs[4];
|
||||||
@@ -2597,9 +2765,9 @@ BuslogicBIOSUpdate(Buslogic_t *bl)
|
|||||||
mem_mapping_enable(&bl->bios.mapping);
|
mem_mapping_enable(&bl->bios.mapping);
|
||||||
mem_mapping_set_addr(&bl->bios.mapping,
|
mem_mapping_set_addr(&bl->bios.mapping,
|
||||||
bl->bios_addr, bl->bios_size);
|
bl->bios_addr, bl->bios_size);
|
||||||
pclog("BT-958D: BIOS now at: %06X\n", bl->bios_addr);
|
pclog("BT-946C: BIOS now at: %06X\n", bl->bios_addr);
|
||||||
} else {
|
} else {
|
||||||
pclog("BT-958D: BIOS disabled\n");
|
pclog("BT-946C: BIOS disabled\n");
|
||||||
mem_mapping_disable(&bl->bios.mapping);
|
mem_mapping_disable(&bl->bios.mapping);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -2610,6 +2778,8 @@ BuslogicPCIRead(int func, int addr, void *p)
|
|||||||
{
|
{
|
||||||
Buslogic_t *bl = (Buslogic_t *)p;
|
Buslogic_t *bl = (Buslogic_t *)p;
|
||||||
|
|
||||||
|
pclog("BT-946C: Reading register %02X\n", addr & 0xff);
|
||||||
|
|
||||||
switch (addr) {
|
switch (addr) {
|
||||||
case 0x00:
|
case 0x00:
|
||||||
return 0x4b;
|
return 0x4b;
|
||||||
@@ -2632,7 +2802,9 @@ BuslogicPCIRead(int func, int addr, void *p)
|
|||||||
case 0x0A:
|
case 0x0A:
|
||||||
return 0; /*Subclass*/
|
return 0; /*Subclass*/
|
||||||
case 0x0B:
|
case 0x0B:
|
||||||
return 1; /* Class code*/
|
return 1; /*Class code*/
|
||||||
|
case 0x0E:
|
||||||
|
return 0; /*Header type */
|
||||||
case 0x10:
|
case 0x10:
|
||||||
return (buslogic_pci_bar[0].addr_regs[0] & 0xe0) | 1; /*I/O space*/
|
return (buslogic_pci_bar[0].addr_regs[0] & 0xe0) | 1; /*I/O space*/
|
||||||
case 0x11:
|
case 0x11:
|
||||||
@@ -2659,18 +2831,18 @@ BuslogicPCIRead(int func, int addr, void *p)
|
|||||||
return 0x10;
|
return 0x10;
|
||||||
#if 0
|
#if 0
|
||||||
case 0x30: /* PCI_ROMBAR */
|
case 0x30: /* PCI_ROMBAR */
|
||||||
pclog("BT-958D: BIOS BAR 00 = %02X\n", buslogic_pci_bar[2].addr_regs[0] & 0x01);
|
pclog("BT-946C: BIOS BAR 00 = %02X\n", buslogic_pci_bar[2].addr_regs[0] & 0x01);
|
||||||
return buslogic_pci_bar[2].addr_regs[0] & 0x01;
|
return buslogic_pci_bar[2].addr_regs[0] & 0x01;
|
||||||
case 0x31: /* PCI_ROMBAR 15:11 */
|
case 0x31: /* PCI_ROMBAR 15:11 */
|
||||||
pclog("BT-958D: BIOS BAR 01 = %02X\n", (buslogic_pci_bar[2].addr_regs[1] & bl->bios_mask));
|
pclog("BT-946C: BIOS BAR 01 = %02X\n", (buslogic_pci_bar[2].addr_regs[1] & bl->bios_mask));
|
||||||
return (buslogic_pci_bar[2].addr_regs[1] & bl->bios_mask);
|
return (buslogic_pci_bar[2].addr_regs[1] & bl->bios_mask);
|
||||||
break;
|
break;
|
||||||
case 0x32: /* PCI_ROMBAR 23:16 */
|
case 0x32: /* PCI_ROMBAR 23:16 */
|
||||||
pclog("BT-958D: BIOS BAR 02 = %02X\n", buslogic_pci_bar[2].addr_regs[2]);
|
pclog("BT-946C: BIOS BAR 02 = %02X\n", buslogic_pci_bar[2].addr_regs[2]);
|
||||||
return buslogic_pci_bar[2].addr_regs[2];
|
return buslogic_pci_bar[2].addr_regs[2];
|
||||||
break;
|
break;
|
||||||
case 0x33: /* PCI_ROMBAR 31:24 */
|
case 0x33: /* PCI_ROMBAR 31:24 */
|
||||||
pclog("BT-958D: BIOS BAR 03 = %02X\n", buslogic_pci_bar[2].addr_regs[3]);
|
pclog("BT-946C: BIOS BAR 03 = %02X\n", buslogic_pci_bar[2].addr_regs[3]);
|
||||||
return buslogic_pci_bar[2].addr_regs[3];
|
return buslogic_pci_bar[2].addr_regs[3];
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
@@ -2690,11 +2862,13 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
|
|||||||
Buslogic_t *bl = (Buslogic_t *)p;
|
Buslogic_t *bl = (Buslogic_t *)p;
|
||||||
uint8_t valxor;
|
uint8_t valxor;
|
||||||
|
|
||||||
|
pclog("BT-946C: Write value %02X to register %02X\n", val, addr & 0xff);
|
||||||
|
|
||||||
switch (addr) {
|
switch (addr) {
|
||||||
case 0x04:
|
case 0x04:
|
||||||
valxor = (val & 0x27) ^ buslogic_pci_regs[addr];
|
valxor = (val & 0x27) ^ buslogic_pci_regs[addr];
|
||||||
if (valxor & PCI_COMMAND_IO) {
|
if (valxor & PCI_COMMAND_IO) {
|
||||||
io_removehandler(bl->PCIBase, 4,
|
io_removehandler(bl->PCIBase, 0x20,
|
||||||
BuslogicRead, BuslogicReadW, BuslogicReadL,
|
BuslogicRead, BuslogicReadW, BuslogicReadL,
|
||||||
BuslogicWrite, BuslogicWriteW, BuslogicWriteL,
|
BuslogicWrite, BuslogicWriteW, BuslogicWriteL,
|
||||||
bl);
|
bl);
|
||||||
@@ -2760,7 +2934,7 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
|
|||||||
pclog("BusLogic PCI: New MMIO base is %04X\n" , bl->MMIOBase);
|
pclog("BusLogic PCI: New MMIO base is %04X\n" , bl->MMIOBase);
|
||||||
/* We're done, so get out of the here. */
|
/* We're done, so get out of the here. */
|
||||||
if (buslogic_pci_regs[4] & PCI_COMMAND_MEM) {
|
if (buslogic_pci_regs[4] & PCI_COMMAND_MEM) {
|
||||||
if (bl->PCIBase != 0) {
|
if (bl->MMIOBase != 0) {
|
||||||
mem_mapping_set_addr(&bl->mmio_mapping,
|
mem_mapping_set_addr(&bl->mmio_mapping,
|
||||||
bl->MMIOBase, 0x20);
|
bl->MMIOBase, 0x20);
|
||||||
}
|
}
|
||||||
@@ -2775,7 +2949,7 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
|
|||||||
buslogic_pci_bar[2].addr_regs[1] &= bl->bios_mask;
|
buslogic_pci_bar[2].addr_regs[1] &= bl->bios_mask;
|
||||||
buslogic_pci_bar[2].addr &= 0xffffe001;
|
buslogic_pci_bar[2].addr &= 0xffffe001;
|
||||||
bl->bios_addr = buslogic_pci_bar[2].addr;
|
bl->bios_addr = buslogic_pci_bar[2].addr;
|
||||||
pclog("BT-958D: BIOS BAR %02X = NOW %02X (%02X)\n", addr & 3, buslogic_pci_bar[2].addr_regs[addr & 3], val);
|
pclog("BT-946C: BIOS BAR %02X = NOW %02X (%02X)\n", addr & 3, buslogic_pci_bar[2].addr_regs[addr & 3], val);
|
||||||
BuslogicBIOSUpdate(bl);
|
BuslogicBIOSUpdate(bl);
|
||||||
return;
|
return;
|
||||||
#endif
|
#endif
|
||||||
@@ -2811,8 +2985,6 @@ BuslogicInitializeLocalRAM(Buslogic_t *bl)
|
|||||||
{
|
{
|
||||||
bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 0;
|
bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 0;
|
||||||
}
|
}
|
||||||
bl->LocalRAM.structured.autoSCSIData.fParityCheckingEnabled = 1;
|
|
||||||
bl->LocalRAM.structured.autoSCSIData.fExtendedTranslation = 1;
|
|
||||||
bl->LocalRAM.structured.autoSCSIData.u16DeviceEnabledMask = ~0;
|
bl->LocalRAM.structured.autoSCSIData.u16DeviceEnabledMask = ~0;
|
||||||
bl->LocalRAM.structured.autoSCSIData.u16WidePermittedMask = ~0;
|
bl->LocalRAM.structured.autoSCSIData.u16WidePermittedMask = ~0;
|
||||||
bl->LocalRAM.structured.autoSCSIData.u16FastPermittedMask = ~0;
|
bl->LocalRAM.structured.autoSCSIData.u16FastPermittedMask = ~0;
|
||||||
@@ -2827,6 +2999,7 @@ static void *
|
|||||||
BuslogicInit(int chip)
|
BuslogicInit(int chip)
|
||||||
{
|
{
|
||||||
Buslogic_t *bl;
|
Buslogic_t *bl;
|
||||||
|
FILE *f;
|
||||||
|
|
||||||
bl = malloc(sizeof(Buslogic_t));
|
bl = malloc(sizeof(Buslogic_t));
|
||||||
memset(bl, 0x00, sizeof(Buslogic_t));
|
memset(bl, 0x00, sizeof(Buslogic_t));
|
||||||
@@ -2871,7 +3044,18 @@ BuslogicInit(int chip)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
rom_init(&bl->bios, L"roms/scsi/buslogic/494GNPCI.ROM", 0xd8000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
|
/* rom_init(&bl->bios, L"roms/scsi/buslogic/428A494G.BIN", 0xd8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); */
|
||||||
|
/* rom_init(&bl->bios, L"roms/scsi/buslogic/BT9X6C_BIOS.rom", 0xd8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); */
|
||||||
|
rom_init(&bl->bios, L"roms/scsi/buslogic/Womper97.rom", 0xd8000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
|
||||||
|
}
|
||||||
|
|
||||||
|
memset(bl->AutoSCSIROM, 0xff, 32768);
|
||||||
|
f = romfopen(L"roms/scsi/buslogic/AutoSCSI.rom", L"rb");
|
||||||
|
if (f)
|
||||||
|
{
|
||||||
|
fread(bl->AutoSCSIROM, 1, 32768, f);
|
||||||
|
fclose(f);
|
||||||
|
f = NULL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
@@ -2880,7 +3064,7 @@ BuslogicInit(int chip)
|
|||||||
|
|
||||||
bl->bios_mask = 0;
|
bl->bios_mask = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
timer_add(BuslogicResetPoll,
|
timer_add(BuslogicResetPoll,
|
||||||
&BuslogicResetCallback, &BuslogicResetCallback, bl);
|
&BuslogicResetCallback, &BuslogicResetCallback, bl);
|
||||||
timer_add(BuslogicCommandCallback,
|
timer_add(BuslogicCommandCallback,
|
||||||
@@ -2910,8 +3094,8 @@ BuslogicInit(int chip)
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
mem_mapping_add(&bl->mmio_mapping, 0xfffd0000, 0x20,
|
mem_mapping_add(&bl->mmio_mapping, 0xfffd0000, 0x20,
|
||||||
mem_read_null, mem_read_nullw, mem_read_nulll,
|
BuslogicMemRead, BuslogicMemReadW, BuslogicMemReadL,
|
||||||
mem_write_null, mem_write_nullw, mem_write_nulll,
|
BuslogicMemWrite, BuslogicMemWriteW, BuslogicMemWriteL,
|
||||||
NULL, MEM_MAPPING_EXTERNAL, bl);
|
NULL, MEM_MAPPING_EXTERNAL, bl);
|
||||||
mem_mapping_disable(&bl->mmio_mapping);
|
mem_mapping_disable(&bl->mmio_mapping);
|
||||||
#if 0
|
#if 0
|
||||||
@@ -2923,6 +3107,18 @@ BuslogicInit(int chip)
|
|||||||
|
|
||||||
BuslogicResetControl(bl, CTRL_HRST);
|
BuslogicResetControl(bl, CTRL_HRST);
|
||||||
BuslogicInitializeLocalRAM(bl);
|
BuslogicInitializeLocalRAM(bl);
|
||||||
|
|
||||||
|
f = nvrfopen(BuslogicGetNVRFileName(bl), L"rb");
|
||||||
|
if (f)
|
||||||
|
{
|
||||||
|
fread(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f);
|
||||||
|
fclose(f);
|
||||||
|
f = NULL;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
BuslogicInitializeAutoSCSIRam(bl, 0);
|
||||||
|
}
|
||||||
|
|
||||||
return(bl);
|
return(bl);
|
||||||
}
|
}
|
||||||
@@ -2936,7 +3132,7 @@ Buslogic_542B_Init(void)
|
|||||||
|
|
||||||
|
|
||||||
static void *
|
static void *
|
||||||
Buslogic_958D_Init(void)
|
Buslogic_946C_Init(void)
|
||||||
{
|
{
|
||||||
return BuslogicInit(CHIP_BUSLOGIC_PCI);
|
return BuslogicInit(CHIP_BUSLOGIC_PCI);
|
||||||
}
|
}
|
||||||
@@ -3046,9 +3242,9 @@ device_t buslogic_device = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
device_t buslogic_pci_device = {
|
device_t buslogic_pci_device = {
|
||||||
"Buslogic BT-958D PCI",
|
"Buslogic BT-946C PCI",
|
||||||
0,
|
0,
|
||||||
Buslogic_958D_Init,
|
Buslogic_946C_Init,
|
||||||
BuslogicClose,
|
BuslogicClose,
|
||||||
NULL,
|
NULL,
|
||||||
NULL,
|
NULL,
|
||||||
|
|||||||
@@ -307,13 +307,13 @@ int scsi_hd_read_capacity(uint8_t id, uint8_t *cdb, uint8_t *buffer, uint32_t *l
|
|||||||
buffer[3] = size & 0xff;
|
buffer[3] = size & 0xff;
|
||||||
buffer[6] = 2; /* 512 = 0x0200 */
|
buffer[6] = 2; /* 512 = 0x0200 */
|
||||||
*len = 8;
|
*len = 8;
|
||||||
|
|
||||||
pclog("Read Capacity\n");
|
scsi_hd_log("Read Capacity\n");
|
||||||
pclog("buffer[0]=%x\n", buffer[0]);
|
scsi_hd_log("buffer[0]=%x\n", buffer[0]);
|
||||||
pclog("buffer[1]=%x\n", buffer[1]);
|
scsi_hd_log("buffer[1]=%x\n", buffer[1]);
|
||||||
pclog("buffer[2]=%x\n", buffer[2]);
|
scsi_hd_log("buffer[2]=%x\n", buffer[2]);
|
||||||
pclog("buffer[3]=%x\n", buffer[3]);
|
scsi_hd_log("buffer[3]=%x\n", buffer[3]);
|
||||||
|
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user