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PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).

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This commit is contained in:
OBattler
2020-10-14 23:15:01 +02:00
parent 01362b3dc6
commit 795a6017d2
80 changed files with 2811 additions and 2163 deletions
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88
src/chipset/via_vt82c505.c
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@@ -10,12 +10,12 @@
*
*
*
* Authors: Tiseno100
*
* Copyright 2020 Tiseno100
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020 Tiseno100.
* Copyright 2020 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
@@ -24,15 +24,18 @@
#include <86box/86box.h>
#include <86box/mem.h>
#include <86box/io.h>
#include <86box/pic.h>
#include <86box/pci.h>
#include <86box/device.h>
#include <86box/chipset.h>
typedef struct vt82c505_t
{
uint8_t pci_conf[256];
} vt82c505_t;
static void
vt82c505_write(int func, int addr, uint8_t val, void *priv)
{
@@ -40,55 +43,51 @@ vt82c505_write(int func, int addr, uint8_t val, void *priv)
vt82c505_t *dev = (vt82c505_t *) priv;
/* Read-Only Registers */
switch (addr)
{
case 0x00: case 0x01:
case 0x02: case 0x03:
return;
switch (addr) {
case 0x00: case 0x01:
case 0x02: case 0x03:
return;
}
switch(addr)
{
switch(addr) {
case 0x04:
dev->pci_conf[0x04] = (dev->pci_conf[0x04] & ~0x07) | (val & 0x07);
break;
case 0x04:
dev->pci_conf[0x04] = (dev->pci_conf[0x04] & ~0x07) | (val & 0x07);
break;
case 0x07:
dev->pci_conf[0x07] = (dev->pci_conf[0x07] & ~0x90) | (val & 0x90);
break;
case 0x07:
dev->pci_conf[0x07] &= ~(val & 0x90);
break;
case 0x90:
if((dev->pci_conf[0x90] & 0x08) && ((val & 0x07) != 0))
pci_set_irq_routing(PCI_INTC, val & 0x07);
else
pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
if ((dev->pci_conf[0x90] & 0x08) && ((val & 0x07) != 0))
pci_set_irq_routing(PCI_INTC, val & 0x07);
else
pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
if((dev->pci_conf[0x90] & 0x80) && (((val & 0x07) << 4) != 0))
pci_set_irq_routing(PCI_INTD, ((val & 0x07) << 4));
else
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
break;
if ((dev->pci_conf[0x90] & 0x80) && (((val & 0x07) << 4) != 0))
pci_set_irq_routing(PCI_INTD, ((val & 0x07) << 4));
else
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
break;
case 0x91:
if((dev->pci_conf[0x91] & 0x08) && ((val & 0x07) != 0))
pci_set_irq_routing(PCI_INTA, val & 0x07);
else
pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
if((dev->pci_conf[0x91] & 0x80) && (((val & 0x07) << 4) != 0))
pci_set_irq_routing(PCI_INTB, ((val & 0x07) << 4));
else
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
break;
case 0x91:
if ((dev->pci_conf[0x91] & 0x08) && ((val & 0x07) != 0))
pci_set_irq_routing(PCI_INTA, val & 0x07);
else
pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
if ((dev->pci_conf[0x91] & 0x80) && (((val & 0x07) << 4) != 0))
pci_set_irq_routing(PCI_INTB, ((val & 0x07) << 4));
else
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
break;
}
}
static uint8_t
vt82c505_read(int func, int addr, void *priv)
{
vt82c505_t *dev = (vt82c505_t *) priv;
uint8_t ret = 0xff;
@@ -97,17 +96,19 @@ vt82c505_read(int func, int addr, void *priv)
return ret;
}
static void
vt82c505_reset(void *priv)
{
pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
pic_reset();
}
static void
vt82c505_close(void *priv)
{
@@ -116,10 +117,10 @@ vt82c505_close(void *priv)
free(dev);
}
static void *
vt82c505_init(const device_t *info)
{
vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t));
memset(dev, 0, sizeof(vt82c505_t));
@@ -132,21 +133,18 @@ vt82c505_init(const device_t *info)
dev->pci_conf[0x03] = 0x05;
dev->pci_conf[0x04] = 0x07;
dev->pci_conf[0x05] = 0x00;
dev->pci_conf[0x06] = 0x00;
dev->pci_conf[0x07] = 0x90;
dev->pci_conf[0x81] = 0x01;
dev->pci_conf[0x84] = 0x03;
dev->pci_conf[0x85] = 0x00;
dev->pci_conf[0x93] = 0x40;
return dev;
}
const device_t via_vt82c505_device = {
"VIA VT82C505",
DEVICE_PCI,