PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy).
This commit is contained in:
OBattler
115
src/pci.c
115
src/pci.c
@@ -57,8 +57,7 @@ int pci_burst_time,
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static pci_card_t pci_cards[32];
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static uint8_t pci_pmc = 0, last_pci_card = 0, last_normal_pci_card = 0, last_pci_bus = 1;
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static uint8_t pci_card_to_slot_mapping[256][32], pci_bus_number_to_index_mapping[256];
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static uint8_t elcr[2] = { 0, 0 };
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static uint8_t pci_irqs[4], pci_irq_level[4];
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static uint8_t pci_irqs[16], pci_irq_level[16];
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static uint64_t pci_irq_hold[16];
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static pci_mirq_t pci_mirqs[3];
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static int pci_type,
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@@ -69,7 +68,7 @@ static int pci_type,
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pci_bus,
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pci_enable,
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pci_key;
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static int trc_reg = 0, elcr_enabled = 1;
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static int trc_reg = 0;
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static void pci_reset_regs(void);
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@@ -128,21 +127,21 @@ pci_write(uint16_t port, uint8_t val, void *priv)
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if (! pci_enable)
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return;
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pci_log("Writing %02X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index);
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pci_log("Writing %02X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3));
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slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card];
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if (slot != 0xff) {
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if (pci_cards[slot].write) {
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pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
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pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
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pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
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}
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#ifdef ENABLE_PCI_LOG
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else
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pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
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pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
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#endif
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}
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#ifdef ENABLE_PCI_LOG
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else
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pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
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pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
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#endif
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break;
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@@ -170,65 +169,21 @@ pci_read(uint16_t port, void *priv)
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ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv);
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#ifdef ENABLE_PCI_LOG
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else
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pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
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pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
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#endif
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}
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#ifdef ENABLE_PCI_LOG
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else
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pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
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pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
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#endif
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}
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pci_log("Reading %02X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index);
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pci_log("Reading %02X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3));
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return ret;
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}
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void
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elcr_write(uint16_t port, uint8_t val, void *priv)
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{
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pci_log("ELCR%i: WRITE %02X\n", port & 1, val);
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if (port & 1)
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val &= 0xde;
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else
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val &= 0xf8;
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elcr[port & 1] = val;
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pci_log("ELCR %i: %c %c %c %c %c %c %c %c\n",
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port & 1,
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(val & 1) ? 'L' : 'E',
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(val & 2) ? 'L' : 'E',
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(val & 4) ? 'L' : 'E',
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(val & 8) ? 'L' : 'E',
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(val & 0x10) ? 'L' : 'E',
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(val & 0x20) ? 'L' : 'E',
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(val & 0x40) ? 'L' : 'E',
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(val & 0x80) ? 'L' : 'E');
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}
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uint8_t
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elcr_read(uint16_t port, void *priv)
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{
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pci_log("ELCR%i: READ %02X\n", port & 1, elcr[port & 1]);
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return elcr[port & 1];
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}
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static void
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elcr_reset(void)
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{
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pic_reset();
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elcr[0] = 0x00;
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elcr[1] = 0x00;
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}
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static void pci_type2_write(uint16_t port, uint8_t val, void *priv);
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static uint8_t pci_type2_read(uint16_t port, void *priv);
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@@ -359,28 +314,6 @@ pci_set_mirq_routing(int mirq, int irq)
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}
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int
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pci_irq_is_level(int irq)
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{
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int real_irq = irq & 7;
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if (elcr_enabled) {
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if ((irq <= 2) || (irq == 8) || (irq == 13))
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return 0;
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if (irq > 7)
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return !!(elcr[1] & (1 << real_irq));
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return !!(elcr[0] & (1 << real_irq));
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} else {
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if (irq < 8)
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return (pic.icw1 & 8) ? 1 : 0;
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else
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return (pic2.icw1 & 8) ? 1 : 0;
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}
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}
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uint8_t
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pci_use_mirq(uint8_t mirq)
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{
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@@ -484,7 +417,7 @@ pci_set_irq(uint8_t card, uint8_t pci_int)
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} else
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pci_log("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
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if (pci_irq_is_level(irq_line) && (pci_irq_hold[irq_line] & (1ULL << slot))) {
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if (picint_is_level(irq_line) && (pci_irq_hold[irq_line] & (1ULL << slot))) {
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/* IRQ already held, do nothing. */
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pci_log("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int);
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return;
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@@ -633,21 +566,6 @@ pci_get_int(uint8_t slot, uint8_t pci_int)
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}
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void
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pci_elcr_set_enabled(int enabled)
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{
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elcr_enabled = enabled;
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}
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void
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pci_elcr_io_disable(void)
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{
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io_removehandler(0x04d0, 0x0002,
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elcr_read,NULL,NULL, elcr_write,NULL,NULL, NULL);
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}
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static void
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pci_reset_regs(void)
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{
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@@ -674,7 +592,7 @@ pci_reset_hard(void)
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}
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}
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elcr_reset();
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pic_reset();
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}
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@@ -832,9 +750,12 @@ pci_init(int type)
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pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
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}
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if (!(type & PCI_NO_IRQ_STEERING)) {
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io_sethandler(0x04d0, 0x0002,
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elcr_read,NULL,NULL, elcr_write,NULL,NULL, NULL);
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if (type & PCI_NO_IRQ_STEERING) {
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pic_elcr_io_handler(0);
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pic_elcr_set_enabled(0);
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} else {
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pic_elcr_io_handler(1);
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pic_elcr_set_enabled(1);
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}
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if ((type & PCI_CONFIG_TYPE_MASK) == PCI_CONFIG_TYPE_1) {
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@@ -858,8 +779,6 @@ pci_init(int type)
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pci_mirqs[c].enabled = 0;
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pci_mirqs[c].irq_line = PCI_IRQ_DISABLED;
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}
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elcr_enabled = 1;
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}
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