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Got RAM usage down slightly further by merging in mode code from VARCem;

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Fixed the mouse.
This commit is contained in:
OBattler
2018-03-19 08:01:13 +01:00
parent 473fd383d2
commit 7d070e2930
21 changed files with 2321 additions and 1993 deletions
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40
src/cpu/808x.c
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@@ -1,10 +1,10 @@
/* /*
* 86Box A hypervisor and IBM PC system emulator that specializes in * VARCem Virtual ARchaeological Computer EMulator.
* running old operating systems and software designed for IBM * An emulator of (mostly) x86-based PC systems and devices,
* PC systems and compatibles from 1981 through fairly recent * using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* system designs based on the PCI bus. * spanning the era between 1981 and 1995.
* *
* This file is part of the 86Box distribution. * This file is part of the VARCem Project.
* *
* 808x CPU emulation. * 808x CPU emulation.
* *
@@ -18,13 +18,31 @@
* 2 clocks - fetch opcode 1 2 clocks - execute * 2 clocks - fetch opcode 1 2 clocks - execute
* 2 clocks - fetch opcode 2 etc * 2 clocks - fetch opcode 2 etc
* *
* Version: @(#)808x.c 1.0.10 2017/12/03 * Version: @(#)808x.c 1.0.2 2018/03/09
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
* *
* Copyright 2008-2017 Sarah Walker. * Copyright 2008-2018 Sarah Walker.
* Copyright 2016,2017 Miran Grca. * Copyright 2016-2018 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/ */
#include <stdio.h> #include <stdio.h>
#include <stdint.h> #include <stdint.h>
@@ -1212,7 +1230,7 @@ void execx86(int cycs)
break; break;
case 0x14: /*ADC AL,#8*/ case 0x14: /*ADC AL,#8*/
tempw=FETCH(); tempw=FETCH();
setadc8(AL,tempw); setadc8(AL,tempw & 0xff);
AL+=tempw+tempc; AL+=tempw+tempc;
cycles-=4; cycles-=4;
break; break;
@@ -2950,7 +2968,7 @@ void execx86(int cycs)
if (temp) if (temp)
{ {
tempw2=tempw%temp; tempw2=tempw%temp;
AH=tempw2; AH=tempw2 & 0xff;
tempw/=temp; tempw/=temp;
AL=tempw&0xFF; AL=tempw&0xFF;
} }

38
src/cpu/codegen.h
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@@ -1,3 +1,39 @@
/*
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the VARCem Project.
*
* Definitions for the code generator.
*
* Version: @(#)codegen.h 1.0.2 2018/03/14
*
* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#ifndef _CODEGEN_H_ #ifndef _CODEGEN_H_
#define _CODEGEN_H_ #define _CODEGEN_H_
@@ -267,7 +303,7 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t
void codegen_generate_seg_restore(); void codegen_generate_seg_restore();
void codegen_set_op32(); void codegen_set_op32();
void codegen_flush(); void codegen_flush();
void codegen_check_flush(struct page_t *page, uint64_t mask, uint32_t phys_addr); void codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr);
extern int cpu_block_end; extern int cpu_block_end;
extern uint32_t codegen_endpc; extern uint32_t codegen_endpc;

59
src/disk/hdc.c
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@@ -8,7 +8,7 @@
* *
* Common code to handle all sorts of disk controllers. * Common code to handle all sorts of disk controllers.
* *
* Version: @(#)hdc.c 1.0.11 2018/03/18 * Version: @(#)hdc.c 1.0.12 2018/03/19
* *
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
@@ -72,63 +72,63 @@ static const device_t inthdc_device = {
static const struct { static const struct {
char *name; const char *name;
char *internal_name; const char *internal_name;
const device_t *device; const device_t *device;
int is_mfm;
} controllers[] = { } controllers[] = {
{ "None", "none", { "None", "none",
&null_device, 0 }, &null_device },
{ "Internal Controller", "internal", { "Internal Controller", "internal",
&inthdc_device, 0 }, &inthdc_device },
{ "[ISA] [MFM] IBM PC Fixed Disk Adapter", "mfm_xt", { "[ISA] [MFM] IBM PC Fixed Disk Adapter", "mfm_xt",
&mfm_xt_xebec_device, 1 }, &mfm_xt_xebec_device },
{ "[ISA] [MFM] DTC-5150X Fixed Disk Adapter", "mfm_dtc5150x", { "[ISA] [MFM] DTC-5150X Fixed Disk Adapter", "mfm_dtc5150x",
&mfm_xt_dtc5150x_device, 1 }, &mfm_xt_dtc5150x_device },
{ "[ISA] [MFM] IBM PC/AT Fixed Disk Adapter", "mfm_at", { "[ISA] [MFM] IBM PC/AT Fixed Disk Adapter", "mfm_at",
&mfm_at_wd1003_device, 1 }, &mfm_at_wd1003_device },
{ "[ISA] [ESDI] PC/AT ESDI Fixed Disk Adapter", "esdi_at", { "[ISA] [ESDI] PC/AT ESDI Fixed Disk Adapter", "esdi_at",
&esdi_at_wd1007vse1_device, 0 }, &esdi_at_wd1007vse1_device },
{ "[ISA] [IDE] PC/AT IDE Adapter", "ide_isa", { "[ISA] [IDE] PC/AT IDE Adapter", "ide_isa",
&ide_isa_device, 0 }, &ide_isa_device },
{ "[ISA] [IDE] PC/AT IDE Adapter (Dual-Channel)", "ide_isa_2ch", { "[ISA] [IDE] PC/AT IDE Adapter (Dual-Channel)", "ide_isa_2ch",
&ide_isa_2ch_device, 0 }, &ide_isa_2ch_device },
{ "[ISA] [IDE] PC/AT XTIDE", "xtide_at", { "[ISA] [IDE] PC/AT XTIDE", "xtide_at",
&xtide_at_device, 0 }, &xtide_at_device },
{ "[ISA] [IDE] PS/2 AT XTIDE (1.1.5)", "xtide_at_ps2", { "[ISA] [IDE] PS/2 AT XTIDE (1.1.5)", "xtide_at_ps2",
&xtide_at_ps2_device, 0 }, &xtide_at_ps2_device },
{ "[ISA] [XT IDE] Acculogic XT IDE", "xtide_acculogic", { "[ISA] [XT IDE] Acculogic XT IDE", "xtide_acculogic",
&xtide_acculogic_device, 0 }, &xtide_acculogic_device },
{ "[ISA] [XT IDE] PC/XT XTIDE", "xtide", { "[ISA] [XT IDE] PC/XT XTIDE", "xtide",
&xtide_device , 0 }, &xtide_device },
{ "[MCA] [ESDI] IBM PS/2 ESDI Fixed Disk Adapter","esdi_mca", { "[MCA] [ESDI] IBM PS/2 ESDI Fixed Disk Adapter","esdi_mca",
&esdi_ps2_device, 1 }, &esdi_ps2_device },
{ "[PCI] [IDE] PCI IDE Adapter", "ide_pci", { "[PCI] [IDE] PCI IDE Adapter", "ide_pci",
&ide_pci_device, 0 }, &ide_pci_device },
{ "[PCI] [IDE] PCI IDE Adapter (Dual-Channel)", "ide_pci_2ch", { "[PCI] [IDE] PCI IDE Adapter (Dual-Channel)", "ide_pci_2ch",
&ide_pci_2ch_device, 0 }, &ide_pci_2ch_device },
{ "[VLB] [IDE] PC/AT IDE Adapter", "vlb_isa", { "[VLB] [IDE] PC/AT IDE Adapter", "vlb_isa",
&ide_vlb_device, 0 }, &ide_vlb_device },
{ "[VLB] [IDE] PC/AT IDE Adapter (Dual-Channel)", "vlb_isa_2ch", { "[VLB] [IDE] PC/AT IDE Adapter (Dual-Channel)", "vlb_isa_2ch",
&ide_vlb_2ch_device, 0 }, &ide_vlb_2ch_device },
{ "", "", NULL, 0 } { "", "",
NULL }
}; };
@@ -140,8 +140,8 @@ hdc_init(char *name)
pclog("HDC: initializing..\n"); pclog("HDC: initializing..\n");
for (c=0; controllers[c].device; c++) { for (c = 0; controllers[c].device; c++) {
if (! strcmp(name, controllers[c].internal_name)) { if (! strcmp(name, (char *) controllers[c].internal_name)) {
hdc_current = c; hdc_current = c;
break; break;
} }
@@ -174,14 +174,14 @@ hdc_reset(void)
char * char *
hdc_get_name(int hdc) hdc_get_name(int hdc)
{ {
return(controllers[hdc].name); return((char *) controllers[hdc].name);
} }
char * char *
hdc_get_internal_name(int hdc) hdc_get_internal_name(int hdc)
{ {
return(controllers[hdc].internal_name); return((char *) controllers[hdc].internal_name);
} }
@@ -204,10 +204,3 @@ hdc_available(int hdc)
{ {
return(device_available(controllers[hdc].device)); return(device_available(controllers[hdc].device));
} }
int
hdc_current_is_mfm(void)
{
return(controllers[hdc_current].is_mfm);
}

3
src/disk/hdc.h
View File

@@ -8,7 +8,7 @@
* *
* Definitions for the common disk controller handler. * Definitions for the common disk controller handler.
* *
* Version: @(#)hdc.h 1.0.6 2018/03/18 * Version: @(#)hdc.h 1.0.7 2018/03/19
* *
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
@@ -61,7 +61,6 @@ extern char *hdc_get_internal_name(int hdc);
extern const device_t *hdc_get_device(int hdc); extern const device_t *hdc_get_device(int hdc);
extern int hdc_get_flags(int hdc); extern int hdc_get_flags(int hdc);
extern int hdc_available(int hdc); extern int hdc_available(int hdc);
extern int hdc_current_is_mfm(void);
#endif /*EMU_HDC_H*/ #endif /*EMU_HDC_H*/

10
src/keyboard.c
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@@ -8,15 +8,15 @@
* *
* General keyboard driver interface. * General keyboard driver interface.
* *
* Version: @(#)keyboard.c 1.0.14 2018/02/10 * Version: @(#)keyboard.c 1.0.15 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
* *
* Copyright 2008-2018 Sarah Walker. * Copyright 2008-2018 Sarah Walker.
* Copyright 2016,2018 Miran Grca. * Copyright 2015-2018 Miran Grca.
* Copyright 2018 Fred N. van Kempen. * Copyright 2017,2018 Fred N. van Kempen.
*/ */
#include <stdio.h> #include <stdio.h>
#include <stdint.h> #include <stdint.h>
@@ -61,9 +61,9 @@ keyboard_init(void)
void void
keyboard_set_table(scancode *ptr) keyboard_set_table(const scancode *ptr)
{ {
scan_table = ptr; scan_table = (scancode *) ptr;
} }

6
src/keyboard.h
View File

@@ -8,7 +8,7 @@
* *
* Definitions for the keyboard interface. * Definitions for the keyboard interface.
* *
* Version: @(#)keyboard.h 1.0.12 2018/03/18 * Version: @(#)keyboard.h 1.0.13 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -51,7 +51,7 @@ extern int64_t keyboard_delay;
extern void (*keyboard_send)(uint16_t val); extern void (*keyboard_send)(uint16_t val);
extern void kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val)); extern void kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val));
extern scancode scancode_xt[512]; extern const scancode scancode_xt[512];
extern uint8_t keyboard_set3_flags[512]; extern uint8_t keyboard_set3_flags[512];
extern uint8_t keyboard_set3_all_repeat; extern uint8_t keyboard_set3_all_repeat;
@@ -73,7 +73,7 @@ extern const device_t keyboard_ps2_quadtel_device;
extern void keyboard_init(void); extern void keyboard_init(void);
extern void keyboard_close(void); extern void keyboard_close(void);
extern void keyboard_set_table(scancode *ptr); extern void keyboard_set_table(const scancode *ptr);
extern void keyboard_poll_host(void); extern void keyboard_poll_host(void);
extern void keyboard_process(void); extern void keyboard_process(void);
extern uint16_t keyboard_convert(int ch); extern uint16_t keyboard_convert(int ch);

27
src/keyboard_at.c
View File

@@ -8,7 +8,7 @@
* *
* Intel 8042 (AT keyboard controller) emulation. * Intel 8042 (AT keyboard controller) emulation.
* *
* Version: @(#)keyboard_at.c 1.0.31 2018/03/18 * Version: @(#)keyboard_at.c 1.0.32 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -154,7 +154,7 @@ static atkbd_t *CurrentKbd = NULL; // FIXME: remove!!! --FvK
/* Non-translated to translated scan codes. */ /* Non-translated to translated scan codes. */
static uint8_t nont_to_t[256] = { static const uint8_t nont_to_t[256] = {
0xFF, 0x43, 0x41, 0x3F, 0x3D, 0x3B, 0x3C, 0x58, 0xFF, 0x43, 0x41, 0x3F, 0x3D, 0x3B, 0x3C, 0x58,
0x64, 0x44, 0x42, 0x40, 0x3E, 0x0F, 0x29, 0x59, 0x64, 0x44, 0x42, 0x40, 0x3E, 0x0F, 0x29, 0x59,
0x65, 0x38, 0x2A, 0x70, 0x1D, 0x10, 0x02, 0x5A, 0x65, 0x38, 0x2A, 0x70, 0x1D, 0x10, 0x02, 0x5A,
@@ -189,7 +189,7 @@ static uint8_t nont_to_t[256] = {
0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
}; };
static scancode scancode_set1[512] = { static const scancode scancode_set1[512] = {
{ { -1},{ -1} }, { { 0x01,-1},{ 0x81,-1} }, { { 0x02,-1},{ 0x82,-1} }, { { 0x03,-1},{ 0x83,-1} }, /*000*/ { { -1},{ -1} }, { { 0x01,-1},{ 0x81,-1} }, { { 0x02,-1},{ 0x82,-1} }, { { 0x03,-1},{ 0x83,-1} }, /*000*/
{ { 0x04,-1},{ 0x84,-1} }, { { 0x05,-1},{ 0x85,-1} }, { { 0x06,-1},{ 0x86,-1} }, { { 0x07,-1},{ 0x87,-1} }, /*004*/ { { 0x04,-1},{ 0x84,-1} }, { { 0x05,-1},{ 0x85,-1} }, { { 0x06,-1},{ 0x86,-1} }, { { 0x07,-1},{ 0x87,-1} }, /*004*/
{ { 0x08,-1},{ 0x88,-1} }, { { 0x09,-1},{ 0x89,-1} }, { { 0x0a,-1},{ 0x8a,-1} }, { { 0x0b,-1},{ 0x8b,-1} }, /*008*/ { { 0x08,-1},{ 0x88,-1} }, { { 0x09,-1},{ 0x89,-1} }, { { 0x0a,-1},{ 0x8a,-1} }, { { 0x0b,-1},{ 0x8b,-1} }, /*008*/
@@ -319,7 +319,7 @@ static scancode scancode_set1[512] = {
{ { -1},{ -1} }, { { -1},{ -1} }, { {0xe0,0xfe,-1},{ -1} }, { {0xe0,0xff,-1},{ -1} } /*1fc*/ { { -1},{ -1} }, { { -1},{ -1} }, { {0xe0,0xfe,-1},{ -1} }, { {0xe0,0xff,-1},{ -1} } /*1fc*/
}; };
static scancode scancode_set2[512] = { static const scancode scancode_set2[512] = {
{ { -1},{ -1} }, { { 0x76,-1},{ 0xF0,0x76,-1} }, { { 0x16,-1},{ 0xF0,0x16,-1} }, { { 0x1E,-1},{ 0xF0,0x1E,-1} }, /*000*/ { { -1},{ -1} }, { { 0x76,-1},{ 0xF0,0x76,-1} }, { { 0x16,-1},{ 0xF0,0x16,-1} }, { { 0x1E,-1},{ 0xF0,0x1E,-1} }, /*000*/
{ { 0x26,-1},{ 0xF0,0x26,-1} }, { { 0x25,-1},{ 0xF0,0x25,-1} }, { { 0x2E,-1},{ 0xF0,0x2E,-1} }, { { 0x36,-1},{ 0xF0,0x36,-1} }, /*004*/ { { 0x26,-1},{ 0xF0,0x26,-1} }, { { 0x25,-1},{ 0xF0,0x25,-1} }, { { 0x2E,-1},{ 0xF0,0x2E,-1} }, { { 0x36,-1},{ 0xF0,0x36,-1} }, /*004*/
{ { 0x3D,-1},{ 0xF0,0x3D,-1} }, { { 0x3E,-1},{ 0xF0,0x3E,-1} }, { { 0x46,-1},{ 0xF0,0x46,-1} }, { { 0x45,-1},{ 0xF0,0x45,-1} }, /*008*/ { { 0x3D,-1},{ 0xF0,0x3D,-1} }, { { 0x3E,-1},{ 0xF0,0x3E,-1} }, { { 0x46,-1},{ 0xF0,0x46,-1} }, { { 0x45,-1},{ 0xF0,0x45,-1} }, /*008*/
@@ -449,7 +449,7 @@ static scancode scancode_set2[512] = {
{ { -1},{ -1} }, { { -1},{ -1} }, { {0xe0,0xfe,-1},{0xe0,0xF0,0xFE,-1} }, { {0xe0,0xff,-1},{0xe0,0xF0,0xFF,-1} } /*1fc*/ { { -1},{ -1} }, { { -1},{ -1} }, { {0xe0,0xfe,-1},{0xe0,0xF0,0xFE,-1} }, { {0xe0,0xff,-1},{0xe0,0xF0,0xFF,-1} } /*1fc*/
}; };
static scancode scancode_set3[512] = { static const scancode scancode_set3[512] = {
{ { -1},{ -1} }, { { 0x08,-1},{ 0xf0,0x08,-1} }, { { 0x16,-1},{ 0xf0,0x16,-1} }, { { 0x1E,-1},{ 0xf0,0x1E,-1} }, /*000*/ { { -1},{ -1} }, { { 0x08,-1},{ 0xf0,0x08,-1} }, { { 0x16,-1},{ 0xf0,0x16,-1} }, { { 0x1E,-1},{ 0xf0,0x1E,-1} }, /*000*/
{ { 0x26,-1},{ 0xf0,0x26,-1} }, { { 0x25,-1},{ 0xf0,0x25,-1} }, { { 0x2E,-1},{ 0xf0,0x2E,-1} }, { { 0x36,-1},{ 0xf0,0x36,-1} }, /*004*/ { { 0x26,-1},{ 0xf0,0x26,-1} }, { { 0x25,-1},{ 0xf0,0x25,-1} }, { { 0x2E,-1},{ 0xf0,0x2E,-1} }, { { 0x36,-1},{ 0xf0,0x36,-1} }, /*004*/
{ { 0x3D,-1},{ 0xf0,0x3D,-1} }, { { 0x3E,-1},{ 0xf0,0x3E,-1} }, { { 0x46,-1},{ 0xf0,0x46,-1} }, { { 0x45,-1},{ 0xf0,0x45,-1} }, /*008*/ { { 0x3D,-1},{ 0xf0,0x3D,-1} }, { { 0x3E,-1},{ 0xf0,0x3E,-1} }, { { 0x46,-1},{ 0xf0,0x46,-1} }, { { 0x45,-1},{ 0xf0,0x45,-1} }, /*008*/
@@ -598,27 +598,23 @@ kbdlog(const char *fmt, ...)
static void static void
kbd_setmap(atkbd_t *kbd) kbd_setmap(atkbd_t *kbd)
{ {
scancode *map = NULL;
switch (keyboard_mode & 3) { switch (keyboard_mode & 3) {
case 1: case 1:
default: default:
map = scancode_set1; keyboard_set_table(scancode_set1);
break; break;
case 2: case 2:
map = scancode_set2; keyboard_set_table(scancode_set2);
break; break;
case 3: case 3:
map = scancode_set3; keyboard_set_table(scancode_set3);
break; break;
} }
if (keyboard_mode & 0x20) if (keyboard_mode & 0x20)
map = scancode_set1; keyboard_set_table(scancode_set1);
keyboard_set_table(map);
} }
@@ -981,11 +977,6 @@ kbd_cmd_write(atkbd_t *kbd, uint8_t val)
kbdlog("ATkbd: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled"); kbdlog("ATkbd: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled");
} }
#if 0
/* Reset scancode map. */
kbd_setmap(kbd);
#endif
} }

4
src/keyboard_xt.c
View File

@@ -8,7 +8,7 @@
* *
* Implementation of the XT-style keyboard. * Implementation of the XT-style keyboard.
* *
* Version: @(#)keyboard_xt.c 1.0.10 2018/03/18 * Version: @(#)keyboard_xt.c 1.0.11 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -60,7 +60,7 @@ typedef struct {
/*XT keyboard has no escape scancodes, and no scancodes beyond 53*/ /*XT keyboard has no escape scancodes, and no scancodes beyond 53*/
scancode scancode_xt[512] = { const scancode scancode_xt[512] = {
{ {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {-1}, {-1} }, { {0x01, -1}, {0x81, -1} },
{ {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
{ {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} },

4
src/lpt.c
View File

@@ -19,7 +19,7 @@ static const struct
{ {
const char *name; const char *name;
const char *internal_name; const char *internal_name;
lpt_device_t *device; const lpt_device_t *device;
} lpt_devices[] = } lpt_devices[] =
{ {
{"None", "none", NULL}, {"None", "none", NULL},
@@ -60,7 +60,7 @@ void lpt_devices_init()
lpt_device_ts[i] = NULL; lpt_device_ts[i] = NULL;
else else
{ {
lpt_device_ts[i] = lpt_devices[c].device; lpt_device_ts[i] = (lpt_device_t *) lpt_devices[c].device;
if (lpt_device_ts[i]) if (lpt_device_ts[i])
lpt_device_ps[i] = lpt_device_ts[i]->init(); lpt_device_ps[i] = lpt_device_ts[i]->init();
} }

4
src/machine/m_olivetti_m24.c
View File

@@ -8,7 +8,7 @@
* *
* Emulation of the Olivetti M24. * Emulation of the Olivetti M24.
* *
* Version: @(#)m_olivetti_m24.c 1.0.11 2018/03/18 * Version: @(#)m_olivetti_m24.c 1.0.12 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -836,7 +836,7 @@ machine_olim24_init(const machine_t *model)
kbd_read, NULL, NULL, kbd_write, NULL, NULL, m24); kbd_read, NULL, NULL, kbd_write, NULL, NULL, m24);
io_sethandler(0x0064, 1, io_sethandler(0x0064, 1,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, m24); kbd_read, NULL, NULL, kbd_write, NULL, NULL, m24);
keyboard_set_table(scancode_xt); keyboard_set_table(scancode_xt);
keyboard_send = kbd_adddata_ex; keyboard_send = kbd_adddata_ex;
keyboard_scan = 1; keyboard_scan = 1;
timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, m24); timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, m24);

4
src/machine/m_tandy.c
View File

@@ -8,7 +8,7 @@
* *
* Emulation of Tandy models 1000, 1000HX and 1000SL2. * Emulation of Tandy models 1000, 1000HX and 1000SL2.
* *
* Version: @(#)m_tandy.c 1.0.4 2018/03/18 * Version: @(#)m_tandy.c 1.0.5 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -121,7 +121,7 @@ typedef struct {
} tandy_t; } tandy_t;
static scancode scancode_tandy[512] = { static const scancode scancode_tandy[512] = {
{ {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {-1}, {-1} }, { {0x01, -1}, {0x81, -1} },
{ {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
{ {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} },

4
src/machine/machine.c
View File

@@ -8,7 +8,7 @@
* *
* Handling of the emulated machines. * Handling of the emulated machines.
* *
* Version: @(#)machine.c 1.0.31 2018/03/18 * Version: @(#)machine.c 1.0.32 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -53,7 +53,7 @@ machine_init(void)
PCI = IS_ARCH(machine, MACHINE_PCI); PCI = IS_ARCH(machine, MACHINE_PCI);
/* Resize the memory. */ /* Resize the memory. */
mem_resize(); mem_reset();
/* Load the machine's ROM BIOS. */ /* Load the machine's ROM BIOS. */
rom_load_bios(romset); rom_load_bios(romset);

3536
src/mem.c
View File

File diff suppressed because it is too large Load Diff

387
src/mem.h
View File

@@ -1,26 +1,154 @@
/* Copyright holders: Sarah Walker, Tenshi /*
see COPYING for more details * VARCem Virtual ARchaeological Computer EMulator.
*/ * An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the VARCem Project.
*
* Definitions for the memory interface.
*
* Version: @(#)mem.h 1.0.4 2018/03/16
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
*
* Copyright 2017,2018 Fred N. van Kempen.
* Copyright 2008-2018 Sarah Walker.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#ifndef EMU_MEM_H #ifndef EMU_MEM_H
# define EMU_MEM_H # define EMU_MEM_H
extern uint8_t *ram; #define MEM_MAPPING_EXTERNAL 1 /* on external bus (ISA/PCI) */
extern uint32_t rammask; #define MEM_MAPPING_INTERNAL 2 /* on internal bus (RAM) */
#define MEM_MAPPING_ROM 4 /* Executing from ROM may involve
* additional wait states. */
extern int readlookup[256],readlookupp[256]; #define MEM_MAP_TO_SHADOW_RAM_MASK 1
extern uintptr_t *readlookup2; #define MEM_MAP_TO_RAM_ADDR_MASK 2
extern int readlnext;
extern int writelookup[256],writelookupp[256]; #define MEM_READ_ANY 0x00
extern uintptr_t *writelookup2; #define MEM_READ_INTERNAL 0x10
extern int writelnext; #define MEM_READ_EXTERNAL 0x20
#define MEM_READ_MASK 0xf0
#define MEM_WRITE_ANY 0x00
#define MEM_WRITE_INTERNAL 0x01
#define MEM_WRITE_EXTERNAL 0x02
#define MEM_WRITE_DISABLED 0x03
#define MEM_WRITE_MASK 0x0f
typedef struct _mem_mapping_ {
struct _mem_mapping_ *prev, *next;
int enable;
uint32_t base;
uint32_t size;
uint8_t (*read_b)(uint32_t addr, void *priv);
uint16_t (*read_w)(uint32_t addr, void *priv);
uint32_t (*read_l)(uint32_t addr, void *priv);
void (*write_b)(uint32_t addr, uint8_t val, void *priv);
void (*write_w)(uint32_t addr, uint16_t val, void *priv);
void (*write_l)(uint32_t addr, uint32_t val, void *priv);
uint8_t *exec;
uint32_t flags;
void *p;
} mem_mapping_t;
typedef struct _page_ {
void (*write_b)(uint32_t addr, uint8_t val, struct _page_ *p);
void (*write_w)(uint32_t addr, uint16_t val, struct _page_ *p);
void (*write_l)(uint32_t addr, uint32_t val, struct _page_ *p);
uint8_t *mem;
uint64_t code_present_mask[4],
dirty_mask[4];
struct codeblock_t *block[4], *block_2[4];
/*Head of codeblock tree associated with this page*/
struct codeblock_t *head;
} page_t;
extern uint8_t *ram;
extern uint32_t rammask;
extern uint8_t *rom;
extern uint8_t romext[32768];
extern uint32_t biosmask;
extern int readlookup[256],
readlookupp[256];
extern uintptr_t * readlookup2;
extern int readlnext;
extern int writelookup[256],
writelookupp[256];
extern uintptr_t *writelookup2;
extern int writelnext;
extern uint32_t ram_mapped_addr[64];
extern mem_mapping_t bios_mapping[8],
bios_high_mapping[8],
romext_mapping,
ram_low_mapping,
ram_mid_mapping,
ram_high_mapping;
extern uint32_t mem_logical_addr;
extern page_t *pages,
**page_lookup;
extern uint32_t get_phys_virt,get_phys_phys;
extern int shadowbios,
shadowbios_write;
extern int readlnum,
writelnum;
extern int nopageerrors;
extern int memspeed[11];
extern uint8_t isram[0x10000];
extern int mmu_perm;
extern int mem_a20_state,
mem_a20_alt,
mem_a20_key;
extern int mmu_perm;
#define readmemb(a) ((readlookup2[(a)>>12]==-1)?readmembl(a):*(uint8_t *)(readlookup2[(a) >> 12] + (a))) #define readmemb(a) ((readlookup2[(a)>>12]==-1)?readmembl(a):*(uint8_t *)(readlookup2[(a) >> 12] + (a)))
#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 1))?readmemwl(s,a):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) #define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 1))?readmemwl(s,a):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 3))?readmemll(s,a):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a)))) #define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a)) & 3))?readmemll(s,a):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
extern uint8_t readmembl(uint32_t addr); extern uint8_t readmembl(uint32_t addr);
extern void writemembl(uint32_t addr, uint8_t val); extern void writemembl(uint32_t addr, uint8_t val);
extern uint8_t readmemb386l(uint32_t seg, uint32_t addr); extern uint8_t readmemb386l(uint32_t seg, uint32_t addr);
@@ -37,54 +165,7 @@ extern uint32_t mmutranslatereal(uint32_t addr, int rw);
extern void addreadlookup(uint32_t virt, uint32_t phys); extern void addreadlookup(uint32_t virt, uint32_t phys);
extern void addwritelookup(uint32_t virt, uint32_t phys); extern void addwritelookup(uint32_t virt, uint32_t phys);
extern int shadowbios,shadowbios_write; extern void mem_mapping_add(mem_mapping_t *mapping,
extern int readlnum,writelnum;
typedef struct mem_mapping_t
{
struct mem_mapping_t *prev, *next;
int enable;
uint32_t base;
uint32_t size;
uint8_t (*read_b)(uint32_t addr, void *priv);
uint16_t (*read_w)(uint32_t addr, void *priv);
uint32_t (*read_l)(uint32_t addr, void *priv);
void (*write_b)(uint32_t addr, uint8_t val, void *priv);
void (*write_w)(uint32_t addr, uint16_t val, void *priv);
void (*write_l)(uint32_t addr, uint32_t val, void *priv);
uint8_t *exec;
uint32_t flags;
void *p;
} mem_mapping_t;
/*Only present on external bus (ISA/PCI)*/
#define MEM_MAPPING_EXTERNAL 1
/*Only present on internal bus (RAM)*/
#define MEM_MAPPING_INTERNAL 2
/*Executing from ROM may involve additional wait states*/
#define MEM_MAPPING_ROM 4
extern uint8_t *ram,*rom;
extern uint8_t romext[32768];
extern int readlnum,writelnum;
extern int memspeed[11];
extern int nopageerrors;
extern uint32_t biosmask;
extern unsigned char isram[0x10000];
#define MEM_MAP_TO_SHADOW_RAM_MASK 1
#define MEM_MAP_TO_RAM_ADDR_MASK 2
extern uint32_t ram_mapped_addr[64];
void mem_mapping_add(mem_mapping_t *mapping,
uint32_t base, uint32_t base,
uint32_t size, uint32_t size,
uint8_t (*read_b)(uint32_t addr, void *p), uint8_t (*read_b)(uint32_t addr, void *p),
@@ -96,149 +177,71 @@ void mem_mapping_add(mem_mapping_t *mapping,
uint8_t *exec, uint8_t *exec,
uint32_t flags, uint32_t flags,
void *p); void *p);
void mem_mapping_set_handler(mem_mapping_t *mapping,
extern void mem_mapping_set_handler(mem_mapping_t *mapping,
uint8_t (*read_b)(uint32_t addr, void *p), uint8_t (*read_b)(uint32_t addr, void *p),
uint16_t (*read_w)(uint32_t addr, void *p), uint16_t (*read_w)(uint32_t addr, void *p),
uint32_t (*read_l)(uint32_t addr, void *p), uint32_t (*read_l)(uint32_t addr, void *p),
void (*write_b)(uint32_t addr, uint8_t val, void *p), void (*write_b)(uint32_t addr, uint8_t val, void *p),
void (*write_w)(uint32_t addr, uint16_t val, void *p), void (*write_w)(uint32_t addr, uint16_t val, void *p),
void (*write_l)(uint32_t addr, uint32_t val, void *p)); void (*write_l)(uint32_t addr, uint32_t val, void *p));
void mem_mapping_set_p(mem_mapping_t *mapping, void *p);
void mem_mapping_set_addr(mem_mapping_t *mapping, uint32_t base, uint32_t size);
void mem_mapping_set_exec(mem_mapping_t *mapping, uint8_t *exec);
void mem_mapping_disable(mem_mapping_t *mapping);
void mem_mapping_enable(mem_mapping_t *mapping);
void mem_set_mem_state(uint32_t base, uint32_t size, int state); extern void mem_mapping_set_p(mem_mapping_t *mapping, void *p);
#define MEM_READ_ANY 0x00 extern void mem_mapping_set_addr(mem_mapping_t *mapping,
#define MEM_READ_INTERNAL 0x10 uint32_t base, uint32_t size);
#define MEM_READ_EXTERNAL 0x20 extern void mem_mapping_set_exec(mem_mapping_t *mapping, uint8_t *exec);
#define MEM_READ_MASK 0xf0 extern void mem_mapping_disable(mem_mapping_t *mapping);
extern void mem_mapping_enable(mem_mapping_t *mapping);
#define MEM_WRITE_ANY 0x00 extern void mem_set_mem_state(uint32_t base, uint32_t size, int state);
#define MEM_WRITE_INTERNAL 0x01
#define MEM_WRITE_EXTERNAL 0x02
#define MEM_WRITE_DISABLED 0x03
#define MEM_WRITE_MASK 0x0f
extern int mem_a20_state; extern uint8_t mem_readb_phys(uint32_t addr);
extern int mem_a20_alt; extern uint8_t mem_readb_phys_dma(uint32_t addr);
extern int mem_a20_key; extern uint16_t mem_readw_phys(uint32_t addr);
void mem_a20_recalc(); extern void mem_writeb_phys(uint32_t addr, uint8_t val);
extern void mem_writeb_phys_dma(uint32_t addr, uint8_t val);
extern void mem_writew_phys(uint32_t addr, uint16_t val);
uint8_t mem_readb_phys(uint32_t addr); extern uint8_t mem_read_ram(uint32_t addr, void *priv);
uint8_t mem_readb_phys_dma(uint32_t addr); extern uint16_t mem_read_ramw(uint32_t addr, void *priv);
uint16_t mem_readw_phys(uint32_t addr); extern uint32_t mem_read_raml(uint32_t addr, void *priv);
void mem_writeb_phys(uint32_t addr, uint8_t val); extern void mem_write_ram(uint32_t addr, uint8_t val, void *priv);
void mem_writeb_phys_dma(uint32_t addr, uint8_t val); extern void mem_write_ramw(uint32_t addr, uint16_t val, void *priv);
void mem_writew_phys(uint32_t addr, uint16_t val); extern void mem_write_raml(uint32_t addr, uint32_t val, void *priv);
uint8_t mem_read_ram(uint32_t addr, void *priv); extern uint8_t mem_read_bios(uint32_t addr, void *priv);
uint16_t mem_read_ramw(uint32_t addr, void *priv); extern uint16_t mem_read_biosw(uint32_t addr, void *priv);
uint32_t mem_read_raml(uint32_t addr, void *priv); extern uint32_t mem_read_biosl(uint32_t addr, void *priv);
void mem_write_ram(uint32_t addr, uint8_t val, void *priv); extern void mem_write_null(uint32_t addr, uint8_t val, void *p);
void mem_write_ramw(uint32_t addr, uint16_t val, void *priv); extern void mem_write_nullw(uint32_t addr, uint16_t val, void *p);
void mem_write_raml(uint32_t addr, uint32_t val, void *priv); extern void mem_write_nulll(uint32_t addr, uint32_t val, void *p);
uint8_t mem_read_bios(uint32_t addr, void *priv); extern uint32_t mmutranslate_noabrt(uint32_t addr, int rw);
uint16_t mem_read_biosw(uint32_t addr, void *priv);
uint32_t mem_read_biosl(uint32_t addr, void *priv);
void mem_write_null(uint32_t addr, uint8_t val, void *p); extern void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr);
void mem_write_nullw(uint32_t addr, uint16_t val, void *p);
void mem_write_nulll(uint32_t addr, uint32_t val, void *p);
mem_mapping_t bios_mapping[8]; extern void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p);
mem_mapping_t bios_high_mapping[8]; extern void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p);
mem_mapping_t romext_mapping; extern void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p);
extern void mem_flush_write_page(uint32_t addr, uint32_t virt);
extern mem_mapping_t ram_high_mapping;
typedef struct page_t
{
void (*write_b)(uint32_t addr, uint8_t val, struct page_t *p);
void (*write_w)(uint32_t addr, uint16_t val, struct page_t *p);
void (*write_l)(uint32_t addr, uint32_t val, struct page_t *p);
uint8_t *mem;
struct codeblock_t *block[4], *block_2[4];
/*Head of codeblock tree associated with this page*/
struct codeblock_t *head;
uint64_t code_present_mask[4], dirty_mask[4];
} page_t;
extern page_t *pages;
extern page_t **page_lookup;
uint32_t mmutranslate_noabrt(uint32_t addr, int rw);
extern uint32_t get_phys_virt,get_phys_phys;
#ifdef EMU_CPU_H
static __inline uint32_t get_phys(uint32_t addr)
{
if (!((addr ^ get_phys_virt) & ~0xfff))
return get_phys_phys | (addr & 0xfff);
get_phys_virt = addr;
if (!(cr0 >> 31))
{
get_phys_phys = (addr & rammask) & ~0xfff;
return addr & rammask;
}
get_phys_phys = (mmutranslatereal(addr, 0) & rammask) & ~0xfff;
return get_phys_phys | (addr & 0xfff);
/* return mmutranslatereal(addr, 0) & rammask; */
}
static __inline uint32_t get_phys_noabrt(uint32_t addr)
{
if (!(cr0 >> 31))
return addr & rammask;
return mmutranslate_noabrt(addr, 0) & rammask;
}
#endif
void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr);
extern uint32_t mem_logical_addr;
void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p);
void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p);
void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p);
void mem_flush_write_page(uint32_t addr, uint32_t virt);
extern void mem_reset_page_blocks(void); extern void mem_reset_page_blocks(void);
extern mem_mapping_t ram_low_mapping;
extern mem_mapping_t ram_mid_mapping;
extern void mem_remap_top_256k(void);
extern void mem_remap_top_384k(void);
extern void flushmmucache(void); extern void flushmmucache(void);
extern void flushmmucache_cr3(void); extern void flushmmucache_cr3(void);
extern void flushmmucache_nopc(void); extern void flushmmucache_nopc(void);
extern void mmu_invalidate(uint32_t addr); extern void mmu_invalidate(uint32_t addr);
extern void mem_a20_recalc(void);
extern void mem_add_bios(void); extern void mem_add_bios(void);
extern void mem_init(void); extern void mem_init(void);
extern void mem_resize(void); extern void mem_reset(void);
extern void mem_remap_top_256k(void);
extern void mem_destroy_pages(void); extern void mem_remap_top_384k(void);
extern void mem_resize_pages(void);
extern uint8_t port_92_read(uint16_t port, void *priv); extern uint8_t port_92_read(uint16_t port, void *priv);
extern void port_92_write(uint16_t port, uint8_t val, void *priv); extern void port_92_write(uint16_t port, uint8_t val, void *priv);
@@ -248,4 +251,38 @@ extern void port_92_remove(void);
extern void port_92_reset(void); extern void port_92_reset(void);
#ifdef EMU_CPU_H
static __inline uint32_t get_phys(uint32_t addr)
{
if (! ((addr ^ get_phys_virt) & ~0xfff))
return get_phys_phys | (addr & 0xfff);
get_phys_virt = addr;
if (! (cr0 >> 31)) {
get_phys_phys = (addr & rammask) & ~0xfff;
return addr & rammask;
}
get_phys_phys = (mmutranslatereal(addr, 0) & rammask) & ~0xfff;
#if 1
return get_phys_phys | (addr & 0xfff);
#else
return mmutranslatereal(addr, 0) & rammask;
#endif
}
static __inline uint32_t get_phys_noabrt(uint32_t addr)
{
if (! (cr0 >> 31))
return addr & rammask;
return mmutranslate_noabrt(addr, 0) & rammask;
}
#endif
#endif /*EMU_MEM_H*/ #endif /*EMU_MEM_H*/

4
src/mouse.c
View File

@@ -11,7 +11,7 @@
* TODO: Add the Genius bus- and serial mouse. * TODO: Add the Genius bus- and serial mouse.
* Remove the '3-button' flag from mouse types. * Remove the '3-button' flag from mouse types.
* *
* Version: @(#)mouse.c 1.0.24 2018/03/19 * Version: @(#)mouse.c 1.0.25 2018/03/19
* *
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
@@ -142,7 +142,7 @@ mouse_process(void)
{ {
static int poll_delay = 2; static int poll_delay = 2;
if ((mouse_curr != NULL) || (mouse_type == MOUSE_TYPE_INTERNAL)) if ((mouse_curr == NULL) || (mouse_type == MOUSE_TYPE_INTERNAL))
return; return;
if (--poll_delay) return; if (--poll_delay) return;

6
src/pc.c
View File

@@ -8,7 +8,7 @@
* *
* Main emulator module where most things are controlled. * Main emulator module where most things are controlled.
* *
* Version: @(#)pc.c 1.0.66 2018/03/19 * Version: @(#)pc.c 1.0.67 2018/03/19
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -558,8 +558,6 @@ pc_reload(wchar_t *fn)
fdd_load(2, floppyfns[2]); fdd_load(2, floppyfns[2]);
fdd_load(3, floppyfns[3]); fdd_load(3, floppyfns[3]);
mem_resize();
rom_load_bios(romset);
network_init(); network_init();
pc_reset_hard_init(); pc_reset_hard_init();
@@ -947,8 +945,6 @@ pc_close(thread_t *ptr)
sound_cd_thread_end(); sound_cd_thread_end();
mem_destroy_pages();
ide_destroy_buffers(); ide_destroy_buffers();
cdrom_destroy_drives(); cdrom_destroy_drives();

4
src/sound/snd_lpt_dac.c
View File

@@ -104,7 +104,7 @@ static void dac_close(void *p)
free(lpt_dac); free(lpt_dac);
} }
lpt_device_t lpt_dac_device = const lpt_device_t lpt_dac_device =
{ {
"LPT DAC / Covox Speech Thing", "LPT DAC / Covox Speech Thing",
dac_init, dac_init,
@@ -113,7 +113,7 @@ lpt_device_t lpt_dac_device =
dac_write_ctrl, dac_write_ctrl,
dac_read_status dac_read_status
}; };
lpt_device_t lpt_dac_stereo_device = const lpt_device_t lpt_dac_stereo_device =
{ {
"Stereo LPT DAC", "Stereo LPT DAC",
dac_stereo_init, dac_stereo_init,

4
src/sound/snd_lpt_dac.h
View File

@@ -1,2 +1,2 @@
extern lpt_device_t lpt_dac_device; extern const lpt_device_t lpt_dac_device;
extern lpt_device_t lpt_dac_stereo_device; extern const lpt_device_t lpt_dac_stereo_device;

2
src/sound/snd_lpt_dss.c
View File

@@ -109,7 +109,7 @@ static void dss_close(void *p)
free(dss); free(dss);
} }
lpt_device_t dss_device = const lpt_device_t dss_device =
{ {
"Disney Sound Source", "Disney Sound Source",
dss_init, dss_init,

2
src/sound/snd_lpt_dss.h
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@@ -1 +1 @@
extern lpt_device_t dss_device; extern const lpt_device_t dss_device;

166
src/video/vid_table.c
View File

@@ -8,7 +8,7 @@
* *
* Define all known video cards. * Define all known video cards.
* *
* Version: @(#)vid_table.c 1.0.24 2018/03/15 * Version: @(#)vid_table.c 1.0.25 2018/03/19
* *
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
@@ -74,105 +74,105 @@ enum {
#define VIDEO_FLAG_TYPE_MASK 3 #define VIDEO_FLAG_TYPE_MASK 3
typedef struct { typedef struct {
const char *name; const char *name;
const char *internal_name; const char *internal_name;
const device_t *device; const device_t *device;
int legacy_id; int legacy_id;
int flags; int flags;
video_timings_t timing; video_timings_t timing;
} VIDEO_CARD; } VIDEO_CARD;
static const VIDEO_CARD static const VIDEO_CARD
video_cards[] = { video_cards[] = {
{ "None", "none", NULL, GFX_NONE }, { "None", "none", NULL, GFX_NONE },
{ "Internal", "internal", NULL, GFX_INTERNAL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "Internal", "internal", NULL, GFX_INTERNAL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", &mach64gx_isa_device, GFX_MACH64GX_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, { "[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", &mach64gx_isa_device, GFX_MACH64GX_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
{"[ISA] ATI Korean VGA (ATI-28800-5)", "ati28800k", &ati28800k_device, GFX_ATIKOREANVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, { "[ISA] ATI Korean VGA (ATI-28800-5)", "ati28800k", &ati28800k_device, GFX_ATIKOREANVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
{ "[ISA] ATI VGA-88 (ATI-18800-1)", "ati18800v", &ati18800_vga88_device, GFX_VGA88, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] ATI VGA-88 (ATI-18800-1)", "ati18800v", &ati18800_vga88_device, GFX_VGA88, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", &ati28800_device, GFX_VGACHARGER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, { "[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", &ati28800_device, GFX_VGACHARGER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
{ "[ISA] ATI VGA Edge-16 (ATI-18800-5)", "ati18800", &ati18800_device, GFX_VGAEDGE16, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] ATI VGA Edge-16 (ATI-18800-5)", "ati18800", &ati18800_device, GFX_VGAEDGE16, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] ATI VGA Wonder (ATI-18800)", "ati18800w", &ati18800_wonder_device, GFX_VGAWONDER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] ATI VGA Wonder (ATI-18800)", "ati18800w", &ati18800_wonder_device, GFX_VGAWONDER, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
#if defined(DEV_BRANCH) && defined(USE_XL24) #if defined(DEV_BRANCH) && defined(USE_XL24)
{ "[ISA] ATI VGA Wonder XL24 (ATI-28800-6)", "ati28800w", &ati28800_wonderxl24_device,GFX_VGAWONDERXL24, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, { "[ISA] ATI VGA Wonder XL24 (ATI-28800-6)", "ati28800w", &ati28800_wonderxl24_device, GFX_VGAWONDERXL24, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
#endif #endif
{ "[ISA] CGA", "cga", &cga_device, GFX_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] CGA", "cga", &cga_device, GFX_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] Chips & Technologies SuperEGA", "superega", &sega_device, GFX_SUPER_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Chips & Technologies SuperEGA", "superega", &sega_device, GFX_SUPER_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] Cirrus Logic CL-GD 5428", "cl_gd5428_isa", &gd5428_isa_device, GFX_CL_GD5428_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, { "[ISA] Cirrus Logic CL-GD 5428", "cl_gd5428_isa", &gd5428_isa_device, GFX_CL_GD5428_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}},
{ "[ISA] Cirrus Logic CL-GD 5429", "cl_gd5429_isa", &gd5429_isa_device, GFX_CL_GD5429_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, { "[ISA] Cirrus Logic CL-GD 5429", "cl_gd5429_isa", &gd5429_isa_device, GFX_CL_GD5429_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}},
{ "[ISA] Cirrus Logic CL-GD 5434", "cl_gd5434_isa", &gd5434_isa_device, GFX_CL_GD5434_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, { "[ISA] Cirrus Logic CL-GD 5434", "cl_gd5434_isa", &gd5434_isa_device, GFX_CL_GD5434_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}},
{ "[ISA] Compaq ATI VGA Wonder XL (ATI-28800-5)","compaq_ati28800", &compaq_ati28800_device, GFX_VGAWONDERXL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, { "[ISA] Compaq ATI VGA Wonder XL (ATI-28800-5)", "compaq_ati28800", &compaq_ati28800_device, GFX_VGAWONDERXL, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
{ "[ISA] Compaq CGA", "compaq_cga", &compaq_cga_device, GFX_COMPAQ_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Compaq CGA", "compaq_cga", &compaq_cga_device, GFX_COMPAQ_CGA, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] Compaq CGA 2", "compaq_cga_2", &compaq_cga_2_device, GFX_COMPAQ_CGA_2, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Compaq CGA 2", "compaq_cga_2", &compaq_cga_2_device, GFX_COMPAQ_CGA_2, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] Compaq EGA", "compaq_ega", &cpqega_device, GFX_COMPAQ_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Compaq EGA", "compaq_ega", &cpqega_device, GFX_COMPAQ_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] EGA", "ega", &ega_device, GFX_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] EGA", "ega", &ega_device, GFX_EGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] Hercules", "hercules", &hercules_device, GFX_HERCULES, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Hercules", "hercules", &hercules_device, GFX_HERCULES, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] Hercules Plus", "hercules_plus", &herculesplus_device, GFX_HERCULESPLUS, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Hercules Plus", "hercules_plus", &herculesplus_device, GFX_HERCULESPLUS, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] Hercules InColor", "incolor", &incolor_device, GFX_INCOLOR, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Hercules InColor", "incolor", &incolor_device, GFX_INCOLOR, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] MDA", "mda", &mda_device, GFX_MDA, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] MDA", "mda", &mda_device, GFX_MDA, VIDEO_FLAG_TYPE_MDA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{ "[ISA] MDSI Genius", "genius", &genius_device, GFX_GENIUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] MDSI Genius", "genius", &genius_device, GFX_GENIUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[ISA] OAK OTI-037C", "oti037c", &oti037c_device, GFX_OTI037C, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, { "[ISA] OAK OTI-037C", "oti037c", &oti037c_device, GFX_OTI037C, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}},
{"[ISA] OAK OTI-067", "oti067", &oti067_device, GFX_OTI067, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, { "[ISA] OAK OTI-067", "oti067", &oti067_device, GFX_OTI067, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}},
{"[ISA] OAK OTI-077", "oti077", &oti077_device, GFX_OTI077, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, { "[ISA] OAK OTI-077", "oti077", &oti077_device, GFX_OTI077, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}},
{"[ISA] Paradise PVGA1A", "pvga1a", &paradise_pvga1a_device, GFX_PVGA1A, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Paradise PVGA1A", "pvga1a", &paradise_pvga1a_device, GFX_PVGA1A, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[ISA] Paradise WD90C11-LR", "wd90c11", &paradise_wd90c11_device, GFX_WD90C11, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Paradise WD90C11-LR", "wd90c11", &paradise_wd90c11_device, GFX_WD90C11, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[ISA] Paradise WD90C30-LR", "wd90c30", &paradise_wd90c30_device, GFX_WD90C30, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}}, { "[ISA] Paradise WD90C30-LR", "wd90c30", &paradise_wd90c30_device, GFX_WD90C30, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 6, 8, 16, 6, 8, 16}},
{"[ISA] Plantronics ColorPlus", "plantronics", &colorplus_device, GFX_COLORPLUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] Plantronics ColorPlus", "plantronics", &colorplus_device, GFX_COLORPLUS, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
#if defined(DEV_BRANCH) && defined(USE_TI) #if defined(DEV_BRANCH) && defined(USE_TI)
{"[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, GFX_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, GFX_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
#endif #endif
{"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, {"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}},
{"[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, {"[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
{"[ISA] VGA", "vga", &vga_device, GFX_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] VGA", "vga", &vga_device, GFX_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, {"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}},
{"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, {"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}},
{"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device,GFX_ET4000W32_CARDEX_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, {"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device, GFX_ET4000W32_CARDEX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}},
{"[PCI] Cirrus Logic CL-GD 5430", "cl_gd5430_pci", &gd5430_pci_device, GFX_CL_GD5430_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[PCI] Cirrus Logic CL-GD 5430", "cl_gd5430_pci", &gd5430_pci_device, GFX_CL_GD5430_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
{"[PCI] Cirrus Logic CL-GD 5434", "cl_gd5434_pci", &gd5434_pci_device, GFX_CL_GD5434_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[PCI] Cirrus Logic CL-GD 5434", "cl_gd5434_pci", &gd5434_pci_device, GFX_CL_GD5434_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
{"[PCI] Cirrus Logic CL-GD 5436", "cl_gd5436_pci", &gd5436_pci_device, GFX_CL_GD5436_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[PCI] Cirrus Logic CL-GD 5436", "cl_gd5436_pci", &gd5436_pci_device, GFX_CL_GD5436_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
#if defined(DEV_BRANCH) && defined(USE_STEALTH32) #if defined(DEV_BRANCH) && defined(USE_STEALTH32)
{"[PCI] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_pci", &et4000w32p_pci_device, GFX_ET4000W32_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, {"[PCI] Diamond Stealth 32 (Tseng ET4000/w32p)", "stealth32_pci", &et4000w32p_pci_device, GFX_ET4000W32_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}},
#endif #endif
{"[PCI] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_pci",&s3_virge_pci_device, GFX_VIRGE_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, {"[PCI] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_pci", &s3_virge_pci_device, GFX_VIRGE_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}},
{"[PCI] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_pci",&s3_virge_988_pci_device, GFX_VIRGEVX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, {"[PCI] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_pci", &s3_virge_988_pci_device, GFX_VIRGEVX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}},
{"[PCI] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_pci", &s3_diamond_stealth64_pci_device,GFX_STEALTH64_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, {"[PCI] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_pci", &s3_diamond_stealth64_pci_device, GFX_STEALTH64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}},
#if defined(DEV_BRANCH) && defined(USE_RIVA) #if defined(DEV_BRANCH) && defined(USE_RIVA)
{"[PCI] nVidia RIVA 128", "riva128", &riva128_device, GFX_RIVA128, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, {"[PCI] nVidia RIVA 128", "riva128", &riva128_device, GFX_RIVA128, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}},
{"[PCI] nVidia RIVA TNT", "rivatnt", &rivatnt_device, GFX_RIVATNT, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, {"[PCI] nVidia RIVA TNT", "rivatnt", &rivatnt_device, GFX_RIVATNT, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}},
{"[PCI] nVidia RIVA TNT2", "rivatnt2", &rivatnt2_device, GFX_RIVATNT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}}, {"[PCI] nVidia RIVA TNT2", "rivatnt2", &rivatnt2_device, GFX_RIVATNT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 24, 24, 36}},
#endif #endif
{"[PCI] Number Nine 9FX (S3 Trio64)", "n9_9fx_pci", &s3_9fx_pci_device, GFX_N9_9FX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, {"[PCI] Number Nine 9FX (S3 Trio64)", "n9_9fx_pci", &s3_9fx_pci_device, GFX_N9_9FX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}},
{"[PCI] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_pci", &s3_bahamas64_pci_device, GFX_BAHAMAS64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, {"[PCI] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_pci", &s3_bahamas64_pci_device, GFX_BAHAMAS64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}},
{"[PCI] Phoenix S3 Vision864", "px_vision864_pci", &s3_phoenix_vision864_pci_device,GFX_PHOENIX_VISION864_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, {"[PCI] Phoenix S3 Vision864", "px_vision864_pci", &s3_phoenix_vision864_pci_device, GFX_PHOENIX_VISION864_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}},
{"[PCI] Phoenix S3 Trio32", "px_trio32_pci", &s3_phoenix_trio32_pci_device,GFX_PHOENIX_TRIO32_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, {"[PCI] Phoenix S3 Trio32", "px_trio32_pci", &s3_phoenix_trio32_pci_device, GFX_PHOENIX_TRIO32_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}},
{"[PCI] Phoenix S3 Trio64", "px_trio64_pci", &s3_phoenix_trio64_pci_device,GFX_PHOENIX_TRIO64_PCI,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, {"[PCI] Phoenix S3 Trio64", "px_trio64_pci", &s3_phoenix_trio64_pci_device, GFX_PHOENIX_TRIO64_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}},
{"[PCI] S3 ViRGE/DX", "virge375_pci", &s3_virge_375_pci_device, GFX_VIRGEDX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, {"[PCI] S3 ViRGE/DX", "virge375_pci", &s3_virge_375_pci_device, GFX_VIRGEDX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}},
{"[PCI] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_pci",&s3_virge_375_4_pci_device,GFX_VIRGEDX4_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, {"[PCI] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_pci", &s3_virge_375_4_pci_device, GFX_VIRGEDX4_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}},
{"[PCI] Trident TGUI9440", "tgui9440_pci", &tgui9440_pci_device, GFX_TGUI9440_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, {"[PCI] Trident TGUI9440", "tgui9440_pci", &tgui9440_pci_device, GFX_TGUI9440_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}},
{"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, {"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}},
{"[VLB] Cardex Tseng ET4000/w32p", "et4000w32p_vlb", &et4000w32p_cardex_vlb_device,GFX_ET4000W32_CARDEX_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, {"[VLB] Cardex Tseng ET4000/w32p", "et4000w32p_vlb", &et4000w32p_cardex_vlb_device, GFX_ET4000W32_CARDEX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}},
{"[VLB] Cirrus Logic CL-GD 5428", "cl_gd5428_vlb", &gd5428_vlb_device, GFX_CL_GD5428_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[VLB] Cirrus Logic CL-GD 5428", "cl_gd5428_vlb", &gd5428_vlb_device, GFX_CL_GD5428_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
{"[VLB] Cirrus Logic CL-GD 5429", "cl_gd5429_vlb", &gd5429_vlb_device, GFX_CL_GD5429_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[VLB] Cirrus Logic CL-GD 5429", "cl_gd5429_vlb", &gd5429_vlb_device, GFX_CL_GD5429_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
{"[VLB] Cirrus Logic CL-GD 5434", "cl_gd5434_vlb", &gd5434_vlb_device, GFX_CL_GD5434_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[VLB] Cirrus Logic CL-GD 5434", "cl_gd5434_vlb", &gd5434_vlb_device, GFX_CL_GD5434_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
#if defined(DEV_BRANCH) && defined(USE_STEALTH32) #if defined(DEV_BRANCH) && defined(USE_STEALTH32)
{"[VLB] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_vlb", &et4000w32p_vlb_device, GFX_ET4000W32_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, {"[VLB] Diamond Stealth 32 (Tseng ET4000/w32p)", "stealth32_vlb", &et4000w32p_vlb_device, GFX_ET4000W32_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}},
#endif #endif
{"[VLB] Diamond SpeedStar PRO (CL-GD5426)", "cl_gd5426_vlb", &gd5426_vlb_device, GFX_CL_GD5426_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[VLB] Diamond SpeedStar PRO (CL-GD5426)", "cl_gd5426_vlb", &gd5426_vlb_device, GFX_CL_GD5426_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
{"[VLB] Diamond SpeedStar PRO SE (CL-GD5430)", "cl_gd5430_vlb", &gd5430_vlb_device, GFX_CL_GD5430_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[VLB] Diamond SpeedStar PRO SE (CL-GD5430)", "cl_gd5430_vlb", &gd5430_vlb_device, GFX_CL_GD5430_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},
{"[VLB] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_vlb",&s3_virge_vlb_device, GFX_VIRGE_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, {"[VLB] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_vlb", &s3_virge_vlb_device, GFX_VIRGE_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}},
{"[VLB] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_vlb",&s3_virge_988_vlb_device, GFX_VIRGEVX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, {"[VLB] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_vlb", &s3_virge_988_vlb_device, GFX_VIRGEVX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}},
{"[VLB] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_vlb", &s3_diamond_stealth64_vlb_device,GFX_STEALTH64_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 2, 2, 4, 26, 26, 42}}, {"[VLB] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_vlb", &s3_diamond_stealth64_vlb_device, GFX_STEALTH64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 4, 26, 26, 42}},
{"[VLB] Number Nine 9FX (S3 Trio64)", "n9_9fx_vlb", &s3_9fx_vlb_device, GFX_N9_9FX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, {"[VLB] Number Nine 9FX (S3 Trio64)", "n9_9fx_vlb", &s3_9fx_vlb_device, GFX_N9_9FX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}},
{"[VLB] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_vlb", &s3_bahamas64_vlb_device, GFX_BAHAMAS64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, {"[VLB] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_vlb", &s3_bahamas64_vlb_device, GFX_BAHAMAS64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}},
{"[VLB] Phoenix S3 Vision864", "px_vision864_vlb", &s3_phoenix_vision864_vlb_device,GFX_PHOENIX_VISION864_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 4, 4, 5, 20, 20, 35}}, {"[VLB] Phoenix S3 Vision864", "px_vision864_vlb", &s3_phoenix_vision864_vlb_device, GFX_PHOENIX_VISION864_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 5, 20, 20, 35}},
{"[VLB] Phoenix S3 Trio32", "px_trio32_vlb", &s3_phoenix_trio32_vlb_device,GFX_PHOENIX_TRIO32_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, {"[VLB] Phoenix S3 Trio32", "px_trio32_vlb", &s3_phoenix_trio32_vlb_device, GFX_PHOENIX_TRIO32_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}},
{"[VLB] Phoenix S3 Trio64", "px_trio64_vlb", &s3_phoenix_trio64_vlb_device,GFX_PHOENIX_TRIO64_VLB,VIDEO_FLAG_TYPE_SPECIAL,{VIDEO_BUS, 3, 2, 4, 25, 25, 40}}, {"[VLB] Phoenix S3 Trio64", "px_trio64_vlb", &s3_phoenix_trio64_vlb_device, GFX_PHOENIX_TRIO64_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 2, 4, 25, 25, 40}},
{"[VLB] S3 ViRGE/DX", "virge375_vlb", &s3_virge_375_vlb_device, GFX_VIRGEDX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, {"[VLB] S3 ViRGE/DX", "virge375_vlb", &s3_virge_375_vlb_device, GFX_VIRGEDX_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}},
{"[VLB] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_vlb",&s3_virge_375_4_vlb_device,GFX_VIRGEDX4_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}}, {"[VLB] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_vlb", &s3_virge_375_4_vlb_device, GFX_VIRGEDX4_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 3, 28, 28, 45}},
{"[VLB] Trident TGUI9400CXi", "tgui9400cxi_vlb", &tgui9400cxi_device, GFX_TGUI9400CXI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, {"[VLB] Trident TGUI9400CXi", "tgui9400cxi_vlb", &tgui9400cxi_device, GFX_TGUI9400CXI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}},
{"[VLB] Trident TGUI9440", "tgui9440_vlb", &tgui9440_vlb_device, GFX_TGUI9440_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}}, {"[VLB] Trident TGUI9440", "tgui9440_vlb", &tgui9440_vlb_device, GFX_TGUI9440_VLB, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 8, 16, 4, 8, 16}},
{"", "", NULL, -1 } {"", "", NULL, -1 }
}; };