diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c
index ffe582604..d13dfe041 100644
--- a/src/cpu/cpu.c
+++ b/src/cpu/cpu.c
@@ -2448,11 +2448,6 @@ cpu_CPUID(void)
                 EAX = CPUID;
                 EBX = ECX = 0;
                 EDX       = CPUID_FPU | CPUID_DE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX;
-                /*
-                   Return anything non-zero in bits 32-63 of the BIOS signature MSR
-                   to indicate there has been an update.
-                 */
-                msr.bbl_cr_dx[3] = 0xffffffff00000000ULL;
             } else
                 EAX = EBX = ECX = EDX = 0;
             break;
@@ -2467,6 +2462,11 @@ cpu_CPUID(void)
                 EAX = CPUID;
                 EBX = ECX = 0;
                 EDX       = CPUID_FPU | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_CMOV;
+                /*
+                   Return anything non-zero in bits 32-63 of the BIOS signature MSR
+                   to indicate there has been an update.
+                 */
+                msr.bbl_cr_dx[3] = 0xffffffff00000000ULL;
             } else if (EAX == 2) {
                 EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries
                                      Instruction TLB: 4 MB pages, fully associative, 2 entries
@@ -3301,7 +3301,6 @@ pentium_invalid_rdmsr:
                 case 0x88 ... 0x8b:
                     EAX = msr.bbl_cr_dx[ECX - 0x88] & 0xffffffff;
                     EDX = msr.bbl_cr_dx[ECX - 0x88] >> 32;
-                    // EDX |= 0xffffffff;
                     break;
                 /* Unknown */
                 case 0xae: