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More CPU fixes, and SMM now implemented on Cyrix Cx486 and Cx5x86 CPU's as well as on Intel/AMI SX, DX, and SX2 CPU's.

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This commit is contained in:
OBattler
2021-04-11 07:25:08 +02:00
parent 8175289c9d
commit 8b6f9707d5
12 changed files with 168 additions and 62 deletions
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12
src/cpu/x86seg.c
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@@ -227,7 +227,6 @@ void
do_seg_load(x86seg *s, uint16_t *segdat)
{
s->limit = segdat[0] | ((segdat[3] & 0x000f) << 16);
s->limit_raw = s->limit;
if (segdat[3] & 0x0080)
s->limit = (s->limit << 12) | 0xfff;
s->base = segdat[1] | ((segdat[2] & 0x00ff) << 16);
@@ -2382,9 +2381,14 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
void
cyrix_write_seg_descriptor(uint32_t addr, x86seg *seg)
{
writememl(0, addr, (seg->limit_raw & 0xffff) | (seg->base << 16));
uint32_t limit_raw = seg->limit;
if (seg->ar_high & 0x80)
limit_raw >>= 12;
writememl(0, addr, (limit_raw & 0xffff) | (seg->base << 16));
writememl(0, addr + 4, ((seg->base >> 16) & 0xff) | (seg->access << 8) |
(seg->limit_raw & 0xf0000) | (seg->ar_high << 16) |
(limit_raw & 0xf0000) | (seg->ar_high << 16) |
(seg->base & 0xff000000));
}
@@ -2420,4 +2424,6 @@ cyrix_load_seg_descriptor(uint32_t addr, x86seg *seg)
codegen_flat_ss = 0;
}
}
pclog("clsd(): NEW CS:IP = %04X:%08X (%08X)\n", CS, cpu_state.pc, cs + cpu_state.pc);
}