Merge branch 'master' of https://github.com/86Box/86Box into 86Box-master
This commit is contained in:
322
src/floppy/fdc.c
322
src/floppy/fdc.c
@@ -103,15 +103,18 @@ typedef const struct {
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static fdc_cards_t fdc_cards[] = {
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// clang-format off
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{ &device_none },
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{ &device_internal },
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{ &fdc_xt_device },
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{ &fdc_at_device },
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{ &fdc_b215_device },
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{ &fdc_pii151b_device },
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{ &fdc_pii158b_device },
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{ &fdc_monster_device },
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{ NULL }
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{ &device_none },
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{ &device_internal },
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{ &fdc_b215_device },
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{ &fdc_pii151b_device },
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{ &fdc_pii158b_device },
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{ &fdc_compaticard_i_device },
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{ &fdc_compaticard_ii_device },
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#if 0
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{ &fdc_compaticard_iv_device },
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#endif
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{ &fdc_monster_device },
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{ NULL }
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// clang-format on
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};
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@@ -177,15 +180,13 @@ fdc_ctrl_reset(void *priv)
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{
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fdc_t *fdc = (fdc_t *) priv;
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fdc->stat = 0x80;
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fdc->stat = 0x80;
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fdc->pnum = fdc->ptot = 0;
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fdc->st0 = 0;
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fdc->lock = 0;
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fdc->head = 0;
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fdc->step = 0;
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fdc->power_down = 0;
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if (!(fdc->flags & FDC_FLAG_AT))
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fdc->rate = 2;
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}
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sector_id_t
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@@ -612,9 +613,11 @@ fdc_io_command_phase1(fdc_t *fdc, int out)
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ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1);
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fdc->stat = out ? 0x10 : 0x50;
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if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma)
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if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) {
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fdc->stat |= 0x20;
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else
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if (out)
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fdc->stat |= 0x80;
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} else
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dma_set_drq(fdc->dma_ch, 1);
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}
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@@ -652,13 +655,31 @@ fdc_sis(fdc_t *fdc)
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fdc->paramstogo = 2;
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}
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static void
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fdc_soft_reset(fdc_t *fdc)
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{
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if (fdc->power_down) {
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timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC);
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fdc->interrupt = -5;
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} else {
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timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
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fdc->interrupt = -1;
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fdc->perp &= 0xfc;
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for (int i = 0; i < FDD_NUM; i++)
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ui_sb_update_icon(SB_FLOPPY | i, 0);
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fdc_ctrl_reset(fdc);
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}
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}
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static void
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fdc_write(uint16_t addr, uint8_t val, void *priv)
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{
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fdc_t *fdc = (fdc_t *) priv;
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int drive;
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int i;
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int drive_num;
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fdc_log("Write FDC %04X %02X\n", addr, val);
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@@ -682,7 +703,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
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fdc->interrupt = -1;
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ui_sb_update_icon(SB_FLOPPY | 0, 0);
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fdc_ctrl_reset(fdc);
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fdd_changed[0] = 1;
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}
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if (!fdd_get_flags(0))
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val &= 0xfe;
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@@ -699,24 +719,10 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
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fdc->stat = 0x00;
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fdc->pnum = fdc->ptot = 0;
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}
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if ((val & 4) && !(fdc->dor & 4)) {
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if (fdc->power_down) {
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timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC);
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fdc->interrupt = -5;
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} else {
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timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
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fdc->interrupt = -1;
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fdc->perp &= 0xfc;
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for (i = 0; i < FDD_NUM; i++)
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ui_sb_update_icon(SB_FLOPPY | i, 0);
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fdc_ctrl_reset(fdc);
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}
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}
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if ((val & 4) && !(fdc->dor & 4))
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fdc_soft_reset(fdc);
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/* We can now simplify this since each motor now spins separately. */
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for (i = 0; i < FDD_NUM; i++) {
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for (int i = 0; i < FDD_NUM; i++) {
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drive_num = real_drive(fdc, i);
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if ((!fdd_get_flags(drive_num)) || (drive_num >= FDD_NUM))
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val &= ~(0x10 << drive_num);
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@@ -749,28 +755,14 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
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}
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}
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return;
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case 4:
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case 4: /* DSR */
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if (!(fdc->flags & FDC_FLAG_NO_DSR_RESET)) {
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if (!(val & 0x80)) {
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timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
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fdc->interrupt = -6;
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}
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if (fdc->power_down || ((val & 0x80) && !(fdc->dsr & 0x80))) {
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if (fdc->power_down) {
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timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC);
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fdc->interrupt = -5;
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} else {
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timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
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fdc->interrupt = -1;
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fdc->perp &= 0xfc;
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for (i = 0; i < FDD_NUM; i++)
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ui_sb_update_icon(SB_FLOPPY | i, 0);
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fdc_ctrl_reset(fdc);
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}
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}
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if (fdc->power_down || ((val & 0x80) && !(fdc->dsr & 0x80)))
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fdc_soft_reset(fdc);
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}
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fdc->dsr = val;
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return;
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@@ -1231,7 +1223,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
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if (!(fdc->flags & FDC_FLAG_TOSHIBA) && !(fdc->flags & FDC_FLAG_AT) && !(fdc->flags & FDC_FLAG_UMC))
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return;
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fdc->rate = val & 0x03;
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if (fdc->flags & FDC_FLAG_PS1)
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if (fdc->flags & FDC_FLAG_PS2)
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fdc->noprec = !!(val & 0x04);
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return;
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@@ -1251,23 +1243,43 @@ fdc_read(uint16_t addr, void *priv)
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if (!fdc->power_down || ((addr & 7) == 2)) switch (addr & 7) {
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case 0: /* STA */
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if (fdc->flags & FDC_FLAG_PS1) {
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if (fdc->flags & FDC_FLAG_PS2) {
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drive = real_drive(fdc, fdc->dor & 3);
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ret = 0x00;
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/* TODO:
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Bit 2: INDEX (best return always 0 as it goes by very fast)
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*/
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if (fdc->seek_dir) /* nDIRECTION */
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if (fdc->seek_dir) /* nDIRECTION */
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ret |= 0x01;
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if (writeprot[drive]) /* WRITEPROT */
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if (writeprot[drive]) /* WRITEPROT */
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ret |= 0x02;
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if (!fdd_get_head(drive)) /* nHDSEL */
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if (!fdd_get_head(drive)) /* nHDSEL */
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ret |= 0x08;
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if (fdd_track0(drive)) /* TRK0 */
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if (fdd_track0(drive)) /* TRK0 */
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ret |= 0x10;
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if (fdc->step) /* STEP */
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if (fdc->step) /* STEP */
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ret |= 0x20;
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if (dma_get_drq(fdc->dma_ch)) /* DRQ */
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if (dma_get_drq(fdc->dma_ch)) /* DRQ */
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ret |= 0x40;
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if (fdc->fintr || fdc->reset_stat) /* INTR */
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ret |= 0x80;
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} else if (fdc->flags & FDC_FLAG_PS2_MCA) {
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drive = real_drive(fdc, fdc->dor & 3);
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ret = 0x04;
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/* TODO:
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Bit 2: nINDEX (best return always 1 as it goes by very fast)
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*/
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if (!fdc->seek_dir) /* DIRECTION */
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ret |= 0x01;
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if (!writeprot[drive]) /* nWRITEPROT */
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ret |= 0x02;
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if (fdd_get_head(drive)) /* HDSEL */
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ret |= 0x08;
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if (!fdd_track0(drive)) /* nTRK0 */
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ret |= 0x10;
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if (fdc->step) /* STEP */
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ret |= 0x20;
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if (!fdd_get_type(1)) /* -Drive 2 Installed */
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ret |= 0x40;
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if (fdc->fintr || fdc->reset_stat) /* INTR */
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ret |= 0x80;
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@@ -1295,14 +1307,12 @@ fdc_read(uint16_t addr, void *priv)
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ret = 0xff;
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break;
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case 1: /* STB */
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if (fdc->flags & FDC_FLAG_PS1) {
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if (fdc->flags & FDC_FLAG_PS2) {
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drive = real_drive(fdc, fdc->dor & 3);
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ret = 0x00;
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/* -Drive 2 Installed */
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if (!fdd_get_type(1))
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if (!fdd_get_type(1)) /* -Drive 2 Installed */
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ret |= 0x80;
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/* -Drive Select 1,0 */
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switch (drive) {
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switch (drive) { /* -Drive Select 1,0 */
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case 0:
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ret |= 0x43;
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break;
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@@ -1319,19 +1329,12 @@ fdc_read(uint16_t addr, void *priv)
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default:
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break;
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}
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}
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else if (fdc->flags & FDC_FLAG_PS2) {
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/* Status Register B (PS/2, PS/55) */
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/* | 1 | 1 | DS0 | WD TOGGLE | RD TOGGLE | WE | MOT EN1 | MOT EN0 | */
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ret = 0xc0;
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if (motoron[0]) /* Bit 0: MOT EN0 */
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ret |= 1;
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if (motoron[1]) /* Bit 1: MOT EN1 */
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ret |= 2;
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if(real_drive(fdc, fdc->dor & 3) == 0) /* Bit 5: Drive Select 0 */
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ret |= 0x20;
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}
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else {
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} else if (fdc->flags & FDC_FLAG_PS2_MCA) {
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drive = real_drive(fdc, fdc->dor & 3);
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ret = 0xc0;
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ret |= (fdc->dor & 0x01) << 5; /* Drive Select 0 */
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ret |= (fdc->dor & 0x30) >> 4; /* Motor Select 1, 0 */
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} else {
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if (is486 || !fdc->enable_3f1)
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ret = 0xff;
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else {
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@@ -1339,19 +1342,12 @@ fdc_read(uint16_t addr, void *priv)
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drive = real_drive(fdc, fdc->dor & 1);
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ret = !fdd_is_dd(drive) ? ((fdc->dor & 1) ? 2 : 1) : 0;
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} else {
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ret = 0x70;
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||||
/* TODO: What is this and what is it used for?
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It's almost identical to the PS/2 MCA mode. */
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drive = real_drive(fdc, fdc->dor & 3);
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if (drive)
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ret &= ~0x40;
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else
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ret &= ~0x20;
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||||
if (fdc->dor & 0x10)
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ret |= 1;
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||||
if (fdc->dor & 0x20)
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||||
ret |= 2;
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||||
ret = 0x70;
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ret &= ~(drive ? 0x40 : 0x20);
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ret |= (fdc->dor & 0x30) >> 4; /* Motor Select 1, 0 */
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||||
}
|
||||
}
|
||||
}
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||||
@@ -1361,7 +1357,8 @@ fdc_read(uint16_t addr, void *priv)
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||||
break;
|
||||
case 3:
|
||||
drive = real_drive(fdc, fdc->dor & 3);
|
||||
if (fdc->flags & FDC_FLAG_PS1) {
|
||||
/* TODO: FDC_FLAG_PS2_TDR? */
|
||||
if ((fdc->flags & FDC_FLAG_PS2) || (fdc->flags & FDC_FLAG_PS2_MCA)) {
|
||||
/* PS/1 Model 2121 seems return drive type in port
|
||||
* 0x3f3, despite the 82077AA fdc_t not implementing
|
||||
* this. This is presumably implemented outside the
|
||||
@@ -1433,7 +1430,7 @@ fdc_read(uint16_t addr, void *priv)
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case 7: /*Disk change*/
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||||
drive = real_drive(fdc, fdc->dor & 3);
|
||||
|
||||
if (fdc->flags & FDC_FLAG_PS1) {
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||||
if (fdc->flags & FDC_FLAG_PS2) {
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||||
if (fdc->dor & (0x10 << drive)) {
|
||||
ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x00 : 0x80;
|
||||
ret |= (fdc->dor & 0x08);
|
||||
@@ -1441,18 +1438,15 @@ fdc_read(uint16_t addr, void *priv)
|
||||
ret |= (fdc->rate & 0x03);
|
||||
} else
|
||||
ret = 0x00;
|
||||
}
|
||||
else if (fdc->flags & FDC_FLAG_PS2) {
|
||||
/* Digital Input Register (PS/2, PS/55) */
|
||||
/* | DSKCHG | 1 | 1 | 1 | 1 | DRATE1 | DRATE0 | nHDEN | */
|
||||
ret = 0x78;
|
||||
ret |= (fdc->rate & 0x03) << 1;
|
||||
if (fdc->rate == 1 || fdc->rate == 2)
|
||||
ret |= 0x01;
|
||||
if (fdc->dor & (0x10 << drive))
|
||||
ret |= (fdd_changed[drive] || drive_empty[drive]) ? 0x80 : 0x00;
|
||||
}
|
||||
else {
|
||||
} else if (fdc->flags & FDC_FLAG_PS2_MCA) {
|
||||
if (fdc->dor & (0x10 << drive)) {
|
||||
ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x80 : 0x00;
|
||||
ret |= ((fdc->rate & 0x03) << 1);
|
||||
ret |= fdc_get_densel(fdc, drive);
|
||||
ret |= 0x78;
|
||||
} else
|
||||
ret = 0xf9;
|
||||
} else {
|
||||
if (fdc->dor & (0x10 << drive)) {
|
||||
if ((drive == 1) && (fdc->flags & FDC_FLAG_TOSHIBA))
|
||||
ret = 0x00;
|
||||
@@ -1484,7 +1478,7 @@ static void
|
||||
fdc_poll_common_finish(fdc_t *fdc, int compare, int st5)
|
||||
{
|
||||
fdc_int(fdc, 1);
|
||||
if (!(fdc->flags & (FDC_FLAG_PS1 | FDC_FLAG_PS2)))
|
||||
if (!(fdc->flags & FDC_FLAG_FINTR))
|
||||
fdc->fintr = 0;
|
||||
fdc->stat = 0xD0;
|
||||
fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive;
|
||||
@@ -1786,7 +1780,7 @@ fdc_callback(void *priv)
|
||||
} else {
|
||||
fdc->interrupt = -2;
|
||||
fdc_int(fdc, 1);
|
||||
if (!(fdc->flags & (FDC_FLAG_PS1 | FDC_FLAG_PS2)))
|
||||
if (!(fdc->flags & FDC_FLAG_FINTR))
|
||||
fdc->fintr = 0;
|
||||
fdc->stat = 0xD0;
|
||||
fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->drive;
|
||||
@@ -1878,7 +1872,7 @@ fdc_error(fdc_t *fdc, int st5, int st6)
|
||||
timer_disable(&fdc->timer);
|
||||
|
||||
fdc_int(fdc, 1);
|
||||
if (!(fdc->flags & (FDC_FLAG_PS1 | FDC_FLAG_PS2)))
|
||||
if (!(fdc->flags & FDC_FLAG_FINTR))
|
||||
fdc->fintr = 0;
|
||||
fdc->stat = 0xD0;
|
||||
fdc->st0 = fdc->res[4] = 0x40 | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive;
|
||||
@@ -2287,7 +2281,7 @@ fdc_reset(void *priv)
|
||||
fdc->enable_3f1 = 1;
|
||||
|
||||
fdc_update_enh_mode(fdc, 0);
|
||||
if (fdc->flags & (FDC_FLAG_PS1 | FDC_FLAG_PS2))
|
||||
if (fdc->flags & FDC_FLAG_DENSEL_INVERT)
|
||||
fdc_update_densel_polarity(fdc, 0);
|
||||
else
|
||||
fdc_update_densel_polarity(fdc, 1);
|
||||
@@ -2334,6 +2328,9 @@ fdc_reset(void *priv)
|
||||
|
||||
fdc_ctrl_reset(fdc);
|
||||
|
||||
if (!(fdc->flags & FDC_FLAG_AT))
|
||||
fdc->rate = 2;
|
||||
|
||||
fdc->max_track = (fdc->flags & FDC_FLAG_MORE_TRACKS) ? 85 : 79;
|
||||
|
||||
fdc_remove(fdc);
|
||||
@@ -2371,8 +2368,7 @@ fdc_close(void *priv)
|
||||
static void *
|
||||
fdc_init(const device_t *info)
|
||||
{
|
||||
fdc_t *fdc = (fdc_t *) malloc(sizeof(fdc_t));
|
||||
memset(fdc, 0, sizeof(fdc_t));
|
||||
fdc_t *fdc = (fdc_t *) calloc(1, sizeof(fdc_t));
|
||||
|
||||
fdc->flags = info->local;
|
||||
|
||||
@@ -2428,7 +2424,7 @@ const device_t fdc_xt_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2442,7 +2438,7 @@ const device_t fdc_xt_sec_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2456,7 +2452,7 @@ const device_t fdc_xt_ter_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2470,7 +2466,7 @@ const device_t fdc_xt_qua_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2484,7 +2480,7 @@ const device_t fdc_xt_t1x00_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2498,7 +2494,7 @@ const device_t fdc_xt_amstrad_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2512,7 +2508,21 @@ const device_t fdc_xt_tandy_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t fdc_xt_umc_um8398_device = {
|
||||
.name = "PC/XT Floppy Drive Controller (UMC UM8398)",
|
||||
.internal_name = "fdc_xt_umc_um8398",
|
||||
.flags = 0,
|
||||
.local = FDC_FLAG_UMC,
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2526,7 +2536,7 @@ const device_t fdc_pcjr_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2540,7 +2550,7 @@ const device_t fdc_at_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2554,7 +2564,7 @@ const device_t fdc_at_sec_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2568,7 +2578,7 @@ const device_t fdc_at_ter_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2582,7 +2592,7 @@ const device_t fdc_at_qua_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2596,35 +2606,7 @@ const device_t fdc_at_actlow_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t fdc_at_ps1_device = {
|
||||
.name = "PC/AT Floppy Drive Controller (PS/1, PS/2 ISA)",
|
||||
.internal_name = "fdc_at_ps1",
|
||||
.flags = 0,
|
||||
.local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT | FDC_FLAG_PS1,
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t fdc_at_ps1_2121_device = {
|
||||
.name = "PC/AT Floppy Drive Controller (PS/1, PS/2 ISA)",
|
||||
.internal_name = "fdc_at_ps1",
|
||||
.flags = 0,
|
||||
.local = FDC_FLAG_NO_DSR_RESET | FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT | FDC_FLAG_PS1,
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2652,7 +2634,7 @@ const device_t fdc_at_smc_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2666,7 +2648,7 @@ const device_t fdc_at_ali_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2680,7 +2662,7 @@ const device_t fdc_at_winbond_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
@@ -2694,35 +2676,51 @@ const device_t fdc_at_nsc_device = {
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t fdc_dp8473_device = {
|
||||
.name = "NS DP8473 Floppy Drive Controller",
|
||||
.internal_name = "fdc_dp8473",
|
||||
const device_t fdc_at_nsc_dp8473_device = {
|
||||
.name = "PC/AT Floppy Drive Controller (NSC DP8473)",
|
||||
.internal_name = "fdc_at_nsc_dp8473",
|
||||
.flags = 0,
|
||||
.local = FDC_FLAG_AT | FDC_FLAG_NEC | FDC_FLAG_NO_DSR_RESET,
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t fdc_um8398_device = {
|
||||
.name = "UMC UM8398 Floppy Drive Controller",
|
||||
.internal_name = "fdc_um8398",
|
||||
const device_t fdc_ps2_device = {
|
||||
.name = "PS/2 Model 25/30 Floppy Drive Controller",
|
||||
.internal_name = "fdc_ps2",
|
||||
.flags = 0,
|
||||
.local = FDC_FLAG_UMC,
|
||||
.local = FDC_FLAG_FINTR | FDC_FLAG_DENSEL_INVERT | FDC_FLAG_NO_DSR_RESET | FDC_FLAG_DISKCHG_ACTLOW |
|
||||
FDC_FLAG_AT | FDC_FLAG_PS2,
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
{ .available = NULL },
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t fdc_ps2_mca_device = {
|
||||
.name = "PS/2 MCA Floppy Drive Controller",
|
||||
.internal_name = "fdc_ps2_mca",
|
||||
.flags = 0,
|
||||
.local = FDC_FLAG_FINTR | FDC_FLAG_DENSEL_INVERT | FDC_FLAG_NO_DSR_RESET | FDC_FLAG_AT |
|
||||
FDC_FLAG_PS2_MCA,
|
||||
.init = fdc_init,
|
||||
.close = fdc_close,
|
||||
.reset = fdc_reset,
|
||||
.available = NULL,
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
|
||||
Reference in New Issue
Block a user