AC97 improvements, including variable sample rate support on VIA
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@@ -79,6 +79,8 @@ ac97_codec_read(ac97_codec_t *dev, uint8_t reg)
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void
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ac97_codec_write(ac97_codec_t *dev, uint8_t reg, uint8_t val)
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{
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uint8_t i;
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ac97_codec_log("AC97 Codec %d: write(%02X, %02X)\n", dev->codec_id, reg, val);
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reg &= 0x7f;
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@@ -86,7 +88,7 @@ ac97_codec_write(ac97_codec_t *dev, uint8_t reg, uint8_t val)
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switch (reg) {
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case 0x00: case 0x01: /* Reset / ID code */
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ac97_codec_reset(dev);
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/* fall-through */
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return;
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case 0x08: case 0x09: /* Master Tone Control (optional) */
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case 0x0d: /* Phone Volume MSB */
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@@ -96,7 +98,8 @@ ac97_codec_write(ac97_codec_t *dev, uint8_t reg, uint8_t val)
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case 0x24: case 0x25: /* Audio Interrupt and Paging Mechanism (optional) */
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case 0x26: /* Powerdown Ctrl/Stat LSB */
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case 0x28: case 0x29: /* Extended Audio ID */
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//case 0x2a ... 0x59: /* Linux tests for audio capability by writing to 38-39 */
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case 0x2b: /* Extended Audio Status/Control MSB */
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//case 0x36 ... 0x59: /* Linux tests for audio capability by writing to 38-39 */
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case 0x5a ... 0x5f: /* Vendor Reserved */
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//case 0x60 ... 0x6f:
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case 0x70 ... 0x7f: /* Vendor Reserved */
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@@ -107,7 +110,7 @@ ac97_codec_write(ac97_codec_t *dev, uint8_t reg, uint8_t val)
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case 0x05: /* Aux Out Volume MSB */
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val &= 0xbf;
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/* Convert 6-bit level 1xxxxx to 011111 per specification. */
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/* Convert 6-bit level 1xxxxx to 011111. */
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if (val & 0x20) {
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val &= ~0x20;
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val |= 0x1f;
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@@ -125,7 +128,7 @@ ac97_codec_write(ac97_codec_t *dev, uint8_t reg, uint8_t val)
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case 0x06: /* Mono Volume LSB */
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val &= 0x3f;
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/* Convert 6-bit level 1xxxxx to 011111 per specification. */
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/* Convert 6-bit level 1xxxxx to 011111. */
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if (val & 0x20) {
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val &= ~0x20;
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val |= 0x1f;
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@@ -172,6 +175,34 @@ ac97_codec_write(ac97_codec_t *dev, uint8_t reg, uint8_t val)
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case 0x21: /* General Purpose MSB */
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val &= 0x83;
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break;
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case 0x2a: /* Extended Audio Status/Control LSB */
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val &= 0x0b;
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/* Reset DAC sample rates to 48 KHz if VRA is being cleared. */
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if (!(val & 0x01)) {
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for (i = 0x2c; i <= 0x30; i += 2)
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*((uint16_t *) &dev->regs[i]) = 48000;
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}
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/* Reset ADC sample rates to 48 KHz if VRM is being cleared. */
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if (!(val & 0x08)) {
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for (i = 0x32; i <= 0x34; i += 2)
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*((uint16_t *) &dev->regs[i]) = 48000;
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}
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break;
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case 0x2c ... 0x31: /* DAC Rates */
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/* Writable only if VRA is set. */
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if (!(dev->regs[0x2a] & 0x01))
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return;
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break;
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case 0x32 ... 0x35: /* ADC Rates */
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/* Writable only if VRM is set. */
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if (!(dev->regs[0x2a] & 0x08))
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return;
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break;
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}
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dev->regs[reg] = val;
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@@ -182,17 +213,28 @@ void
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ac97_codec_reset(void *priv)
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{
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ac97_codec_t *dev = (ac97_codec_t *) priv;
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uint8_t i;
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ac97_codec_log("AC97 Codec %d: reset()\n", dev->codec_id);
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memset(dev->regs, 0, sizeof(dev->regs));
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/* Mute outputs by default. */
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dev->regs[0x02] = dev->regs[0x04] = dev->regs[0x06] = 0x80;
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/* Set default level and gain values. */
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for (i = 0x02; i <= 0x18; i += 2) {
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if (i == 0x08)
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continue;
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if (i >= 0x0c)
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dev->regs[i] = 0x08;
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dev->regs[i | 1] = (i >= 0x10) ? 0x88 : 0x80;
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}
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/* Flag codec as ready. */
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dev->regs[0x26] = 0x0f;
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/* Set up variable sample rate support. */
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dev->regs[0x28] = 0x0b;
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ac97_codec_write(dev, 0x2a, 0x00); /* reset DAC/ADC sample rates */
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/* Set Codec and Vendor IDs. */
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dev->regs[0x29] = (dev->codec_id << 6) | 0x02;
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dev->regs[0x7c] = dev->vendor_id >> 16;
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@@ -227,6 +269,24 @@ ac97_codec_getattn(void *priv, uint8_t reg, int *l, int *r)
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}
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uint32_t
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ac97_codec_getrate(void *priv, uint8_t reg)
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{
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ac97_codec_t *dev = (ac97_codec_t *) priv;
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/* Get configured sample rate, which is always 48000 if VRA/VRM is not set. */
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uint32_t ret = *((uint16_t *) &dev->regs[reg]);
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/* If this is a DAC, double sample rate if DRA is set. */
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if ((reg < 0x32) && (dev->regs[0x2a] & 0x02))
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ret <<= 1;
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ac97_codec_log("AC97 Codec %d: getrate(%02X) = %d\n", dev->codec_id, reg, ret);
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return ret;
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}
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static void *
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ac97_codec_init(const device_t *info)
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{
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@@ -248,6 +308,9 @@ ac97_codec_init(const device_t *info)
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ac97_codec += sizeof(ac97_codec_t *);
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dev->codec_id = ac97_codec_id++;
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/* Initialize codec registers. */
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ac97_codec_reset(dev);
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return dev;
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}
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