Implement VIA 686A/B Super I/O and hardware monitor + a handful of fixes
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RichardG867
272
src/sio/sio_vt82c686.c
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272
src/sio/sio_vt82c686.c
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the VIA VT82C686A/B integrated Super I/O.
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*
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*
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*
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* Author: RichardG, <richardg867@gmail.com>
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* Copyright 2020 RichardG.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/pci.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/lpt.h>
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#include <86box/serial.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/sio.h>
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typedef struct {
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uint8_t config_enable, cur_reg, regs[32],
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fdc_dma, fdc_irq, uart_irq[2], lpt_dma, lpt_irq;
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fdc_t *fdc;
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serial_t *uart[2];
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} vt82c686_t;
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static uint8_t
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get_lpt_length(vt82c686_t *dev)
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{
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uint8_t length = 4;
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if ((dev->regs[0x02] & 0x03) == 0x2)
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length = 8;
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return length;
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}
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static void
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vt82c686_fdc_handler(vt82c686_t *dev)
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{
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uint16_t io_base = (dev->regs[0x03] & 0xfc) << 2;
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fdc_remove(dev->fdc);
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if (dev->regs[0x02] & 0x10)
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fdc_set_base(dev->fdc, io_base);
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fdc_set_irq(dev->fdc, dev->fdc_irq);
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}
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static void
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vt82c686_lpt_handler(vt82c686_t *dev)
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{
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uint16_t io_mask, io_base = dev->regs[0x06] << 2;
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int io_len = get_lpt_length(dev);
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io_base &= (0xff8 | io_len);
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io_mask = 0x3fc;
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if (io_len == 8)
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io_mask = 0x3f8;
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lpt1_remove();
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if (((dev->regs[0x02] & 0x03) != 0x03) && (io_base >= 0x100) && (io_base <= io_mask))
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lpt1_init(io_base);
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lpt1_irq(dev->lpt_irq);
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}
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static void
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vt82c686_serial_handler(vt82c686_t *dev, int uart)
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{
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serial_remove(dev->uart[uart]);
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if (dev->regs[0x02] & (uart ? 0x08 : 0x04))
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serial_setup(dev->uart[uart], (dev->regs[0x07 + uart] & 0xfe) << 2, dev->uart_irq[uart]);
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}
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static void
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vt82c686_write(uint16_t port, uint8_t val, void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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if (!dev->config_enable)
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return;
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if (!(port & 1)) {
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/* Registers start at 0xE0 but we cut them down to start at 0x00. */
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dev->cur_reg = (val & 0x1f);
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return;
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}
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/* Read-only registers */
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if ((dev->cur_reg < 0x02) || (dev->cur_reg == 0x04) || (dev->cur_reg == 0x05) || ((dev->cur_reg >= 0xe9) && (dev->cur_reg < 0xee)) ||
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(dev->cur_reg == 0xf3) || (dev->cur_reg == 0xf5) || (dev->cur_reg == 0xf7) || (dev->cur_reg >= 0xf9))
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return;
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switch (dev->cur_reg) {
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case 0x02:
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dev->regs[dev->cur_reg] = val;
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vt82c686_lpt_handler(dev);
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vt82c686_serial_handler(dev, 0);
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vt82c686_serial_handler(dev, 1);
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vt82c686_fdc_handler(dev);
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break;
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case 0x03:
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dev->regs[dev->cur_reg] = val;
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vt82c686_fdc_handler(dev);
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break;
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case 0x06:
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dev->regs[dev->cur_reg] = val;
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vt82c686_lpt_handler(dev);
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break;
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case 0x07:
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dev->regs[dev->cur_reg] = val;
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vt82c686_serial_handler(dev, 0);
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break;
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case 0x08:
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dev->regs[dev->cur_reg] = val;
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vt82c686_serial_handler(dev, 1);
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break;
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default:
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dev->regs[dev->cur_reg] = val;
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break;
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}
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}
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static uint8_t
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vt82c686_read(uint16_t port, void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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uint8_t ret = 0xff;
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if (!(port & 1))
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ret = dev->cur_reg | 0xe0;
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else
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ret = dev->regs[dev->cur_reg];
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return ret;
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}
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/* Writes to Super I/O-related configuration space registers
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of the VT82C686 PCI-ISA bridge are sent here by via_pipc.c */
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void
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vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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switch (addr) {
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case 0x50:
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dev->fdc_dma = val & 0x03;
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vt82c686_fdc_handler(dev);
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dev->lpt_dma = (val >> 2) & 0x03;
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vt82c686_lpt_handler(dev);
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break;
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case 0x51:
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dev->fdc_irq = val & 0x0f;
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vt82c686_fdc_handler(dev);
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dev->lpt_irq = val >> 4;
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vt82c686_lpt_handler(dev);
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break;
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case 0x52:
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dev->uart_irq[0] = val & 0x0f;
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vt82c686_serial_handler(dev, 0);
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dev->uart_irq[1] = val >> 4;
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vt82c686_serial_handler(dev, 1);
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break;
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case 0x85:
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io_removehandler(0x3f0, 0x0002,
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vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
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if (val & 0x01)
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io_sethandler(0x3f0, 0x0002,
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vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
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dev->config_enable = val & 0x02;
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break;
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}
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}
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static void
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vt82c686_reset(vt82c686_t *dev)
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{
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memset(dev->regs, 0, 20);
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dev->regs[0x00] = 0x3c;
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dev->regs[0x02] = 0x03;
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dev->regs[0x03] = 0xfc;
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dev->regs[0x06] = 0xde;
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dev->regs[0x07] = 0xfe;
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dev->regs[0x08] = 0xbe;
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fdc_reset(dev->fdc);
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serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
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serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
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vt82c686_lpt_handler(dev);
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vt82c686_serial_handler(dev, 0);
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vt82c686_serial_handler(dev, 1);
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vt82c686_fdc_handler(dev);
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vt82c686_sio_write(0x85, 0x00, dev);
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}
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static void
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vt82c686_close(void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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free(dev);
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}
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static void *
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vt82c686_init(const device_t *info)
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{
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vt82c686_t *dev = (vt82c686_t *) malloc(sizeof(vt82c686_t));
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memset(dev, 0, sizeof(vt82c686_t));
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dev->fdc = device_add(&fdc_at_smc_device);
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dev->fdc_dma = 2;
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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dev->lpt_dma = 3;
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vt82c686_reset(dev);
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return dev;
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}
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const device_t via_vt82c686_sio_device = {
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"VIA VT82C686 Integrated Super I/O",
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0,
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0,
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vt82c686_init, vt82c686_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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