claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions 3 Packages Projects Releases Wiki Activity

More HWM fixes.

Browse Source
This commit is contained in:
OBattler
2021-07-04 21:03:28 +02:00
parent 29c8e36e6e
commit 8e14514660
4 changed files with 16 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/device/hwm_gl518sm.c
View File

@@ -41,7 +41,7 @@ typedef struct {
uint16_t regs[32]; uint16_t regs[32];
uint8_t addr_register: 5; uint8_t addr_register: 5;
uint8_t i2c_addr: 7, i2c_state: 2; uint8_t i2c_addr: 7, i2c_state: 2, i2c_enabled: 1;
} gl518sm_t; } gl518sm_t;
@@ -78,12 +78,14 @@ gl518sm_remap(gl518sm_t *dev, uint8_t addr)
{ {
gl518sm_log("GL518SM: remapping to SMBus %02Xh\n", addr); gl518sm_log("GL518SM: remapping to SMBus %02Xh\n", addr);
i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev); if (dev->i2c_enabled)
i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev);
if (addr < 0x80) if (addr < 0x80)
i2c_sethandler(i2c_smbus, addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev); i2c_sethandler(i2c_smbus, addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev);
dev->i2c_addr = addr; dev->i2c_addr = addr & 0x7f;
dev->i2c_enabled = !(addr & 0x80);
} }
@@ -244,6 +246,8 @@ gl518sm_reset(gl518sm_t *dev)
dev->regs[0x0b] = 0xdac5; dev->regs[0x0b] = 0xdac5;
dev->regs[0x0c] = 0xdac5; dev->regs[0x0c] = 0xdac5;
dev->regs[0x0f] = 0xf8; dev->regs[0x0f] = 0xf8;
gl518sm_remap(dev, dev->i2c_addr | (dev->i2c_enabled ? 0x00 : 0x80));
} }

4
src/device/hwm_lm75.c
View File

@@ -194,7 +194,7 @@ lm75_remap(lm75_t *dev, uint8_t addr)
i2c_sethandler(i2c_smbus, addr, 1, lm75_i2c_start, lm75_i2c_read, lm75_i2c_write, NULL, dev); i2c_sethandler(i2c_smbus, addr, 1, lm75_i2c_start, lm75_i2c_read, lm75_i2c_write, NULL, dev);
dev->i2c_addr = addr & 0x7f; dev->i2c_addr = addr & 0x7f;
dev->i2c_enabled = !!(addr & 0x80); dev->i2c_enabled = !(addr & 0x80);
} }
@@ -204,7 +204,7 @@ lm75_reset(lm75_t *dev)
dev->regs[0x3] = 0x4b; dev->regs[0x3] = 0x4b;
dev->regs[0x5] = 0x50; dev->regs[0x5] = 0x50;
lm75_remap(dev, dev->local & 0x7f); lm75_remap(dev, dev->i2c_addr | (dev->i2c_enabled ? 0x00 : 0x80));
} }

10
src/device/hwm_lm78.c
View File

@@ -72,7 +72,7 @@ typedef struct {
}; };
uint8_t addr_register, data_register; uint8_t addr_register, data_register;
uint8_t i2c_addr: 7, i2c_state: 1; uint8_t i2c_addr: 7, i2c_state: 1, i2c_enabled: 1;
} lm78_t; } lm78_t;
@@ -315,7 +315,7 @@ lm78_reset(void *priv)
dev->regs[0x49] = 0x40; dev->regs[0x49] = 0x40;
} }
lm78_remap(dev, dev->i2c_addr); lm78_remap(dev, dev->i2c_addr | (dev->i2c_enabled ? 0x00 : 0x80));
} }
@@ -665,12 +665,14 @@ lm78_remap(lm78_t *dev, uint8_t addr)
lm78_log("LM78: remapping to SMBus %02Xh\n", addr); lm78_log("LM78: remapping to SMBus %02Xh\n", addr);
i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev); if (dev->i2c_enabled)
i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev);
if (addr < 0x80) if (addr < 0x80)
i2c_sethandler(i2c_smbus, addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev); i2c_sethandler(i2c_smbus, addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev);
dev->i2c_addr = addr; dev->i2c_addr = addr & 0x7f;
dev->i2c_enabled = !(addr & 0x80);
if (dev->local & LM78_AS99127F) { if (dev->local & LM78_AS99127F) {
/* Store our handle on the primary LM75 device to ensure reads/writes /* Store our handle on the primary LM75 device to ensure reads/writes

2
src/include/86box/hwm.h
View File

@@ -36,7 +36,7 @@ typedef struct {
uint8_t regs[8]; uint8_t regs[8];
uint8_t addr_register; uint8_t addr_register;
uint8_t i2c_addr: 7, i2c_state: 2; uint8_t i2c_addr: 7, i2c_state: 2;
uint8_t i2c_enabled; uint8_t i2c_enabled: 1;
} lm75_t; } lm75_t;