Various 486 improvements
- Added SL-Enhanced versions of Intel 486 CPUs and Enhanced AMD Am486DX2/DX4 CPUs - Cleaned up the 486 CPU types and updated intel_4x0.c to reflect this - Fixed some incorrect EDX reset and CPUID values - Blacklisted non-SMM capable 486 CPUs on the Soyo 4SA2 motherboard - Merged the non-OverDrive and OverDrive Intel DX4s because of further research confirming them to be functionally identical - Removed SMM support on early 486 CPUs
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@@ -50,18 +50,12 @@ enum {
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CPU_i486SX, /* 486 class CPUs */
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CPU_Am486SX,
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CPU_Cx486S,
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CPU_i486SX2,
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CPU_Am486SX2,
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CPU_i486DX,
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CPU_Am486DX,
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CPU_Cx486DX,
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CPU_i486DX2,
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CPU_Am486DX2,
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CPU_Cx486DX2,
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CPU_iDX4,
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CPU_Am486DX4,
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CPU_Cx486DX4,
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CPU_Am5x86,
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CPU_i486SX_SLENH,
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CPU_i486DX_SLENH,
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CPU_ENH_Am486DX,
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CPU_Cx5x86,
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CPU_P24T,
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CPU_WINCHIP, /* 586 class CPUs */
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@@ -482,8 +476,8 @@ extern double fpu_multi;
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extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
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penalties when crossing 8-byte boundaries*/
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extern int is8086, is286, is386, is486, is486sx, is486dx, is486sx2, is486dx2, isdx4;
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extern int is_am486, is_486_org, is_pentium, is_k5, is_k6, is_p6, is_cxsmm;
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extern int is8086, is286, is386, is486;
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extern int is_am486, is_pentium, is_k5, is_k6, is_p6, is_cxsmm;
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extern int hascache;
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extern int isibm486;
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extern int is_rapidcad;
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