From 8f258514065aca7a1c526f0c1890f28c5924d95b Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 22 Dec 2024 04:09:55 +0100 Subject: [PATCH] Pentium II: Change BIOS update signature to non-zero on CPUID with EAX = 1, fixes microcode update error messages on some BIOS'es. --- src/cpu/cpu.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index e89b52e62..ffce2b146 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -2432,6 +2432,11 @@ cpu_CPUID(void) EAX = CPUID; EBX = ECX = 0; EDX = CPUID_FPU | CPUID_DE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX; + /* + Return anything non-zero in bits 32-63 of the BIOS signature MSR + to indicate there has been an update. + */ + msr.bbl_cr_dx[3] = 0xffffffff00000000ULL; } else EAX = EBX = ECX = EDX = 0; break; @@ -2470,6 +2475,11 @@ cpu_CPUID(void) EAX = CPUID; EBX = ECX = 0; EDX = CPUID_FPU | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_CMOV; + /* + Return anything non-zero in bits 32-63 of the BIOS signature MSR + to indicate there has been an update. + */ + msr.bbl_cr_dx[3] = 0xffffffff00000000ULL; } else if (EAX == 2) { EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries Instruction TLB: 4 MB pages, fully associative, 2 entries @@ -2493,6 +2503,11 @@ cpu_CPUID(void) EAX = CPUID; EBX = ECX = 0; EDX = CPUID_FPU | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_FXSR | CPUID_CMOV | CPUID_PSE36; + /* + Return anything non-zero in bits 32-63 of the BIOS signature MSR + to indicate there has been an update. + */ + msr.bbl_cr_dx[3] = 0xffffffff00000000ULL; } else if (EAX == 2) { EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries Instruction TLB: 4 MB pages, fully associative, 2 entries @@ -3250,6 +3265,7 @@ pentium_invalid_rdmsr: case 0x88 ... 0x8b: EAX = msr.bbl_cr_dx[ECX - 0x88] & 0xffffffff; EDX = msr.bbl_cr_dx[ECX - 0x88] >> 32; + // EDX |= 0xffffffff; break; /* Unknown */ case 0xae: