diff --git a/src/machine/m_at_4gpv31.c b/src/machine/m_at_4gpv31.c new file mode 100644 index 000000000..34c20aba8 --- /dev/null +++ b/src/machine/m_at_4gpv31.c @@ -0,0 +1,101 @@ +/* Emulation for C&T 82C206 ("NEAT") chipset. */ +#include +#include +#include +#include +#include "../86box.h" +#include "../io.h" +#include "machine.h" + + +static uint8_t neat_regs[256]; +static int neat_index; +static int neat_emspage[4]; + + +static void +neat_write(uint16_t port, uint8_t val, void *priv) +{ + switch (port) { + case 0x22: + neat_index = val; + break; + + case 0x23: + neat_regs[neat_index] = val; + switch (neat_index) { + case 0x6E: /*EMS page extension*/ + neat_emspage[3] = (neat_emspage[3] & 0x7F) | (( val & 3) << 7); + neat_emspage[2] = (neat_emspage[2] & 0x7F) | (((val >> 2) & 3) << 7); + neat_emspage[1] = (neat_emspage[1] & 0x7F) | (((val >> 4) & 3) << 7); + neat_emspage[0] = (neat_emspage[0] & 0x7F) | (((val >> 6) & 3) << 7); + break; + } + break; + + case 0x0208: case 0x0209: case 0x4208: case 0x4209: + case 0x8208: case 0x8209: case 0xC208: case 0xC209: + neat_emspage[port >> 14] = (neat_emspage[port >> 14] & 0x180) | (val & 0x7F); + break; + } +} + + +static uint8_t +neat_read(uint16_t port, void *priv) +{ + uint8_t ret = 0xff; + + switch (port) { + case 0x22: + ret = neat_index; + break; + + case 0x23: + ret = neat_regs[neat_index]; + break; + } + + return(ret); +} + + +#if NOT_USED +static void +neat_writeems(uint32_t addr, uint8_t val) +{ + ram[(neat_emspage[(addr >> 14) & 3] << 14) + (addr & 0x3FFF)] = val; +} + + +static uint8_t +neat_readems(uint32_t addr) +{ + return ram[(neat_emspage[(addr >> 14) & 3] << 14) + (addr & 0x3FFF)]; +} +#endif + + +static void +neat_init(void) +{ + io_sethandler(0x0022, 2, + neat_read,NULL,NULL, neat_write,NULL,NULL, NULL); + io_sethandler(0x0208, 2, + neat_read,NULL,NULL, neat_write,NULL,NULL, NULL); + io_sethandler(0x4208, 2, + neat_read,NULL,NULL, neat_write,NULL,NULL, NULL); + io_sethandler(0x8208, 2, + neat_read,NULL,NULL, neat_write,NULL,NULL, NULL); + io_sethandler(0xc208, 2, + neat_read,NULL,NULL, neat_write,NULL,NULL, NULL); +} + + +void +machine_at_4gpv31_init(machine_t *model) +{ + machine_at_init(model); + + neat_init(); +} diff --git a/src/machine/machine.h b/src/machine/machine.h index 319c5ad1e..85cd82555 100644 --- a/src/machine/machine.h +++ b/src/machine/machine.h @@ -8,7 +8,7 @@ * * Handling of the emulated machines. * - * Version: @(#)machine.h 1.0.13 2017/11/22 + * Version: @(#)machine.h 1.0.14 2017/12/04 * * Authors: Sarah Walker, * Miran Grca, @@ -136,6 +136,8 @@ extern void machine_at_r418_init(machine_t *); extern void machine_at_wd76c10_init(machine_t *); +extern void machine_at_4gpv31_init(machine_t *); + extern void machine_pcjr_init(machine_t *); extern void machine_ps1_m2011_init(machine_t *); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index a22599b71..b1754ecc0 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -8,7 +8,7 @@ * * Handling of the emulated machines. * - * Version: @(#)machine_table.c 1.0.4 2017/11/22 + * Version: @(#)machine_table.c 1.0.5 2017/12/04 * * Authors: Sarah Walker, * Miran Grca, @@ -99,6 +99,8 @@ machine_t machines[] = { { "[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL, nvr_at_close }, + { "[Socket 4] Green-B 4GP V3.1", ROM_4GPV31, "4gpv31", {{"Intel", cpus_i486}, {"Intel",cpus_Pentium5V},{"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486},{"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_4gpv31_init, NULL, nvr_at_close }, + { "[Socket 4 LX] Intel Premiere/PCI", ROM_REVENGE, "revenge", {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_batman_init, NULL, nvr_at_close }, { "[Socket 5 NX] Intel Premiere/PCI II", ROM_PLATO, "plato", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_plato_init, NULL, nvr_at_close }, diff --git a/src/mouse_bus.c b/src/mouse_bus.c index 2496a8f7e..db59fcce8 100644 --- a/src/mouse_bus.c +++ b/src/mouse_bus.c @@ -49,7 +49,7 @@ * only the Logitech part is considered to * be OK. * - * Version: @(#)mouse_bus.c 1.0.24 2017/12/03 + * Version: @(#)mouse_bus.c 1.0.25 2017/12/04 * * Authors: Fred N. van Kempen, * @@ -358,7 +358,6 @@ lt_write(mouse_t *dev, uint16_t port, uint8_t val) dev->x = dev->y = 0; if (dev->but) dev->but |= 0x80; - dev->seq = 0; } } @@ -398,25 +397,15 @@ lt_read(mouse_t *dev, uint16_t port) switch (port) { case LTMOUSE_DATA: /* [00] data register */ - /* - * Regardless of which subcommand used, the first - * one has to return the state of the buttons. - */ - if (! dev->seq) { - ret = 0x07; - if (dev->but & 0x01) /*LEFT*/ - ret &= ~0x04; - if (dev->but & 0x02) /*RIGHT*/ - ret &= ~0x01; - if (dev->flags & FLAG_3BTN) - if (dev->but & 0x04) /*MIDDLE*/ - ret &= ~0x02; - ret <<= 5; - } else { - dev->seq++; - - ret = 0x00; - } + ret = 0x07; + if (dev->but & 0x01) /*LEFT*/ + ret &= ~0x04; + if (dev->but & 0x02) /*RIGHT*/ + ret &= ~0x01; + if (dev->flags & FLAG_3BTN) + if (dev->but & 0x04) /*MIDDLE*/ + ret &= ~0x02; + ret <<= 5; switch(dev->r_ctrl & LTCTRL_RD_MASK) { case LTCTRL_RD_X_LO: /* X, low bits */ diff --git a/src/rom.c b/src/rom.c index 4fd9d9429..50e192220 100644 --- a/src/rom.c +++ b/src/rom.c @@ -13,7 +13,7 @@ * - c386sx16 BIOS fails checksum * - the loadfont() calls should be done elsewhere * - * Version: @(#)rom.c 1.0.19 2017/11/11 + * Version: @(#)rom.c 1.0.20 2017/12/04 * * Authors: Sarah Walker, * Miran Grca, @@ -807,6 +807,12 @@ rom_load_bios(int rom_id) biosmask = 0x1ffff; return(1); + case ROM_4GPV31: + if (! rom_load_linear( + L"roms/machines/green-b/4gpv31-ami-1993-8273517.bin", + 0x000000, 65536, 0, rom)) break; + return(1); + default: pclog("ROM: don't know how to handle ROM set %d !\n", rom_id); } diff --git a/src/rom.h b/src/rom.h index f4fd8e67c..57821a7fc 100644 --- a/src/rom.h +++ b/src/rom.h @@ -8,7 +8,7 @@ * * Definitions for the ROM image handler. * - * Version: @(#)rom.h 1.0.4 2017/11/11 + * Version: @(#)rom.h 1.0.5 2017/12/04 * * Author: Fred N. van Kempen, * Copyright 2017 Fred N. van Kempen. @@ -116,6 +116,9 @@ enum { ROM_PRESIDENT, /* President Award 430FX PCI/430FX/Award/Unknown SIO */ ROM_IBMPS2_M80_486, + + ROM_4GPV31, /* Green-B 4GPV3.1 ISA/VLB 486/Pentium, AMI */ + ROM_OPENAT, /* PC/AT clone with Open BIOS */ ROM_MAX diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 63029a7bc..50d00212f 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -8,7 +8,7 @@ # # Makefile for Win32 (MinGW32) environment. # -# Version: @(#)Makefile.mingw 1.0.81 2017/11/25 +# Version: @(#)Makefile.mingw 1.0.82 2017/12/04 # # Authors: Miran Grca, # Fred N. van Kempen, @@ -352,6 +352,7 @@ MCHOBJ := machine.o machine_table.o \ m_at_430lx_nx.o m_at_430fx.o \ m_at_430hx.o m_at_430vx.o \ m_at_440fx.o \ + m_at_4gpv31.o \ m_pcjr.o m_ps1.o m_ps2_isa.o m_ps2_mca.o DEVOBJ := bugger.o lpt.o $(SERIAL) \ diff --git a/src/win/win.c b/src/win/win.c index 375b8fb4c..74f7ec835 100644 --- a/src/win/win.c +++ b/src/win/win.c @@ -8,7 +8,7 @@ * * Platform main support module for Windows. * - * Version: @(#)win.c 1.0.40 2017/12/03 + * Version: @(#)win.c 1.0.40 2017/12/04 * * Authors: Sarah Walker, * Miran Grca,