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Added the AOpen AP61 and fixed floppies on the LG IBM 440 FX.

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This commit is contained in:
OBattler
2024-01-24 04:56:31 +01:00
parent a21b8d865d
commit 9107c2fa25
8 changed files with 139 additions and 92 deletions
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56
src/cpu/cpu.c
View File

@@ -2372,10 +2372,10 @@ cpu_CPUID(void)
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_CMOV;
} else if (EAX == 2) {
if (!strcmp(machine_get_internal_name(), "ap61")) {
/* if (!strcmp(machine_get_internal_name(), "ap61")) {
EAX = 0x00000001;
EDX = 0x00000000;
} else {
} else */ {
EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries
Instruction TLB: 4 MB pages, fully associative, 2 entries
Data TLB: 4 KB pages, 4-way set associative, 64 entries */
@@ -2799,7 +2799,9 @@ amd_k_invalid_rdmsr:
case CPU_PENTIUM2:
case CPU_PENTIUM2D:
EAX = EDX = 0;
switch (ECX) {
/* Per RichardG's probing of a real Deschutes using my RDMSR tool,
we have discovered that the top 18 bits are filtered out. */
switch (ECX & 0x00003fff) {
case 0x00:
case 0x01:
break;
@@ -2821,6 +2823,11 @@ amd_k_invalid_rdmsr:
EDX = msr.apic_base >> 32;
cpu_log("APIC_BASE read : %08X%08X\n", EDX, EAX);
break;
/* Unknown (undocumented?) MSR used by the Hyper-V BIOS. */
case 0x20:
EAX = msr.ecx20 & 0xffffffff;
EDX = msr.ecx20 >> 32;
break;
case 0x2a:
EAX = 0xc4000000;
EDX = 0;
@@ -3022,26 +3029,6 @@ amd_k_invalid_rdmsr:
EAX = msr.ecx570 & 0xffffffff;
EDX = msr.ecx570 >> 32;
break;
case 0x1002ff:
EAX = msr.ecx1002ff & 0xffffffff;
EDX = msr.ecx1002ff >> 32;
break;
case 0x40000020:
EAX = msr.ecx40000020 & 0xffffffff;
EDX = msr.ecx40000020 >> 32;
break;
case 0xf0f00250:
EAX = msr.ecxf0f00250 & 0xffffffff;
EDX = msr.ecxf0f00250 >> 32;
break;
case 0xf0f00258:
EAX = msr.ecxf0f00258 & 0xffffffff;
EDX = msr.ecxf0f00258 >> 32;
break;
case 0xf0f00259:
EAX = msr.ecxf0f00259 & 0xffffffff;
EDX = msr.ecxf0f00259 >> 32;
break;
default:
i686_invalid_rdmsr:
cpu_log("RDMSR: Invalid MSR: %08X\n", ECX);
@@ -3303,7 +3290,9 @@ amd_k_invalid_wrmsr:
case CPU_PENTIUMPRO:
case CPU_PENTIUM2:
case CPU_PENTIUM2D:
switch (ECX) {
/* Per RichardG's probing of a real Deschutes using my RDMSR tool,
we have discovered that the top 18 bits are filtered out. */
switch (ECX & 0x00003fff) {
case 0x00:
case 0x01:
if (EAX || EDX)
@@ -3318,6 +3307,10 @@ amd_k_invalid_wrmsr:
msr.apic_base = EAX | ((uint64_t) EDX << 32);
#endif
break;
/* Unknown (undocumented?) MSR used by the Hyper-V BIOS. */
case 0x20:
msr.ecx20 = EAX | ((uint64_t) EDX << 32);
break;
case 0x2a:
break;
case 0x79:
@@ -3462,21 +3455,6 @@ amd_k_invalid_wrmsr:
case 0x570:
msr.ecx570 = EAX | ((uint64_t) EDX << 32);
break;
case 0x1002ff:
msr.ecx1002ff = EAX | ((uint64_t) EDX << 32);
break;
case 0x40000020:
msr.ecx40000020 = EAX | ((uint64_t) EDX << 32);
break;
case 0xf0f00250:
msr.ecxf0f00250 = EAX | ((uint64_t) EDX << 32);
break;
case 0xf0f00258:
msr.ecxf0f00258 = EAX | ((uint64_t) EDX << 32);
break;
case 0xf0f00259:
msr.ecxf0f00259 = EAX | ((uint64_t) EDX << 32);
break;
default:
i686_invalid_wrmsr:
cpu_log("WRMSR: Invalid MSR: %08X\n", ECX);

17
src/cpu/cpu.h
View File

@@ -253,6 +253,12 @@ typedef struct {
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t apic_base; /* 0x0000001b - Should the Pentium not also have this? */
/* Weird long MSR's used by the Hyper-V BIOS. */
uint64_t ecx20; /* 0x00000020, really 0x40000020, but we filter out the top 18 bits
like a real Deschutes does. */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t ecx79; /* 0x00000079 */
/* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */
@@ -314,9 +320,6 @@ typedef struct {
/* IBM 486SLC and 486BL MSR's */
uint64_t ibm_por2; /* 0x00001002 - Processor Operation Register */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t ecx1002ff; /* 0x001002ff - MSR used by some Intel AMI boards */
/* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */
uint64_t amd_efer; /* 0xc0000080 */
@@ -338,14 +341,6 @@ typedef struct {
/* K6-3, K6-2P, and K6-3P MSR's */
uint64_t amd_l2aar; /* 0xc0000089 */
/* Weird long MSR's used by the Hyper-V BIOS. */
uint64_t ecx40000020; /* 0x40000020 */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t ecxf0f00250; /* 0xf0f00250 - Some weird long MSR's used by i686 AMI & some Phoenix BIOSes */
uint64_t ecxf0f00258; /* 0xf0f00258 */
uint64_t ecxf0f00259; /* 0xf0f00259 */
} msr_t;
typedef struct {