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Next round of sonarlint cleanups

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This commit is contained in:
Jasmine Iwanek
2023-06-26 22:31:03 -04:00
parent b3bd55da17
commit 922c4335ae
90 changed files with 1455 additions and 1023 deletions
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3
src/device/cartridge.c
View File

@@ -29,8 +29,7 @@
#include <86box/machine.h>
#include <86box/cartridge.h>
typedef struct
{
typedef struct cart_t {
uint8_t *buf;
uint32_t base;
} cart_t;

9
src/device/cassette.c
View File

@@ -552,9 +552,8 @@ pc_cas_print_state(UNUSED(const pc_cassette_t *cas))
static void
pc_cas_clock_pcm(pc_cassette_t *cas, unsigned long cnt)
{
unsigned long i;
unsigned long n;
int v = 0;
uint64_t n;
int v = 0;
n = cas->srate * cnt + cas->clk_pcm;
@@ -567,11 +566,11 @@ pc_cas_clock_pcm(pc_cassette_t *cas, unsigned long cnt)
}
if (cas->save) {
for (i = 0; i < n; i++) {
for (uint64_t i = 0; i < n; i++) {
pc_cas_write_smp(cas, cas->pcm_out_val);
}
} else {
for (i = 0; i < n; i++) {
for (uint64_t i = 0; i < n; i++) {
v = pc_cas_read_smp(cas);
}

15
src/device/clock_ics9xxx.c
View File

@@ -52,26 +52,26 @@ ics9xxx_log(const char *fmt, ...)
,
#define agp_div ram_mult /* temporarily saves space while neither field matters */
typedef struct {
typedef struct ics9xxx_frequency_t {
uint16_t bus : 15;
uint8_t ram_mult : 2; /* change to full float when this becomes useful */
uint8_t pci_div : 3;
} ics9xxx_frequency_t;
typedef struct {
typedef struct ics9xxx_model_t {
#if defined(ENABLE_ICS9xxx_LOG) || defined(ENABLE_ICS9xxx_DETECT)
const char *name; /* populated by macro */
#endif
uint8_t max_reg : 3; /* largest register index */
uint8_t regs[7]; /* default registers */
struct { /* for each hardware frequency select bit [FS0:FS4]: */
struct fs_regs { /* for each hardware frequency select bit [FS0:FS4]: */
uint8_t normal_reg : 3; /* which register (or -1) for non-inverted input (FSn) */
uint8_t normal_bit : 3; /* which bit (0-7) for non-inverted input (FSn) */
uint8_t inv_reg : 3; /* which register (or -1) for inverted input (FSn#) */
uint8_t inv_bit : 3; /* which bit (0-7) for inverted input (FSn#) */
} fs_regs[5];
uint8_t normal_bits_fixed : 1; /* set to 1 if the non-inverted bits are straps (hardware select only) */
struct { /* hardware select bit, which should be cleared for hardware select (latched inputs), or set for programming */
struct hw_select { /* hardware select bit, which should be cleared for hardware select (latched inputs), or set for programming */
uint8_t normal_reg : 3; /* which register (or -1) */
uint8_t normal_bit : 3; /* which bit (0-7) */
} hw_select;
@@ -80,7 +80,7 @@ typedef struct {
const ics9xxx_frequency_t *frequencies; /* frequency table, if not using another model's table */
} ics9xxx_model_t;
typedef struct {
typedef struct ics9xxx_t {
uint8_t model_idx;
ics9xxx_model_t *model;
device_t *dyn_device;
@@ -942,7 +942,10 @@ ics9xxx_detect(ics9xxx_t *dev)
if (!(dev->regs[detect_reg] & 0x40))
pclog("Bit 3 of register %d is clear, probably in hardware select mode!\n", detect_reg);
uint8_t i = 0, matches = 0, val, bitmask;
uint8_t i = 0;
uint8_t matches = 0;
uint8_t val;
uint8_t bitmask;
ics9xxx_frequency_t *frequencies_ptr;
uint32_t delta;
for (uint8_t j = 0; j < ICS9xxx_MAX; j++) {

17
src/device/hasp.c
View File

@@ -52,9 +52,11 @@ enum {
HASP_TYPE_SAVQUEST = 0
};
typedef struct {
const uint8_t *password, *prodinfo;
const uint8_t password_size, prodinfo_size;
typedef struct hasp_type_t {
const uint8_t *password;
const uint8_t *prodinfo;
const uint8_t password_size;
const uint8_t prodinfo_size;
} hasp_type_t;
typedef struct
@@ -62,8 +64,13 @@ typedef struct
void *lpt;
const hasp_type_t *type;
int index, state, passindex, passmode, prodindex;
uint8_t tmppass[0x29], status;
int index;
int state;
int passindex;
int passmode;
int prodindex;
uint8_t tmppass[0x29];
uint8_t status;
} hasp_t;
static const hasp_type_t hasp_types[] = {

6
src/device/hwm_gl518sm.c
View File

@@ -36,14 +36,16 @@
#define GL518SM_VOLTAGE_TO_REG(v) ((uint8_t) round((v) / 19.0))
#define GL518SM_VDD_TO_REG(v) ((uint8_t) (((v) *4) / 95.0))
typedef struct {
typedef struct gl518sm_t {
uint32_t local;
hwm_values_t *values;
uint16_t regs[32];
uint8_t addr_register : 5;
uint8_t i2c_addr : 7, i2c_state : 2, i2c_enabled : 1;
uint8_t i2c_addr : 7;
uint8_t i2c_state : 2;
uint8_t i2c_enabled : 1;
} gl518sm_t;
static uint8_t gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv);

3
src/device/hwm_lm75.c
View File

@@ -167,6 +167,9 @@ lm75_i2c_write(UNUSED(void *bus), UNUSED(uint8_t addr), uint8_t data, void *priv
case 0x3: /* Tos */
lm75_write(dev, (dev->i2c_state == 1) ? 0x5 : 0x6, data);
break;
default:
break;
}
}

15
src/device/hwm_lm78.c
View File

@@ -49,7 +49,7 @@
#define LM78_NEG_VOLTAGE(v, r) (v * (604.0 / ((double) r))) /* negative voltage formula from the W83781D datasheet */
#define LM78_NEG_VOLTAGE2(v, r) (((3600 + v) * (((double) r) / (((double) r) + 56.0))) - v) /* negative voltage formula from the W83782D datasheet */
typedef struct {
typedef struct lm78_t {
uint32_t local;
hwm_values_t *values;
device_t *lm75[2];
@@ -57,10 +57,10 @@ typedef struct {
uint8_t regs[256];
union {
struct {
struct w83782d {
uint8_t regs[2][16];
} w83782d;
struct {
struct as99127f {
uint8_t regs[3][128];
uint8_t nvram[1024], nvram_i2c_state : 2, nvram_updated : 1;
@@ -70,9 +70,12 @@ typedef struct {
uint8_t security_i2c_state : 1, security_addr_register : 7;
} as99127f;
};
uint8_t addr_register, data_register;
uint8_t addr_register;
uint8_t data_register;
uint8_t i2c_addr : 7, i2c_state : 1, i2c_enabled : 1;
uint8_t i2c_addr : 7;
uint8_t i2c_state : 1;
uint8_t i2c_enabled : 1;
} lm78_t;
static void lm78_remap(lm78_t *dev, uint8_t addr);
@@ -624,6 +627,7 @@ lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank)
i2c_sethandler(i2c_smbus, (val & 0xf8) >> 1, 4, lm78_nvram_start, lm78_nvram_read, lm78_nvram_write, NULL, dev);
}
break;
default:
break;
}
@@ -707,6 +711,7 @@ lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val)
resetx86();
}
break;
default:
break;
}

3
src/device/hwm_vt82c686.c
View File

@@ -33,7 +33,7 @@
#define VT82C686_TEMP_TO_REG(t) (-1.160370e-10 * (t * t * t * t * t * t) + 3.193693e-08 * (t * t * t * t * t) - 1.464447e-06 * (t * t * t * t) - 2.525453e-04 * (t * t * t) + 1.424593e-02 * (t * t) + 2.148941e+00 * t + 7.275808e+01)
#define VT82C686_VOLTAGE_TO_REG(v, f) CLAMP((((v) * (2.628 / (f))) - 120.5) / 25, 0, 255)
typedef struct {
typedef struct vt82c686_t {
hwm_values_t *values;
uint8_t enable;
@@ -114,6 +114,7 @@ vt82c686_write(uint16_t port, uint8_t val, void *priv)
case 0x48:
val &= 0x7f;
break;
default:
break;
}

5
src/device/i2c.c
View File

@@ -38,9 +38,10 @@ typedef struct _i2c_ {
struct _i2c_ *prev, *next;
} i2c_t;
typedef struct {
typedef struct i2c_bus_t {
char *name;
i2c_t *devices[NADDRS], *last[NADDRS];
i2c_t *devices[NADDRS];
i2c_t *last[NADDRS];
} i2c_bus_t;
void *i2c_smbus;

13
src/device/i2c_gpio.c
View File

@@ -24,11 +24,18 @@
#include <86box/86box.h>
#include <86box/i2c.h>
typedef struct {
typedef struct i2c_gpio_t {
char *bus_name;
void *i2c;
uint8_t prev_scl, prev_sda, slave_sda, started,
slave_addr_received, slave_addr, slave_read, pos, byte;
uint8_t prev_scl;
uint8_t prev_sda;
uint8_t slave_sda;
uint8_t started;
uint8_t slave_addr_received;
uint8_t slave_addr;
uint8_t slave_read;
uint8_t pos;
uint8_t byte;
} i2c_gpio_t;
#ifdef ENABLE_I2C_GPIO_LOG

7
src/device/ibm_5161.c
View File

@@ -30,8 +30,7 @@
#include <86box/port_92.h>
#include <86box/machine.h>
typedef struct
{
typedef struct ibm_5161_t {
uint8_t regs[8];
} ibm_5161_t;
@@ -86,9 +85,9 @@ ibm_5161_in(uint16_t port, void *priv)
}
static void
ibm_5161_close(void *p)
ibm_5161_close(void *priv)
{
ibm_5161_t *dev = (ibm_5161_t *) p;
ibm_5161_t *dev = (ibm_5161_t *) priv;
free(dev);
}

20
src/device/isamem.c
View File

@@ -112,7 +112,7 @@
#define EXTRAM_HIGH 1
#define EXTRAM_XMS 2
typedef struct {
typedef struct emsreg_t {
int8_t enabled; /* 1=ENABLED */
uint8_t page; /* page# in EMS RAM */
uint8_t frame; /* (varies with board) */
@@ -121,15 +121,15 @@ typedef struct {
mem_mapping_t mapping; /* mapping entry for page */
} emsreg_t;
typedef struct {
typedef struct ext_ram_t {
uint32_t base;
uint8_t *ptr;
} ext_ram_t;
typedef struct {
typedef struct memdev_t {
const char *name;
uint8_t board : 6, /* board type */
reserved : 2;
uint8_t board : 6; /* board type */
uint8_t reserved : 2;
uint8_t flags;
#define FLAG_CONFIG 0x01 /* card is configured */
@@ -138,12 +138,12 @@ typedef struct {
#define FLAG_EMS 0x40 /* card has EMS mode enabled */
uint16_t total_size; /* configured size in KB */
uint32_t base_addr, /* configured I/O address */
start_addr, /* configured memory start */
frame_addr; /* configured frame address */
uint32_t base_addr; /* configured I/O address */
uint32_t start_addr; /* configured memory start */
uint32_t frame_addr; /* configured frame address */
uint16_t ems_size, /* EMS size in KB */
ems_pages; /* EMS size in pages */
uint16_t ems_size; /* EMS size in KB */
uint16_t ems_pages; /* EMS size in pages */
uint32_t ems_start; /* start of EMS in RAM */
uint8_t *ram; /* allocated RAM buffer */

59
src/device/isapnp.c
View File

@@ -82,34 +82,48 @@ enum {
typedef struct _isapnp_device_ {
uint8_t number;
uint8_t regs[256];
uint8_t mem_upperlimit, irq_types, io_16bit, io_len[8];
uint8_t mem_upperlimit;
uint8_t irq_types;
uint8_t io_16bit;
uint8_t io_len[8];
const isapnp_device_config_t *defaults;
struct _isapnp_device_ *next;
} isapnp_device_t;
typedef struct _isapnp_card_ {
uint8_t enable, state, csn, id_checksum, serial_read, serial_read_pair, serial_read_pos, *rom;
uint16_t rom_pos, rom_size;
uint8_t enable;
uint8_t state;
uint8_t csn;
uint8_t id_checksum;
uint8_t serial_read;
uint8_t serial_read_pair;
uint8_t serial_read_pos;
uint8_t *rom;
uint16_t rom_pos;
uint16_t rom_size;
void *priv;
/* ISAPnP memory and I/O addresses are awkwardly big endian, so we populate this
structure whenever something on some device changes, and pass it on instead. */
isapnp_device_config_t config;
void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv);
void (*csn_changed)(uint8_t csn, void *priv);
void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv);
void (*csn_changed)(uint8_t csn, void *priv);
uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv);
void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv);
void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv);
isapnp_device_t *first_ld;
struct _isapnp_card_ *next;
} isapnp_card_t;
typedef struct {
uint8_t reg, key_pos : 5;
uint8_t reg;
uint8_t key_pos : 5;
uint16_t read_data_addr;
isapnp_card_t *first_card, *isolated_card, *current_ld_card;
isapnp_card_t *first_card;
isapnp_card_t *isolated_card;
isapnp_card_t *current_ld_card;
isapnp_device_t *current_ld;
} isapnp_t;
@@ -122,36 +136,35 @@ isapnp_device_config_changed(isapnp_card_t *card, isapnp_device_t *ld)
/* Populate config structure, performing endianness conversion as needed. */
card->config.activate = ld->regs[0x30] & 0x01;
uint8_t i;
uint8_t reg_base;
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = 0x40 + (8 * i);
card->config.mem[i].base = (ld->regs[reg_base] << 16) | (ld->regs[reg_base + 1] << 8);
card->config.mem[i].size = (ld->regs[reg_base + 3] << 16) | (ld->regs[reg_base + 4] << 8);
if (ld->regs[reg_base + 2] & 0x01) /* upper limit */
card->config.mem[i].size -= card->config.mem[i].base;
}
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i));
card->config.mem32[i].base = (ld->regs[reg_base] << 24) | (ld->regs[reg_base + 1] << 16) | (ld->regs[reg_base + 2] << 8) | ld->regs[reg_base + 3];
card->config.mem32[i].size = (ld->regs[reg_base + 5] << 24) | (ld->regs[reg_base + 6] << 16) | (ld->regs[reg_base + 7] << 8) | ld->regs[reg_base + 8];
if (ld->regs[reg_base + 4] & 0x01) /* upper limit */
card->config.mem32[i].size -= card->config.mem32[i].base;
}
for (i = 0; i < 8; i++) {
for (uint8_t i = 0; i < 8; i++) {
reg_base = 0x60 + (2 * i);
if (ld->regs[0x31] & 0x02)
card->config.io[i].base = 0; /* let us handle I/O range check reads */
else
card->config.io[i].base = (ld->regs[reg_base] << 8) | ld->regs[reg_base + 1];
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x70 + (2 * i);
card->config.irq[i].irq = ld->regs[reg_base];
card->config.irq[i].level = ld->regs[reg_base + 1] & 0x02;
card->config.irq[i].type = ld->regs[reg_base + 1] & 0x01;
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x74 + i;
card->config.dma[i].dma = ld->regs[reg_base];
}
@@ -170,10 +183,9 @@ isapnp_reset_ld_config(isapnp_device_t *ld)
/* Populate configuration registers. */
ld->regs[0x30] = !!config->activate;
uint8_t i;
uint8_t reg_base;
uint32_t size;
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = 0x40 + (8 * i);
ld->regs[reg_base] = config->mem[i].base >> 16;
ld->regs[reg_base + 1] = config->mem[i].base >> 8;
@@ -183,7 +195,7 @@ isapnp_reset_ld_config(isapnp_device_t *ld)
ld->regs[reg_base + 3] = size >> 16;
ld->regs[reg_base + 4] = size >> 8;
}
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i));
ld->regs[reg_base] = config->mem32[i].base >> 24;
ld->regs[reg_base + 1] = config->mem32[i].base >> 16;
@@ -197,17 +209,17 @@ isapnp_reset_ld_config(isapnp_device_t *ld)
ld->regs[reg_base + 7] = size >> 8;
ld->regs[reg_base + 8] = size;
}
for (i = 0; i < 8; i++) {
for (uint8_t i = 0; i < 8; i++) {
reg_base = 0x60 + (2 * i);
ld->regs[reg_base] = config->io[i].base >> 8;
ld->regs[reg_base + 1] = config->io[i].base;
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x70 + (2 * i);
ld->regs[reg_base] = config->irq[i].irq;
ld->regs[reg_base + 1] = (!!config->irq[i].level << 1) | !!config->irq[i].type;
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x74 + i;
ld->regs[reg_base] = config->dma[i].dma;
}
@@ -222,15 +234,14 @@ isapnp_reset_ld_regs(isapnp_device_t *ld)
ld->regs[0x74] = ld->regs[0x75] = ISAPNP_DMA_DISABLED;
/* Set the upper limit bit on memory ranges which require it. */
uint8_t i;
for (i = 0; i < 4; i++)
for (uint8_t i = 0; i < 4; i++)
ld->regs[0x42 + (8 * i)] |= !!(ld->mem_upperlimit & (1 << i));
ld->regs[0x7a] |= !!(ld->mem_upperlimit & (1 << 4));
for (i = 1; i < 4; i++)
for (uint8_t i = 1; i < 4; i++)
ld->regs[0x84 + (16 * i)] |= !!(ld->mem_upperlimit & (1 << (4 + i)));
/* Set the default IRQ type bits. */
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
if (ld->irq_types & (0x1 << (4 * i)))
ld->regs[0x70 + (2 * i)] = 0x02;
else if (ld->irq_types & (0x2 << (4 * i)))

20
src/device/isartc.c
View File

@@ -90,7 +90,7 @@
#define ISARTC_DEBUG 0
typedef struct {
typedef struct rtcdev_t {
const char *name; /* board name */
uint8_t board; /* board type */
@@ -103,18 +103,18 @@ typedef struct {
uint32_t base_addr; /* configured I/O address */
/* Fields for the specific driver. */
void (*f_wr)(uint16_t, uint8_t, void *);
void (*f_wr)(uint16_t, uint8_t, void *);
uint8_t (*f_rd)(uint16_t, void *);
int8_t year; /* register for YEAR value */
char pad[3];
int8_t year; /* register for YEAR value */
char pad[3];
nvr_t nvr; /* RTC/NVR */
} rtcdev_t;
/************************************************************************
* *
* Driver for the NatSemi MM58167 chip. *
* *
* *
* Driver for the NatSemi MM58167 chip. *
* *
************************************************************************/
#define MM67_REGS 32
@@ -499,9 +499,9 @@ mm67_write(uint16_t port, uint8_t val, void *priv)
}
/************************************************************************
* *
* Generic code for all supported chips. *
* *
* *
* Generic code for all supported chips. *
* *
************************************************************************/
/* Initialize the device for use. */

34
src/device/kbc_at.c
View File

@@ -104,12 +104,27 @@ enum {
STATE_SCAN_AUX /* KBC is waiting for the auxiliary command response. */
};
typedef struct {
uint8_t state, command, command_phase, status,
wantdata, ib, ob, sc_or,
mem_addr, p1, p2, old_p2,
misc_flags, ami_flags, key_ctrl_queue_start, key_ctrl_queue_end,
val, channel, stat_hi, pending;
typedef struct atkbc_t {
uint8_t state;
uint8_t command;
uint8_t command_phase;
uint8_t status;
uint8_t wantdata;
uint8_t ib;
uint8_t ob;
uint8_t sc_or;
uint8_t mem_addr;
uint8_t p1;
uint8_t p2;
uint8_t old_p2;
uint8_t misc_flags;
uint8_t ami_flags;
uint8_t key_ctrl_queue_start;
uint8_t key_ctrl_queue_end;
uint8_t val;
uint8_t channel;
uint8_t stat_hi;
uint8_t pending;
uint8_t mem[0x100];
@@ -308,7 +323,7 @@ static void
kbc_send_to_ob(atkbc_t *dev, uint8_t val, uint8_t channel, uint8_t stat_hi)
{
uint8_t kbc_ven = dev->flags & KBC_VEN_MASK;
int temp = (channel == 1) ? kbc_translate(dev, val) : val;
uint8_t temp = (channel == 1) ? kbc_translate(dev, val) : val;
if (temp == -1)
return;
@@ -429,7 +444,8 @@ kbc_scan_kbd_at(atkbc_t *dev)
}
}
static void write_p2(atkbc_t *dev, uint8_t val);
static void
write_p2(atkbc_t *dev, uint8_t val);
static void
kbc_at_poll_at(atkbc_t *dev)
@@ -1299,6 +1315,7 @@ write64_olivetti(void *priv, uint8_t val)
kbc_delay_to_ob(dev, (0x0c | (is386 ? 0x00 : 0x80)) & 0xdf, 0, 0x00);
dev->p1 = ((dev->p1 + 1) & 3) | (dev->p1 & 0xfc);
return 0;
default:
break;
}
@@ -1339,6 +1356,7 @@ write60_toshiba(void *priv, uint8_t val)
kbc_at_log("ATkbc: T3100e - set color/mono switch\n");
t3100e_mono_set(val);
return 0;
default:
break;
}

2
src/device/keyboard.c
View File

@@ -167,6 +167,7 @@ keyboard_input(int down, uint16_t scan)
case 0x138: /* Right Alt */
shift |= 0x40;
break;
default:
break;
}
@@ -199,6 +200,7 @@ keyboard_input(int down, uint16_t scan)
case 0x046:
scroll_lock ^= 1;
break;
default:
break;
}

2
src/device/keyboard_at.c
View File

@@ -67,7 +67,7 @@ uint8_t keyboard_set3_all_break;
/* Global keyboard mode:
Bits 0 - 1 = scan code set. */
uint8_t keyboard_mode = 0x02;
uint8_t keyboard_mode = 0x02;
static atkbc_dev_t *SavedKbd = NULL;

10
src/device/keyboard_xt.c
View File

@@ -68,14 +68,18 @@
#define KBD_TYPE_PRAVETZ 10
#define KBD_TYPE_XTCLONE 11
typedef struct {
typedef struct xtkbd_t {
int want_irq;
int blocked;
int tandy;
uint8_t pa, pb, pd, clock;
uint8_t pa;
uint8_t pb;
uint8_t pd;
uint8_t clock;
uint8_t key_waiting;
uint8_t type, pravetz_flags;
uint8_t type;
uint8_t pravetz_flags;
pc_timer_t send_delay_timer;
} xtkbd_t;

2
src/device/mouse.c
View File

@@ -32,7 +32,7 @@
#include <86box/mouse.h>
#include <86box/plat_unused.h>
typedef struct {
typedef struct mouse_t {
const device_t *device;
} mouse_t;

32
src/device/mouse_bus.c
View File

@@ -133,16 +133,26 @@ static const uint8_t periods[4] = { 30, 50, 100, 200 };
/* Our mouse device. */
typedef struct mouse {
uint8_t current_b, control_val,
config_val, sig_val,
command_val, pad;
uint8_t current_b;
uint8_t control_val;
uint8_t config_val;
uint8_t sig_val;
uint8_t command_val;
uint8_t pad;
int8_t current_x, current_y;
int8_t current_x;
int8_t current_y;
int base, irq, bn, flags,
mouse_delayed_dx, mouse_delayed_dy,
mouse_buttons, mouse_buttons_last,
toggle_counter, timer_enabled;
int base;
int irq;
int bn;
int flags;
int mouse_delayed_dx;
int mouse_delayed_dy;
int mouse_buttons;
int mouse_buttons_last;
int toggle_counter;
int timer_enabled;
double period;
pc_timer_t timer; /* mouse event timer */
@@ -217,6 +227,7 @@ lt_read(uint16_t port, void *priv)
else
return 0xff;
break;
default:
break;
}
@@ -252,6 +263,7 @@ ms_read(uint16_t port, void *priv)
case INP_CTRL_COMMAND:
value = dev->control_val;
break;
default:
bm_log("ERROR: Reading data port in unsupported mode 0x%02x\n", dev->control_val);
}
@@ -266,6 +278,7 @@ ms_read(uint16_t port, void *priv)
case INP_PORT_CONFIG:
bm_log("ERROR: Unsupported read from port 0x%04x\n", port);
break;
default:
break;
}
@@ -388,6 +401,7 @@ ms_write(uint16_t port, uint8_t val, void *priv)
case INP_CTRL_READ_Y:
dev->command_val = val & 0x07;
break;
default:
bm_log("ERROR: Unsupported command written to port 0x%04x (value = 0x%02x)\n", port, val);
}
@@ -437,6 +451,7 @@ ms_write(uint16_t port, uint8_t val, void *priv)
dev->control_val &= INP_PERIOD_MASK;
dev->control_val |= (val & ~INP_PERIOD_MASK);
return;
default:
bm_log("ERROR: Unsupported period written to port 0x%04x (value = 0x%02x)\n", port, val);
}
@@ -444,6 +459,7 @@ ms_write(uint16_t port, uint8_t val, void *priv)
dev->control_val = val;
break;
default:
bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val);
}

54
src/device/mouse_serial.c
View File

@@ -48,27 +48,40 @@ enum {
REPORT_PHASE_TRANSMIT
};
typedef struct {
const char *name; /* name of this device */
int8_t type, /* type of this device */
port;
uint8_t flags, but, /* device flags */
want_data,
status, format,
prompt, on_change,
id_len, id[255],
data_len, data[5];
int abs_x, abs_y,
rel_x, rel_y,
rel_z,
oldb, lastb;
typedef struct mouse_t {
const char *name; /* name of this device */
int8_t type; /* type of this device */
int8_t port;
uint8_t flags; /* device flags */
uint8_t but;
uint8_t want_data;
uint8_t status;
uint8_t format;
uint8_t prompt;
uint8_t on_change;
uint8_t id_len;
uint8_t id[255];
uint8_t data_len;
uint8_t data[5];
int abs_x;
int abs_y;
int rel_x;
int rel_y;
int rel_z;
int oldb;
int lastb;
int command_pos, command_phase,
report_pos, report_phase,
command_enabled, report_enabled;
double transmit_period, report_period,
auto_period;
pc_timer_t command_timer, report_timer;
int command_pos;
int command_phase;
int report_pos;
int report_phase;
int command_enabled;
int report_enabled;
double transmit_period;
double report_period;
double auto_period;
pc_timer_t command_timer;
pc_timer_t report_timer;
serial_t *serial;
} mouse_t;
@@ -734,6 +747,7 @@ ltsermouse_write(UNUSED(struct serial_s *serial), void *priv, uint8_t data)
case 0x6B:
ltsermouse_command_phase(dev, PHASE_BUTTONS);
break;
default:
break;
}

49
src/device/mouse_wacom_tablet.c
View File

@@ -66,37 +66,49 @@ static const uint32_t wacom_resolution_values[4] = {
1270
};
typedef struct {
typedef struct mouse_wacom_t {
const char *name; /* name of this device */
int8_t type, /* type of this device */
port;
uint8_t flags, but, /* device flags */
status, bits,
data_rec[0x200];
int abs_x, abs_y,
rel_x, rel_y,
oldb, b;
int8_t type; /* type of this device */
int8_t port;
uint8_t flags; /* device flags */
uint8_t but;
uint8_t status;
uint8_t bits;
uint8_t data_rec[0x200];
int abs_x;
int abs_y;
int rel_x;
int rel_y;
int oldb;
int b;
Fifo8 data;
int data_rec_pos, mode, interval;
int increment, suppressed_increment;
int data_rec_pos;
int mode;
int interval;
int increment;
int suppressed_increment;
int transmission_stopped;
int reset;
int transmit_id, transmit_id_pending;
int transmit_id;
int transmit_id_pending;
int pressure_mode;
int suppressed, measurement;
int suppressed;
int measurement;
int remote_req;
uint32_t x_res, y_res;
const wacom_tablet_id* tablet_type;
uint32_t x_res;
uint32_t y_res;
const wacom_tablet_id *tablet_type;
int last_abs_x, last_abs_y; /* Suppressed/Increment Mode. */
int last_abs_x; /* Suppressed/Increment Mode. */
int last_abs_y; /* Suppressed/Increment Mode. */
union {
uint32_t settings; /* Settings DWORD */
/* We don't target any architectures except x86/x64/ARM32/ARM64.
(The ABIs for those are explicit in little-endian bit ordering) */
struct {
struct settings_bits {
uint8_t remote_mode : 1;
uint8_t bitpad_two_cursor_data : 1;
uint8_t mm961_orientation : 1;
@@ -128,7 +140,8 @@ typedef struct {
};
double transmit_period;
double old_tsc, reset_tsc;
double old_tsc;
double reset_tsc;
pc_timer_t report_timer;
serial_t *serial;

11
src/device/pci_bridge.c
View File

@@ -47,10 +47,10 @@
#define AGP_BRIDGE_VIA(x) (((x) >> 16) == 0x1106)
#define AGP_BRIDGE(x) ((x) >= AGP_BRIDGE_ALI_M5243)
typedef struct
{
typedef struct pci_bridge_t {
uint32_t local;
uint8_t type, ctl;
uint8_t type;
uint8_t ctl;
uint8_t regs[256];
uint8_t bus_index;
@@ -483,7 +483,6 @@ pci_bridge_init(const device_t *info)
uint8_t interrupt_count;
uint8_t interrupt_mask;
uint8_t slot_count;
uint8_t i;
pci_bridge_t *dev = (pci_bridge_t *) malloc(sizeof(pci_bridge_t));
memset(dev, 0, sizeof(pci_bridge_t));
@@ -499,7 +498,7 @@ pci_bridge_init(const device_t *info)
interrupt_count = sizeof(interrupts);
interrupt_mask = interrupt_count - 1;
if (dev->slot < 32) {
for (i = 0; i < interrupt_count; i++)
for (uint8_t i = 0; i < interrupt_count; i++)
interrupts[i] = pci_get_int(dev->slot, PCI_INTA + i);
}
pci_bridge_log("PCI Bridge %d: upstream bus %02X slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, (dev->slot >> 5) & 0xff, dev->slot & 31, interrupts[0], interrupts[1], interrupts[2], interrupts[3]);
@@ -509,7 +508,7 @@ pci_bridge_init(const device_t *info)
else
slot_count = 1; /* AGP bridges always have 1 slot */
for (i = 0; i < slot_count; i++) {
for (uint8_t i = 0; i < slot_count; i++) {
/* Interrupts for bridge slots are assigned in round-robin: ABCD, BCDA, CDAB and so on. */
pci_bridge_log("PCI Bridge %d: downstream slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, i, interrupts[i & interrupt_mask], interrupts[(i + 1) & interrupt_mask], interrupts[(i + 2) & interrupt_mask], interrupts[(i + 3) & interrupt_mask]);
pci_register_bus_slot(dev->bus_index, i, AGP_BRIDGE(dev->local) ? PCI_CARD_AGP : PCI_CARD_NORMAL,

298
src/device/phoenix_486_jumper.c
View File

@@ -1,149 +1,149 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Phoenix 486 Jumper Readout
*
*
*
* Authors: Tiseno100
*
* Copyright 2020 Tiseno100
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/plat_unused.h>
/*
Bit 7 = Super I/O chip: 1 = enabled, 0 = disabled;
Bit 6 = Graphics card: 1 = standalone, 0 = on-board;
Bit 5 = ???? (if 1, siren and hangs);
Bit 4 = ????;
Bit 3 = ????;
Bit 2 = ????;
Bit 1 = ????;
Bit 0 = ????.
*/
typedef struct
{
uint8_t type, jumper;
} phoenix_486_jumper_t;
#ifdef ENABLE_PHOENIX_486_JUMPER_LOG
int phoenix_486_jumper_do_log = ENABLE_PHOENIX_486_JUMPER_LOG;
static void
phoenix_486_jumper_log(const char *fmt, ...)
{
va_list ap;
if (phoenix_486_jumper_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define phoenix_486_jumper_log(fmt, ...)
#endif
static void
phoenix_486_jumper_write(UNUSED(uint16_t addr), uint8_t val, void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
phoenix_486_jumper_log("Phoenix 486 Jumper: Write %02x\n", val);
if (dev->type == 1)
dev->jumper = val & 0xbf;
else
dev->jumper = val;
}
static uint8_t
phoenix_486_jumper_read(UNUSED(uint16_t addr), void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
phoenix_486_jumper_log("Phoenix 486 Jumper: Read %02x\n", dev->jumper);
return dev->jumper;
}
static void
phoenix_486_jumper_reset(void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
if (dev->type == 1)
dev->jumper = 0x00;
else {
dev->jumper = 0x9f;
if (gfxcard[0] != 0x01)
dev->jumper |= 0x40;
}
}
static void
phoenix_486_jumper_close(void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
free(dev);
}
static void *
phoenix_486_jumper_init(const device_t *info)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) malloc(sizeof(phoenix_486_jumper_t));
memset(dev, 0, sizeof(phoenix_486_jumper_t));
dev->type = info->local;
phoenix_486_jumper_reset(dev);
io_sethandler(0x0078, 0x0001, phoenix_486_jumper_read, NULL, NULL, phoenix_486_jumper_write, NULL, NULL, dev);
return dev;
}
const device_t phoenix_486_jumper_device = {
.name = "Phoenix 486 Jumper Readout",
.internal_name = "phoenix_486_jumper",
.flags = 0,
.local = 0,
.init = phoenix_486_jumper_init,
.close = phoenix_486_jumper_close,
.reset = phoenix_486_jumper_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t phoenix_486_jumper_pci_device = {
.name = "Phoenix 486 Jumper Readout (PCI machines)",
.internal_name = "phoenix_486_jumper_pci",
.flags = 0,
.local = 1,
.init = phoenix_486_jumper_init,
.close = phoenix_486_jumper_close,
.reset = phoenix_486_jumper_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Phoenix 486 Jumper Readout
*
*
*
* Authors: Tiseno100
*
* Copyright 2020 Tiseno100
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/plat_unused.h>
/*
Bit 7 = Super I/O chip: 1 = enabled, 0 = disabled;
Bit 6 = Graphics card: 1 = standalone, 0 = on-board;
Bit 5 = ???? (if 1, siren and hangs);
Bit 4 = ????;
Bit 3 = ????;
Bit 2 = ????;
Bit 1 = ????;
Bit 0 = ????.
*/
typedef struct phoenix_486_jumper_t {
uint8_t type;
uint8_t jumper;
} phoenix_486_jumper_t;
#ifdef ENABLE_PHOENIX_486_JUMPER_LOG
int phoenix_486_jumper_do_log = ENABLE_PHOENIX_486_JUMPER_LOG;
static void
phoenix_486_jumper_log(const char *fmt, ...)
{
va_list ap;
if (phoenix_486_jumper_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define phoenix_486_jumper_log(fmt, ...)
#endif
static void
phoenix_486_jumper_write(UNUSED(uint16_t addr), uint8_t val, void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
phoenix_486_jumper_log("Phoenix 486 Jumper: Write %02x\n", val);
if (dev->type == 1)
dev->jumper = val & 0xbf;
else
dev->jumper = val;
}
static uint8_t
phoenix_486_jumper_read(UNUSED(uint16_t addr), void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
phoenix_486_jumper_log("Phoenix 486 Jumper: Read %02x\n", dev->jumper);
return dev->jumper;
}
static void
phoenix_486_jumper_reset(void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
if (dev->type == 1)
dev->jumper = 0x00;
else {
dev->jumper = 0x9f;
if (gfxcard[0] != 0x01)
dev->jumper |= 0x40;
}
}
static void
phoenix_486_jumper_close(void *priv)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv;
free(dev);
}
static void *
phoenix_486_jumper_init(const device_t *info)
{
phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) malloc(sizeof(phoenix_486_jumper_t));
memset(dev, 0, sizeof(phoenix_486_jumper_t));
dev->type = info->local;
phoenix_486_jumper_reset(dev);
io_sethandler(0x0078, 0x0001, phoenix_486_jumper_read, NULL, NULL, phoenix_486_jumper_write, NULL, NULL, dev);
return dev;
}
const device_t phoenix_486_jumper_device = {
.name = "Phoenix 486 Jumper Readout",
.internal_name = "phoenix_486_jumper",
.flags = 0,
.local = 0,
.init = phoenix_486_jumper_init,
.close = phoenix_486_jumper_close,
.reset = phoenix_486_jumper_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t phoenix_486_jumper_pci_device = {
.name = "Phoenix 486 Jumper Readout (PCI machines)",
.internal_name = "phoenix_486_jumper_pci",
.flags = 0,
.local = 1,
.init = phoenix_486_jumper_init,
.close = phoenix_486_jumper_close,
.reset = phoenix_486_jumper_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

12
src/device/serial_passthrough.c
View File

@@ -361,12 +361,12 @@ static const device_config_t serial_passthrough_config[] = {
// clang-format on
const device_t serial_passthrough_device = {
.name = "Serial Passthrough Device",
.flags = 0,
.local = 0,
.init = serial_passthrough_dev_init,
.close = serial_passthrough_dev_close,
.reset = NULL,
.name = "Serial Passthrough Device",
.flags = 0,
.local = 0,
.init = serial_passthrough_dev_init,
.close = serial_passthrough_dev_close,
.reset = NULL,
{ .poll = NULL },
.speed_changed = serial_passthrough_speed_changed,
.force_redraw = NULL,