claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Next round of sonarlint cleanups

Browse Source
This commit is contained in:
Jasmine Iwanek
2023-06-26 22:31:03 -04:00
parent b3bd55da17
commit 922c4335ae
90 changed files with 1455 additions and 1023 deletions
Download Patch File Download Diff File Expand all files Collapse all files

59
src/device/isapnp.c
View File

@@ -82,34 +82,48 @@ enum {
typedef struct _isapnp_device_ {
uint8_t number;
uint8_t regs[256];
uint8_t mem_upperlimit, irq_types, io_16bit, io_len[8];
uint8_t mem_upperlimit;
uint8_t irq_types;
uint8_t io_16bit;
uint8_t io_len[8];
const isapnp_device_config_t *defaults;
struct _isapnp_device_ *next;
} isapnp_device_t;
typedef struct _isapnp_card_ {
uint8_t enable, state, csn, id_checksum, serial_read, serial_read_pair, serial_read_pos, *rom;
uint16_t rom_pos, rom_size;
uint8_t enable;
uint8_t state;
uint8_t csn;
uint8_t id_checksum;
uint8_t serial_read;
uint8_t serial_read_pair;
uint8_t serial_read_pos;
uint8_t *rom;
uint16_t rom_pos;
uint16_t rom_size;
void *priv;
/* ISAPnP memory and I/O addresses are awkwardly big endian, so we populate this
structure whenever something on some device changes, and pass it on instead. */
isapnp_device_config_t config;
void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv);
void (*csn_changed)(uint8_t csn, void *priv);
void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv);
void (*csn_changed)(uint8_t csn, void *priv);
uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv);
void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv);
void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv);
isapnp_device_t *first_ld;
struct _isapnp_card_ *next;
} isapnp_card_t;
typedef struct {
uint8_t reg, key_pos : 5;
uint8_t reg;
uint8_t key_pos : 5;
uint16_t read_data_addr;
isapnp_card_t *first_card, *isolated_card, *current_ld_card;
isapnp_card_t *first_card;
isapnp_card_t *isolated_card;
isapnp_card_t *current_ld_card;
isapnp_device_t *current_ld;
} isapnp_t;
@@ -122,36 +136,35 @@ isapnp_device_config_changed(isapnp_card_t *card, isapnp_device_t *ld)
/* Populate config structure, performing endianness conversion as needed. */
card->config.activate = ld->regs[0x30] & 0x01;
uint8_t i;
uint8_t reg_base;
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = 0x40 + (8 * i);
card->config.mem[i].base = (ld->regs[reg_base] << 16) | (ld->regs[reg_base + 1] << 8);
card->config.mem[i].size = (ld->regs[reg_base + 3] << 16) | (ld->regs[reg_base + 4] << 8);
if (ld->regs[reg_base + 2] & 0x01) /* upper limit */
card->config.mem[i].size -= card->config.mem[i].base;
}
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i));
card->config.mem32[i].base = (ld->regs[reg_base] << 24) | (ld->regs[reg_base + 1] << 16) | (ld->regs[reg_base + 2] << 8) | ld->regs[reg_base + 3];
card->config.mem32[i].size = (ld->regs[reg_base + 5] << 24) | (ld->regs[reg_base + 6] << 16) | (ld->regs[reg_base + 7] << 8) | ld->regs[reg_base + 8];
if (ld->regs[reg_base + 4] & 0x01) /* upper limit */
card->config.mem32[i].size -= card->config.mem32[i].base;
}
for (i = 0; i < 8; i++) {
for (uint8_t i = 0; i < 8; i++) {
reg_base = 0x60 + (2 * i);
if (ld->regs[0x31] & 0x02)
card->config.io[i].base = 0; /* let us handle I/O range check reads */
else
card->config.io[i].base = (ld->regs[reg_base] << 8) | ld->regs[reg_base + 1];
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x70 + (2 * i);
card->config.irq[i].irq = ld->regs[reg_base];
card->config.irq[i].level = ld->regs[reg_base + 1] & 0x02;
card->config.irq[i].type = ld->regs[reg_base + 1] & 0x01;
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x74 + i;
card->config.dma[i].dma = ld->regs[reg_base];
}
@@ -170,10 +183,9 @@ isapnp_reset_ld_config(isapnp_device_t *ld)
/* Populate configuration registers. */
ld->regs[0x30] = !!config->activate;
uint8_t i;
uint8_t reg_base;
uint32_t size;
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = 0x40 + (8 * i);
ld->regs[reg_base] = config->mem[i].base >> 16;
ld->regs[reg_base + 1] = config->mem[i].base >> 8;
@@ -183,7 +195,7 @@ isapnp_reset_ld_config(isapnp_device_t *ld)
ld->regs[reg_base + 3] = size >> 16;
ld->regs[reg_base + 4] = size >> 8;
}
for (i = 0; i < 4; i++) {
for (uint8_t i = 0; i < 4; i++) {
reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i));
ld->regs[reg_base] = config->mem32[i].base >> 24;
ld->regs[reg_base + 1] = config->mem32[i].base >> 16;
@@ -197,17 +209,17 @@ isapnp_reset_ld_config(isapnp_device_t *ld)
ld->regs[reg_base + 7] = size >> 8;
ld->regs[reg_base + 8] = size;
}
for (i = 0; i < 8; i++) {
for (uint8_t i = 0; i < 8; i++) {
reg_base = 0x60 + (2 * i);
ld->regs[reg_base] = config->io[i].base >> 8;
ld->regs[reg_base + 1] = config->io[i].base;
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x70 + (2 * i);
ld->regs[reg_base] = config->irq[i].irq;
ld->regs[reg_base + 1] = (!!config->irq[i].level << 1) | !!config->irq[i].type;
}
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
reg_base = 0x74 + i;
ld->regs[reg_base] = config->dma[i].dma;
}
@@ -222,15 +234,14 @@ isapnp_reset_ld_regs(isapnp_device_t *ld)
ld->regs[0x74] = ld->regs[0x75] = ISAPNP_DMA_DISABLED;
/* Set the upper limit bit on memory ranges which require it. */
uint8_t i;
for (i = 0; i < 4; i++)
for (uint8_t i = 0; i < 4; i++)
ld->regs[0x42 + (8 * i)] |= !!(ld->mem_upperlimit & (1 << i));
ld->regs[0x7a] |= !!(ld->mem_upperlimit & (1 << 4));
for (i = 1; i < 4; i++)
for (uint8_t i = 1; i < 4; i++)
ld->regs[0x84 + (16 * i)] |= !!(ld->mem_upperlimit & (1 << (4 + i)));
/* Set the default IRQ type bits. */
for (i = 0; i < 2; i++) {
for (uint8_t i = 0; i < 2; i++) {
if (ld->irq_types & (0x1 << (4 * i)))
ld->regs[0x70 + (2 * i)] = 0x02;
else if (ld->irq_types & (0x2 << (4 * i)))