Implemented the Intel 420EX combined northbridge and southbridge, added the ASUS PVI-486AP4, and overhauled SMRAM handling (which also implements some previously missing extended SMRAM features of the 440BX+ and VIA Apollo series of chipsets).

This commit is contained in:
OBattler
2020-06-12 23:29:12 +02:00
parent 2920ad25f3
commit 92a1425896
14 changed files with 1109 additions and 169 deletions

View File

@@ -536,8 +536,8 @@ load_machine(void)
mem_size = (((machines[machine].flags & MACHINE_AT) && (machines[machine].ram_granularity < 128)) ? machines[machine].min_ram*1024 : machines[machine].min_ram);
#endif
if (mem_size > 1048576)
mem_size = 1048576;
if (mem_size > 2097152)
mem_size = 2097152;
cpu_use_dynarec = !!config_get_int(cat, "cpu_use_dynarec", 0);