Implemented the Intel 420EX combined northbridge and southbridge, added the ASUS PVI-486AP4, and overhauled SMRAM handling (which also implements some previously missing extended SMRAM features of the 440BX+ and VIA Apollo series of chipsets).
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@@ -241,6 +241,7 @@ extern int machine_at_alfredo_init(const machine_t *);
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#if defined(DEV_BRANCH) && defined(NO_SIO)
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extern int machine_at_486sp3g_init(const machine_t *);
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#endif
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extern int machine_at_486ap4_init(const machine_t *);
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/* m_at_commodore.c */
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extern int machine_at_cmdpc_init(const machine_t *);
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