Implemented the Intel 420EX combined northbridge and southbridge, added the ASUS PVI-486AP4, and overhauled SMRAM handling (which also implements some previously missing extended SMRAM features of the 440BX+ and VIA Apollo series of chipsets).

2020-06-12 23:29:12 +02:00
parent 2920ad25f3
commit 92a1425896
14 changed files with 1109 additions and 169 deletions
--- a/src/pci.c
+++ b/src/pci.c
@@ -31,8 +31,8 @@
 #include <86box/pic.h>
 #include <86box/mem.h>
 #include <86box/device.h>
+#include <86box/dma.h>
 #include <86box/pci.h>
-#include <86box/piix.h>
 #include <86box/keyboard.h>