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Implemented the Intel 420EX combined northbridge and southbridge, added the ASUS PVI-486AP4, and overhauled SMRAM handling (which also implements some previously missing extended SMRAM features of the 440BX+ and VIA Apollo series of chipsets).

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This commit is contained in:
OBattler
2020-06-12 23:29:12 +02:00
parent 2920ad25f3
commit 92a1425896
14 changed files with 1109 additions and 169 deletions
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2
src/win/Makefile.mingw
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@@ -516,7 +516,7 @@ MAINOBJ := pc.o config.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \
usb.o device.o nvr.o nvr_at.o nvr_ps2.o sst_flash.o via_vt82c586b.o \
via_vt82c596b.o $(VNCOBJ)
INTELOBJ := intel_flash.o \
INTELOBJ := intel_flash.o intel_420ex.o \
intel_sio.o intel_piix.o
CPUOBJ := cpu.o cpu_table.o \

2
src/win/Makefile_ndr.mingw
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@@ -520,7 +520,7 @@ MAINOBJ := pc.o config.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \
usb.o device.o nvr.o nvr_at.o nvr_ps2.o sst_flash.o via_vt82c586b.o \
via_vt82c596b.o $(VNCOBJ)
INTELOBJ := intel_flash.o \
INTELOBJ := intel_flash.o intel_420ex.o \
intel_sio.o intel_piix.o
CPUOBJ := cpu.o cpu_table.o \