diff --git a/README.md b/README.md index a207eaf31..977ab598d 100644 --- a/README.md +++ b/README.md @@ -5,8 +5,8 @@ running old operating systems and software designed for IBM PC systems and compatibles from 1981 through fairly recent system designs based on the PCI bus. -86Box is released under the GNU General Public License, version 2. For more -information, see the `LICENSE` file. +86Box is released under the GNU General Public License, version 2 or later. +For more information, see the `COPYING` file. The project maintainer is OBattler. diff --git a/src/chipset/amd640.c b/src/chipset/amd640.c new file mode 100644 index 000000000..4cb8625f1 --- /dev/null +++ b/src/chipset/amd640.c @@ -0,0 +1,230 @@ +/* +* +* 86Box: A hypervisor and IBM PC system emulator that specializes in +* running old operating systems and software designed for IBM +* PC systems and compatibles from 1981 through fairly recent +* system designs based on the PCI bus. +* +* +* +* Basic AMD 640 North Bridge emulation +* +* Looks similar to the VIA VP2 +* while it's southbridge(AMD-645) is just a 586B [TODO: Probs write it if it has differences] +* +* Copyright(C) 2020 Tiseno100 +* +*/ + + +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include <86box/mem.h> +#include <86box/io.h> +#include <86box/rom.h> +#include <86box/pci.h> +#include <86box/device.h> +#include <86box/keyboard.h> +#include <86box/chipset.h> + +typedef struct amd640_t { + uint8_t regs[256]; +} amd640_t; + +static void +amd640_map(uint32_t addr, uint32_t size, int state) +{ + switch (state & 3) { + case 0: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 1: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + break; + case 2: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); + break; + case 3: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; + } + + flushmmucache_nopc(); +} + +static void +amd640_write(int func, int addr, uint8_t val, void *priv) +{ + amd640_t *dev = (amd640_t *) priv; + + /* Read-Only Registers */ + switch(addr){ + case 0x00: case 0x01: case 0x08: case 0x09: + case 0x0a: case 0x0b: case 0x0c: case 0x0e: + case 0x0f: + return; + } + + switch(addr){ + + /* Command */ + case 0x04: + dev->regs[0x04] = (dev->regs[0x04] & ~0x40) | (val & 0x40); + + /* Status */ + case 0x07: + dev->regs[0x07] &= ~(val & 0xb0); + break; + + /* Shadow RAM registers */ + case 0x61: + if ((dev->regs[0x61] ^ val) & 0x03) + amd640_map(0xc0000, 0x04000, val & 0x03); + if ((dev->regs[0x61] ^ val) & 0x0c) + amd640_map(0xc4000, 0x04000, (val & 0x0c) >> 2); + if ((dev->regs[0x61] ^ val) & 0x30) + amd640_map(0xc8000, 0x04000, (val & 0x30) >> 4); + if ((dev->regs[0x61] ^ val) & 0xc0) + amd640_map(0xcc000, 0x04000, (val & 0xc0) >> 6); + dev->regs[0x61] = val; + return; + + case 0x62: + if ((dev->regs[0x62] ^ val) & 0x03) + amd640_map(0xd0000, 0x04000, val & 0x03); + if ((dev->regs[0x62] ^ val) & 0x0c) + amd640_map(0xd4000, 0x04000, (val & 0x0c) >> 2); + if ((dev->regs[0x62] ^ val) & 0x30) + amd640_map(0xd8000, 0x04000, (val & 0x30) >> 4); + if ((dev->regs[0x62] ^ val) & 0xc0) + amd640_map(0xdc000, 0x04000, (val & 0xc0) >> 6); + dev->regs[0x62] = val; + return; + + case 0x63: + if ((dev->regs[0x63] ^ val) & 0x30) { + amd640_map(0xf0000, 0x10000, (val & 0x30) >> 4); + shadowbios = (((val & 0x30) >> 4) & 0x02); + } + if ((dev->regs[0x63] ^ val) & 0xc0) + amd640_map(0xe0000, 0x10000, (val & 0xc0) >> 6); + dev->regs[0x63] = val; + return; + + case 0x65: /* DRAM Control Register #1 */ + dev->regs[0x65] = (dev->regs[0x65] & ~0x20) | (val & 0x20); + + case 0x66: /* DRAM Control Register #2 */ + dev->regs[0x66] = (dev->regs[0x66] & ~0x05) | (val & 0x05); + + case 0x67: /* 32-Bit DRAM Width Control Register */ + dev->regs[0x67] = (dev->regs[0x67] & ~0xc0) | (val & 0xc0); + + case 0x68: /* Reserved (But referenced by the BIOS?) */ + dev->regs[0x68] = (dev->regs[0x68] & ~0x40) | (val & 0x40); + + case 0x6d: /* DRAM Drive Strength Control Register */ + dev->regs[0x6d] = (dev->regs[0x6d] & ~0x6f) | (val & 0x6f); + + case 0x70: /* PCI Buffer Control Register */ + dev->regs[0x70] = (dev->regs[0x70] & ~0x01) | (val & 0x01); + + case 0x71: /* Processor-to-PCI Control Register #1 */ + dev->regs[0x71] = (dev->regs[0x71] & ~0x4e) | (val & 0x4e); + + case 0x73: /* PCI Initiator Control Register #1 */ + dev->regs[0x73] = (dev->regs[0x73] & ~0x0c) | (val & 0x0c); + + case 0x75: /* PCI Arbitration Control Register #1 */ + dev->regs[0x75] = (dev->regs[0x75] & ~0xc7) | (val & 0xc7); + + default: + dev->regs[addr] = val; + break; + } +} + +static uint8_t +amd640_read(int func, int addr, void *priv) +{ + amd640_t *dev = (amd640_t *) priv; + uint8_t ret = 0xff; + + if(func == 0){ + ret = dev->regs[addr]; + } + + return ret; +} + +static void +amd640_reset(void *priv) +{ + amd640_write(0, 0x63, amd640_read(0, 0x63, priv) & 0xcf, priv); +} + + +static void * +amd640_init(const device_t *info) +{ + amd640_t *dev = (amd640_t *) malloc(sizeof(amd640_t)); + + pci_add_card(PCI_ADD_NORTHBRIDGE, amd640_read, amd640_write, dev); + + dev->regs[0x00] = 0x06; /* AMD */ + dev->regs[0x01] = 0x11; + + dev->regs[0x02] = 0x95; /* 640 */ + dev->regs[0x03] = 0x15; + + dev->regs[0x04] = 7; /* Command */ + + dev->regs[0x06] = 0xa0; /* Status */ + dev->regs[0x07] = 2; + + dev->regs[0x08] = 0x02; /* Revision ID: 0x02 = D, 0x03 = E, 0x04 = F */ + + dev->regs[0x0b] = 6; /* Base Class Code */ + + dev->regs[0x52] = 2; /* Non-Cacheable control */ + + dev->regs[0x58] = 0x40; /* DRAM Configuration register 1 */ + dev->regs[0x59] = 5; /* DRAM Configuration register 2 */ + + /* DRAM Bank Endings */ + dev->regs[0x5a] = 1; + dev->regs[0x5b] = 1; + dev->regs[0x5c] = 1; + dev->regs[0x5d] = 1; + dev->regs[0x5e] = 1; + dev->regs[0x5f] = 1; + + dev->regs[0x64] = 0xab; + + return dev; +} + +static void +amd640_close(void *priv) +{ + amd640_t *dev = (amd640_t *) priv; + + free(dev); +} + +const device_t amd640_device = { + "AMD-640 System Controller", + DEVICE_PCI, + 0, + amd640_init, + amd640_close, + amd640_reset, + NULL, + NULL, + NULL, + NULL +}; \ No newline at end of file diff --git a/src/chipset/i82335.c b/src/chipset/i82335.c index b5594f4da..cc14113fd 100644 --- a/src/chipset/i82335.c +++ b/src/chipset/i82335.c @@ -1,11 +1,42 @@ -/* Intel 82335 SX emulation, used by the Phoenix 386 clone. */ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the Intel 82335(KU82335) chipset. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * + * Copyright 2008-2020 Sarah Walker. + * Copyright 2016-2020 Miran Grca. + * Copyright 2020 Tiseno100 + * + */ -#include +#include #include +#include +#include #include #include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> #include <86box/io.h> +#include <86box/device.h> +#include <86box/keyboard.h> #include <86box/mem.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/chipset.h> + typedef struct { @@ -13,26 +44,23 @@ typedef struct uint8_t reg_23; } i82335_t; -i82335_t i82335; +static uint8_t i82335_read(uint16_t addr, void *priv); -uint8_t i82335_read(uint16_t addr, void *priv); - -void i82335_write(uint16_t addr, uint8_t val, void *priv) +static void +i82335_write(uint16_t addr, uint8_t val, void *priv) { - int i = 0; + i82335_t *dev = (i82335_t *) priv; int mem_write = 0; - // pclog("i82335_write(%04X, %02X)\n", addr, val); - switch (addr) { case 0x22: - if ((val ^ i82335.reg_22) & 1) + if ((val ^ dev->reg_22) & 1) { if (val & 1) { - for (i = 0; i < 8; i++) + for (int i = 0; i < 8; i++) { mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); shadowbios = 1; @@ -40,7 +68,7 @@ void i82335_write(uint16_t addr, uint8_t val, void *priv) } else { - for (i = 0; i < 8; i++) + for (int i = 0; i < 8; i++) { mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); shadowbios = 0; @@ -50,16 +78,17 @@ void i82335_write(uint16_t addr, uint8_t val, void *priv) flushmmucache(); } - i82335.reg_22 = val | 0xd8; + dev->reg_22 = val | 0xd8; break; - case 0x23: - i82335.reg_23 = val; - if ((val ^ i82335.reg_22) & 2) + case 0x23: + dev->reg_23 = val; + + if ((val ^ dev->reg_22) & 2) { if (val & 2) { - for (i = 0; i < 8; i++) + for (int i = 0; i < 8; i++) { mem_set_mem_state(0xc0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); shadowbios = 1; @@ -67,7 +96,7 @@ void i82335_write(uint16_t addr, uint8_t val, void *priv) } else { - for (i = 0; i < 8; i++) + for (int i = 0; i < 8; i++) { mem_set_mem_state(0xc0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); shadowbios = 0; @@ -75,11 +104,11 @@ void i82335_write(uint16_t addr, uint8_t val, void *priv) } } - if ((val ^ i82335.reg_22) & 0xc) + if ((val ^ dev->reg_22) & 0xc) { if (val & 2) { - for (i = 0; i < 8; i++) + for (int i = 0; i < 8; i++) { mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | mem_write); @@ -88,7 +117,7 @@ void i82335_write(uint16_t addr, uint8_t val, void *priv) } else { - for (i = 0; i < 8; i++) + for (int i = 0; i < 8; i++) { mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTANY | mem_write); @@ -97,7 +126,7 @@ void i82335_write(uint16_t addr, uint8_t val, void *priv) } } - if ((val ^ i82335.reg_22) & 0xe) + if ((val ^ dev->reg_22) & 0xe) { flushmmucache(); } @@ -105,33 +134,64 @@ void i82335_write(uint16_t addr, uint8_t val, void *priv) if (val & 0x80) { io_removehandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); + io_removehandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); } break; } } -uint8_t i82335_read(uint16_t addr, void *priv) + +static uint8_t +i82335_read(uint16_t addr, void *priv) { - // pclog("i82335_read(%04X)\n", addr); - if (addr == 0x22) - { - return i82335.reg_22; - } - else if (addr == 0x23) - { - return i82335.reg_23; - } - else - { - return 0; + uint8_t ret = 0xff; + i82335_t *dev = (i82335_t *) priv; + + switch(addr){ + case 0x22: + return dev->reg_22; + break; + case 0x23: + return dev->reg_23; + break; + default: + return 0; + break; } + + return ret; } -void i82335_init() + +static void +i82335_close(void *priv) { - memset(&i82335, 0, sizeof(i82335_t)); + i82335_t *dev = (i82335_t *) priv; - i82335.reg_22 = 0xd8; - - io_sethandler(0x0022, 0x0014, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); + free(dev); } + + +static void * +i82335_init(const device_t *info) +{ + i82335_t *dev = (i82335_t *) malloc(sizeof(i82335_t)); + memset(dev, 0, sizeof(i82335_t)); + + dev->reg_22 = 0xd8; + + io_sethandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); + io_sethandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); + + return dev; +} + + +const device_t i82335_device = { + "Intel 82335", + 0, + 0, + i82335_init, i82335_close, NULL, + NULL, NULL, NULL, + NULL +}; diff --git a/src/chipset/intel_4x0.c b/src/chipset/intel_4x0.c index e6009107d..a9d38d553 100644 --- a/src/chipset/intel_4x0.c +++ b/src/chipset/intel_4x0.c @@ -413,8 +413,9 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) switch (dev->type) { case INTEL_440LX: case INTEL_440EX: regs[0x34] = (val & 0xa0); - } break; + } + break; case 0x4f: switch (dev->type) { @@ -983,7 +984,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0x7c] = val & 0x8f; break; case INTEL_440BX: case INTEL_440GX: - case INTEL_440ZX: + case INTEL_440ZX: regs[0x7c] = val & 0x1f; break; } @@ -991,7 +992,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) switch (dev->type) { case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430NX: - regs[0x7c] = val & 0x32; + regs[0x7d] = val & 0x32; break; } case 0x7e: case 0x7f: @@ -1286,9 +1287,9 @@ i4x0_read(int func, int addr, void *priv) uint8_t ret = 0xff; uint8_t *regs = (uint8_t *) dev->regs[func]; - if (func > dev->max_func) + if (func > dev->max_func) ret = 0xff; - else { + else { ret = regs[addr]; /* Special behavior for 440FX register 0x93 which is basically TRC in PCI space with the addition of bits 3 and 0. */ @@ -1657,11 +1658,11 @@ static void regs = (uint8_t *) dev->regs[1]; regs[0x00] = 0x86; regs[0x01] = 0x80; /* Intel */ - if(dev->type != INTEL_440GX){ - regs[0x02] = 0x91; regs[0x03] = 0x71; /* 82443BX */ - } else { - regs[0x02] = 0xa1; regs[0x03] = 0x71; /* 82443GX (They seem to share the same deal*/ - } + if(dev->type != INTEL_440GX) { + regs[0x02] = 0x91; regs[0x03] = 0x71; /* 82443BX */ + } else { + regs[0x02] = 0xa1; regs[0x03] = 0x71; /* 82443GX (They seem to share the same deal*/ + } regs[0x06] = 0x20; regs[0x07] = 0x02; regs[0x08] = 0x02; regs[0x0a] = 0x04; regs[0x0b] = 0x06; diff --git a/src/chipset/opti5x7.c b/src/chipset/opti5x7.c index 4a83ed98d..6f13edccf 100644 --- a/src/chipset/opti5x7.c +++ b/src/chipset/opti5x7.c @@ -23,7 +23,7 @@ The earlier 596/597 appears to be register compatible with the 546/547 from test typedef struct { uint8_t cur_reg, - regs[64]; + regs[16]; port_92_t *port_92; } opti5x7_t; @@ -61,12 +61,10 @@ opti5x7_write(uint16_t addr, uint8_t val, void *priv) break; case 0x24: dev->regs[dev->cur_reg] = val; - if (dev->cur_reg == 0x02) { - cpu_cache_ext_enabled = val & 0x10; - } - if (dev->cur_reg == 0x06) { + if (dev->regs[0x02] & 0x0c) + cpu_cache_ext_enabled = 1; + if (dev->cur_reg == 0x06) opti5x7_recalcmapping(dev); - } break; } } diff --git a/src/chipset/vl82c480.c b/src/chipset/vl82c480.c new file mode 100644 index 000000000..d20eb4ba6 --- /dev/null +++ b/src/chipset/vl82c480.c @@ -0,0 +1,185 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the VLSI VL82c480 chipset. + * + * Authors: Sarah Walker, + * + * Copyright 2020 Sarah Walker. + */ +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include <86box/device.h> +#include <86box/io.h> +#include <86box/mem.h> +#include <86box/nmi.h> +#include <86box/port_92.h> +#include <86box/chipset.h> + +typedef struct { + int cfg_index; + uint8_t cfg_regs[256]; +} vl82c480_t; + +#define CFG_ID 0x00 +#define CFG_AAXS 0x0d +#define CFG_BAXS 0x0e +#define CFG_CAXS 0x0f +#define CFG_DAXS 0x10 +#define CFG_EAXS 0x11 +#define CFG_FAXS 0x12 + +#define ID_VL82C480 0x90 + +static void +shadow_control(uint32_t addr, uint32_t size, int state) +{ +/* pclog("shadow_control: addr=%08x size=%04x state=%i\n", addr, size, state); */ + switch (state) { + case 0: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 1: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + break; + case 2: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); + break; + case 3: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; + } + flushmmucache_nopc(); +} + +static void +vl82c480_write(uint16_t addr, uint8_t val, void *p) +{ + vl82c480_t *dev = (vl82c480_t *)p; + + switch (addr) { + case 0xec: + dev->cfg_index = val; + break; + + case 0xed: + if (dev->cfg_index >= 0x01 && dev->cfg_index <= 0x24) { + dev->cfg_regs[dev->cfg_index] = val; + switch (dev->cfg_index) { + case CFG_AAXS: + shadow_control(0xa0000, 0x4000, val & 3); + shadow_control(0xa4000, 0x4000, (val >> 2) & 3); + shadow_control(0xa8000, 0x4000, (val >> 4) & 3); + shadow_control(0xac000, 0x4000, (val >> 6) & 3); + break; + case CFG_BAXS: + shadow_control(0xb0000, 0x4000, val & 3); + shadow_control(0xb4000, 0x4000, (val >> 2) & 3); + shadow_control(0xb8000, 0x4000, (val >> 4) & 3); + shadow_control(0xbc000, 0x4000, (val >> 6) & 3); + break; + case CFG_CAXS: + shadow_control(0xc0000, 0x4000, val & 3); + shadow_control(0xc4000, 0x4000, (val >> 2) & 3); + shadow_control(0xc8000, 0x4000, (val >> 4) & 3); + shadow_control(0xcc000, 0x4000, (val >> 6) & 3); + break; + case CFG_DAXS: + shadow_control(0xd0000, 0x4000, val & 3); + shadow_control(0xd4000, 0x4000, (val >> 2) & 3); + shadow_control(0xd8000, 0x4000, (val >> 4) & 3); + shadow_control(0xdc000, 0x4000, (val >> 6) & 3); + break; + case CFG_EAXS: + shadow_control(0xe0000, 0x4000, val & 3); + shadow_control(0xe4000, 0x4000, (val >> 2) & 3); + shadow_control(0xe8000, 0x4000, (val >> 4) & 3); + shadow_control(0xec000, 0x4000, (val >> 6) & 3); + break; + case CFG_FAXS: + shadow_control(0xf0000, 0x4000, val & 3); + shadow_control(0xf4000, 0x4000, (val >> 2) & 3); + shadow_control(0xf8000, 0x4000, (val >> 4) & 3); + shadow_control(0xfc000, 0x4000, (val >> 6) & 3); + break; + } + } + break; + + case 0xee: + if (mem_a20_alt) + outb(0x92, inb(0x92) & ~2); + break; + } +} + +static uint8_t +vl82c480_read(uint16_t addr, void *p) +{ + vl82c480_t *dev = (vl82c480_t *)p; + uint8_t ret = 0xff; + + switch (addr) { + case 0xec: + ret = dev->cfg_index; + break; + + case 0xed: + ret = dev->cfg_regs[dev->cfg_index]; + break; + + case 0xee: + if (!mem_a20_alt) + outb(0x92, inb(0x92) | 2); + break; + + case 0xef: + softresetx86(); + cpu_set_edx(); + break; + } + + return ret; +} + +static void +vl82c480_close(void *p) +{ + vl82c480_t *dev = (vl82c480_t *)p; + + free(dev); +} + + +static void * +vl82c480_init(const device_t *info) +{ + vl82c480_t *dev = (vl82c480_t *)malloc(sizeof(vl82c480_t)); + memset(dev, 0, sizeof(vl82c480_t)); + + dev->cfg_regs[CFG_ID] = ID_VL82C480; + + io_sethandler(0x00ec, 0x0004, vl82c480_read, NULL, NULL, vl82c480_write, NULL, NULL, dev); + + return dev; +} + +const device_t vl82c480_device = { + "VLSI VL82c480", + 0, + 0, + vl82c480_init, vl82c480_close, NULL, + NULL, NULL, NULL, + NULL +}; diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 5c40d1b69..941faf29f 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -46,6 +46,7 @@ #include <86box/hdc_ide.h> #include <86box/hdd.h> #include <86box/zip.h> +#include <86box/version.h> /* Bits of 'atastat' */ diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index 44bea7b25..5184bbe5f 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -41,7 +41,7 @@ extern uint64_t motoron[FDD_NUM]; -const int command_has_drivesel[256] = { +const uint8_t command_has_drivesel[32] = { 0, 0, 1, /* READ TRACK */ 0, @@ -61,24 +61,11 @@ const int command_has_drivesel[256] = { 1, /* SCAN EQUAL */ 0, 0, 0, 0, 1, /* VERIFY */ - 0, 0, 0, + 0, 0, 1, /* SCAN LOW OR EQUAL */ 0, 0, 0, 1, /* SCAN HIGH OR EQUAL */ - 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + 0, 0 }; @@ -210,7 +197,6 @@ fdc_ctrl_reset(void *p) fdc->st0 = 0; fdc->lock = 0; fdc->head = 0; - fdc->abort = 0; fdc->step = 0; if (!(fdc->flags & FDC_FLAG_AT)) fdc->rate = 2; @@ -659,18 +645,6 @@ fdc_seek(fdc_t *fdc, int drive, int params) } -void -fdc_implied_seek(fdc_t *fdc) -{ - if (fdc->config & 0x40) { - if (fdc->params[1] != fdc->pcn[fdc->params[0] & 3]) { - fdc_seek(fdc, fdc->drive, ((int) fdc->params[1]) - ((int) fdc->pcn[fdc->params[0] & 3])); - fdc->pcn[fdc->params[0] & 3] = fdc->params[1]; - } - } -} - - static void fdc_bad_command(fdc_t *fdc) { @@ -691,16 +665,22 @@ fdc_io_command_phase1(fdc_t *fdc, int out) fdc->eot[fdc->drive] = fdc->params[5]; fdc->gap = fdc->params[6]; fdc->dtl = fdc->params[7]; - fdc_implied_seek(fdc); fdc->rw_track = fdc->params[1]; + + if (fdc->config & 0x40) { + if (fdc->rw_track != fdc->pcn[fdc->params[0] & 3]) { + fdc_seek(fdc, fdc->drive, ((int) fdc->rw_track) - ((int) fdc->pcn[fdc->params[0] & 3])); + fdc->pcn[fdc->params[0] & 3] = fdc->rw_track; + } + } + ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1); fdc->stat = out ? 0x90 : 0x50; if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) fdc->stat |= 0x20; - if (out) { - fdc->written = 0; + if (out) fdc->pos = 0; - } else + else fdc->inread = 1; } @@ -724,7 +704,7 @@ fdc_sis(fdc_t *fdc) fdc->reset_stat--; } else { if (fdc->fintr) { - fdc->res[9] = (fdc->st0 & ~0x04) | (fdd_get_head(fdc->drive & 0x03) ? 4 : 0); + fdc->res[9] = (fdc->st0 & ~0x04) | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0); fdc->fintr = 0; } else { fdc->res[10] = 0x80; @@ -805,11 +785,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) } drive_num = real_drive(fdc, val & 0x03); current_drive = drive_num; - fdc->st0 &= ~0x07; - fdc->st0 |= real_drive(fdc, drive_num); - fdc->st0 |= (fdd_get_head(drive_num) ? 4 : 0); + fdc->st0 = (fdc->st0 & 0xf8) | (val & 0x03) | (fdd_get_head(drive_num) ? 4 : 0); } - fdc->dor=val; + fdc->dor = val; return; case 3: /* TDR */ if (fdc->enh_mode) { @@ -965,7 +943,8 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) if (!(fdc->flags & FDC_FLAG_NSC)) { fdc_bad_command(fdc); break; - } + } + /*FALLTHROUGH*/ case 0x10: /*Get version*/ case 0x14: /*Unlock*/ case 0x94: /*Lock*/ @@ -1151,7 +1130,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) fdc->head = (fdc->params[0] & 4) ? 1 : 0; fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); fdc->gap = fdc->params[3]; - fdc->dtl = 4000000; fdc->format_sectors = fdc->params[2]; fdc->format_n = fdc->params[1]; fdc->format_state = 1; @@ -1714,10 +1692,10 @@ fdc_callback(void *priv) fdc->stat = 0xD0; fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->drive; fdc->res[5] = fdc->res[6] = 0; - fdc->res[7] = fdc->pcn[fdc->params[0] & 3]; - fdc->res[8] = fdd_get_head(real_drive(fdc, fdc->drive)); - fdc->res[9] = fdc->format_dat[fdc->pos - 2] + 1; - fdc->res[10] = fdc->params[4]; + fdc->res[7] = fdc->format_sector_id.id.c; + fdc->res[8] = fdc->format_sector_id.id.h; + fdc->res[9] = fdc->format_sector_id.id.r; + fdc->res[10] = fdc->format_sector_id.id.n; fdc->paramstogo = 7; fdc->format_state = 0; return; @@ -2009,10 +1987,6 @@ int fdc_getdata(fdc_t *fdc, int last) int data; if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) { - if (fdc->written) { - fdc_overrun(fdc); - return -1; - } if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo) { data = fdc->dat; @@ -2041,7 +2015,6 @@ int fdc_getdata(fdc_t *fdc, int last) fdc->tc = 1; } - fdc->written = 0; return data & 0xff; } diff --git a/src/floppy/fdd_86f.c b/src/floppy/fdd_86f.c index ddcc515f0..26463da34 100644 --- a/src/floppy/fdd_86f.c +++ b/src/floppy/fdd_86f.c @@ -192,7 +192,6 @@ typedef struct { uint32_t index_hole_pos[2]; uint32_t track_offset[512]; uint32_t file_size; - sector_id_t format_sector_id; sector_id_t last_sector; sector_id_t req_sector; uint32_t index_count; @@ -1956,7 +1955,7 @@ d86f_format_track(int drive, int side, int do_write) data &= 0xff; if ((data == -1) && (dev->datac < 3)) data = 0; - dev->format_sector_id.byte_array[dev->datac] = data & 0xff; + d86f_fdc->format_sector_id.byte_array[dev->datac] = data & 0xff; if (dev->datac == 3) fdc_stop_id_request(d86f_fdc); } @@ -2001,11 +2000,11 @@ d86f_format_track(int drive, int side, int do_write) case FMT_SECTOR_ID: max_len = 4; if (do_write) { - d86f_write_direct(drive, side, dev->format_sector_id.byte_array[dev->datac], 0); - d86f_calccrc(dev, dev->format_sector_id.byte_array[dev->datac]); + d86f_write_direct(drive, side, d86f_fdc->format_sector_id.byte_array[dev->datac], 0); + d86f_calccrc(dev, d86f_fdc->format_sector_id.byte_array[dev->datac]); } else { if (dev->datac == 3) { - d86f_handler[drive].set_sector(drive, side, dev->format_sector_id.id.c, dev->format_sector_id.id.h, dev->format_sector_id.id.r, dev->format_sector_id.id.n); + d86f_handler[drive].set_sector(drive, side, d86f_fdc->format_sector_id.id.c, d86f_fdc->format_sector_id.id.h, d86f_fdc->format_sector_id.id.r, d86f_fdc->format_sector_id.id.n); } } break; @@ -2250,10 +2249,10 @@ d86f_turbo_format(int drive, int side, int nop) dat &= 0xff; if ((dat == -1) && (dev->datac < 3)) dat = 0; - dev->format_sector_id.byte_array[dev->datac] = dat & 0xff; + d86f_fdc->format_sector_id.byte_array[dev->datac] = dat & 0xff; if (dev->datac == 3) { fdc_stop_id_request(d86f_fdc); - d86f_handler[drive].set_sector(drive, side, dev->format_sector_id.id.c, dev->format_sector_id.id.h, dev->format_sector_id.id.r, dev->format_sector_id.id.n); + d86f_handler[drive].set_sector(drive, side, d86f_fdc->format_sector_id.id.c, d86f_fdc->format_sector_id.id.h, d86f_fdc->format_sector_id.id.r, d86f_fdc->format_sector_id.id.n); } } else if (dev->datac == 4) { if (! nop) { diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index bbb37895e..e97967cec 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -26,26 +26,6 @@ #define SCREEN_RES_X 640 #define SCREEN_RES_Y 480 -/* Version info. */ -#define EMU_NAME "86Box" -#define EMU_NAME_W L"86Box" -#ifdef RELEASE_BUILD -#define EMU_VERSION "2.07" -#define EMU_VERSION_W L"2.07" -#define EMU_VERSION_MAJ 2 -#define EMU_VERSION_MIN 7 -#else -#define EMU_VERSION "2.10" -#define EMU_VERSION_W L"2.10" -#define EMU_VERSION_MAJ 2 -#define EMU_VERSION_MIN 10 -#endif -#define COPYRIGHT_YEAR "2020" - -/* Web URL info. */ -#define EMU_SITE L"86box.github.io" -#define EMU_ROMS_URL L"https://github.com/86Box/roms/releases/latest" - /* Filename and pathname info. */ #define CONFIG_FILE L"86box.cfg" #define NVR_PATH L"nvr" diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index a94564e68..276da03c8 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -31,7 +31,8 @@ extern const device_t ali1429_device; extern const device_t headland_device; extern const device_t headland_386_device; -/* Intel 4x0xX */ +/* Intel */ +extern const device_t i82335_device; extern const device_t i420ex_device; extern const device_t i420tx_device; extern const device_t i420zx_device; @@ -89,7 +90,11 @@ extern const device_t via_apro_device; extern const device_t via_vt82c586b_device; extern const device_t via_vt82c596b_device; +/* AMD */ +extern const device_t amd640_device; + /* VLSI */ +extern const device_t vl82c480_device; extern const device_t vlsi_scamp_device; /* WD */ diff --git a/src/include/86box/fdc.h b/src/include/86box/fdc.h index 56249069b..7e2a9916b 100644 --- a/src/include/86box/fdc.h +++ b/src/include/86box/fdc.h @@ -38,26 +38,24 @@ extern int fdc_type; typedef struct { - uint8_t dor, stat, command, processed_cmd, dat, st0, swap; + uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl; uint8_t swwp, disable_write; - uint8_t params[256], res[256]; - uint8_t specify[256], format_dat[256]; + uint8_t params[8], res[11]; + uint8_t specify[2]; uint8_t config, pretrk; uint8_t fifobuf[16]; uint16_t base_address; int head, sector, drive, lastdrive; - int pcn[4], eot[256]; + int pcn[4], eot[4]; int rw_track, pos; int pnum, ptot; int rate, reset_stat; int lock, perp; - int abort; int format_state, format_n; - int tc, written; int step, seek_dir; - int noprec; + int tc, noprec; int data_ready, inread; int bitcell_period, enh_mode; @@ -67,7 +65,7 @@ typedef struct { int fifo, tfifo; int fifobufpos, drv2en; - int gap, dtl; + int gap; int enable_3f1, format_sectors; int max_track, mfm; int deleted, wrong_am; @@ -82,11 +80,11 @@ typedef struct { int bit_rate; /* Should be 250 at start. */ int paramstogo; - sector_id_t read_track_sector; + sector_id_t read_track_sector, format_sector_id; - uint64_t watchdog_count; - - pc_timer_t timer, watchdog_timer; + uint64_t watchdog_count; + + pc_timer_t timer, watchdog_timer; } fdc_t; diff --git a/src/include/86box/sst_flash.h b/src/include/86box/flash.h similarity index 62% rename from src/include/86box/sst_flash.h rename to src/include/86box/flash.h index f473d4d33..d1efee32b 100644 --- a/src/include/86box/sst_flash.h +++ b/src/include/86box/flash.h @@ -1,20 +1,26 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * Implementation of an SST flash chip. - * - * - * - * Author: Melissa Goad, - * Copyright 2020 Melissa Goad. - */ - -extern const device_t sst_flash_29ee010_device; -extern const device_t sst_flash_29ee020_device; -extern const device_t sst_flash_39sf010_device; -extern const device_t sst_flash_39sf020_device; +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Handling of the emulated flash devices. + * + * + * + * Author: Miran Grca, + * Copyright 2020 Miran Grca. + */ + +extern const device_t catalyst_flash_device; + +extern const device_t intel_flash_bxt_ami_device; +extern const device_t intel_flash_bxt_device; +extern const device_t intel_flash_bxb_device; + +extern const device_t sst_flash_29ee010_device; +extern const device_t sst_flash_29ee020_device; +extern const device_t sst_flash_39sf010_device; +extern const device_t sst_flash_39sf020_device; diff --git a/src/include/86box/intel_flash.h b/src/include/86box/intel_flash.h deleted file mode 100644 index fd14f03f5..000000000 --- a/src/include/86box/intel_flash.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * Implementation of the Intel 1 Mbit 8-bit flash devices. - * - * - * - * Author: Sarah Walker, - * Miran Grca, - * Copyright 2008-2019 Sarah Walker. - * Copyright 2016-2019 Miran Grca. - */ - -extern const device_t intel_flash_bxt_ami_device; -extern const device_t intel_flash_bxt_device; -extern const device_t intel_flash_bxb_device; diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 6c011cc10..b0b4fa054 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -235,6 +235,8 @@ extern int machine_at_spc4216p_init(const machine_t *); extern int machine_at_kmxc02_init(const machine_t *); extern int machine_at_deskmaster286_init(const machine_t *); +extern int machine_at_shuttle386sx_init(const machine_t *); +extern int machine_at_adi386sx_init(const machine_t *); extern int machine_at_commodore_sl386sx_init(const machine_t *); extern int machine_at_wd76c10_init(const machine_t *); @@ -298,6 +300,7 @@ extern int machine_at_ambradp60_init(const machine_t *); #if defined(DEV_BRANCH) && defined(USE_VPP60) extern int machine_at_valuepointp60_init(const machine_t *); #endif +extern int machine_at_p5mp3_init(const machine_t *); extern int machine_at_586mc1_init(const machine_t *); extern int machine_at_plato_init(const machine_t *); @@ -332,6 +335,7 @@ extern int machine_at_acerv35n_init(const machine_t *); extern int machine_at_ap53_init(const machine_t *); extern int machine_at_p55t2p4_init(const machine_t *); extern int machine_at_p55t2s_init(const machine_t *); +extern int machine_at_8500tuc_init(const machine_t *); extern int machine_at_m7shi_init(const machine_t *); extern int machine_at_tc430hx_init(const machine_t *); extern int machine_at_equium5200_init(const machine_t *); @@ -405,6 +409,7 @@ extern int machine_at_s370slm_init(const machine_t *); extern int machine_at_cubx_init(const machine_t *); extern int machine_at_atc7020bxii_init(const machine_t *); +extern int machine_at_ambx133_init(const machine_t *); extern int machine_at_63a_init(const machine_t *); extern int machine_at_s370sba_init(const machine_t *); extern int machine_at_apas3_init(const machine_t *); @@ -431,8 +436,10 @@ extern const device_t *pcjr_get_device(void); /* m_ps1.c */ extern int machine_ps1_m2011_init(const machine_t *); extern int machine_ps1_m2121_init(const machine_t *); -#if defined(DEV_BRANCH) && defined(USE_PS1M2133) extern int machine_ps1_m2133_init(const machine_t *); + +#ifdef EMU_DEVICE_H +extern const device_t *ps1_m2133_get_device(void); #endif /* m_ps1_hdc.c */ diff --git a/src/include/86box/pci.h b/src/include/86box/pci.h index edb6a5e57..7fb118195 100644 --- a/src/include/86box/pci.h +++ b/src/include/86box/pci.h @@ -28,6 +28,7 @@ #define PCI_COMMAND_MEM 0x02 #define PCI_NO_IRQ_STEERING 0x8000 +#define PCI_CAN_SWITCH_TYPE 0x10000 #define PCI_CONFIG_TYPE_1 1 #define PCI_CONFIG_TYPE_2 2 diff --git a/src/include/86box/sio.h b/src/include/86box/sio.h index 6e64742b6..c2bc5aeae 100644 --- a/src/include/86box/sio.h +++ b/src/include/86box/sio.h @@ -17,6 +17,7 @@ extern const device_t acc3221_device; extern const device_t f82c710_device; +extern const device_t fdc37c661_device; extern const device_t fdc37c663_device; extern const device_t fdc37c665_device; extern const device_t fdc37c666_device; @@ -29,6 +30,7 @@ extern const device_t pc87307_device; extern const device_t pc87309_device; extern const device_t pc87332_device; extern const device_t pc97307_device; +extern const device_t ps1_m2133_sio; extern const device_t sio_detect_device; extern const device_t um8669f_device; extern const device_t w83787f_device; diff --git a/src/include/86box/version.h b/src/include/86box/version.h new file mode 100644 index 000000000..ee5dbba80 --- /dev/null +++ b/src/include/86box/version.h @@ -0,0 +1,29 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Definitions for project version, branding, and external links. + * + * Authors: Miran Grca, + * + * Copyright 2020 Miran Grca. + */ + +/* Version info. */ +#define EMU_NAME "86Box" +#define EMU_NAME_W L"86Box" + +#define EMU_VERSION "2.10" +#define EMU_VERSION_W L"2.10" +#define EMU_VERSION_MAJ 2 +#define EMU_VERSION_MIN 10 + +#define COPYRIGHT_YEAR "2020" + +/* Web URL info. */ +#define EMU_SITE L"86box.github.io" +#define EMU_ROMS_URL L"https://github.com/86Box/roms/releases/latest" \ No newline at end of file diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index acdea041c..d63af24c9 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -226,6 +226,9 @@ extern void ics2595_write(void *p, int strobe, int dat); extern double ics2595_getclock(void *p); extern void ics2595_setclock(void *p, double clock); +extern void sc1148x_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); +extern uint8_t sc1148x_ramdac_in(uint16_t addr, void *p, svga_t *svga); + extern void sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); extern uint8_t sc1502x_ramdac_in(uint16_t addr, void *p, svga_t *svga); @@ -255,6 +258,8 @@ extern const device_t gendac_ramdac_device; extern const device_t ics2595_device; extern const device_t icd2061_device; extern const device_t ics9161_device; +extern const device_t sc11483_ramdac_device; +extern const device_t sc11487_ramdac_device; extern const device_t sc1502x_ramdac_device; extern const device_t sdac_ramdac_device; extern const device_t stg_ramdac_device; diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 018b877a3..69682e002 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -221,6 +221,7 @@ extern const device_t gd5422_isa_device; extern const device_t gd5424_vlb_device; #endif extern const device_t gd5426_vlb_device; +extern const device_t gd5426_onboard_device; extern const device_t gd5428_isa_device; extern const device_t gd5428_vlb_device; extern const device_t gd5428_mca_device; diff --git a/src/machine/m_at_286_386sx.c b/src/machine/m_at_286_386sx.c index 6b6e00e52..b0a707ce8 100644 --- a/src/machine/m_at_286_386sx.c +++ b/src/machine/m_at_286_386sx.c @@ -420,6 +420,48 @@ machine_at_deskmaster286_init(const machine_t *model) return ret; } +int +machine_at_shuttle386sx_init(const machine_t *model) +{ + int ret; + + ret = bios_load_interleaved(L"roms/machines/shuttle386sx/386-Shuttle386SX-Even.BIN", + L"roms/machines/shuttle386sx/386-Shuttle386SX-Odd.BIN", + 0x000f0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + device_add(&i82335_device); + device_add(&keyboard_at_ami_device); + device_add(&fdc_at_device); + + return ret; +} + +int +machine_at_adi386sx_init(const machine_t *model) +{ + int ret; + + ret = bios_load_interleaved(L"roms/machines/adi386sx/3iip001l.bin", + L"roms/machines/adi386sx/3iip001h.bin", + 0x000f0000, 65536, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + device_add(&i82335_device); + device_add(&keyboard_at_ami_device); + device_add(&fdc_at_device); + + return ret; +} + int machine_at_wd76c10_init(const machine_t *model) { diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index ed2a01723..cdf86fee8 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -38,8 +38,7 @@ #include <86box/sio.h> #include <86box/hdc.h> #include <86box/video.h> -#include <86box/intel_flash.h> -#include <86box/sst_flash.h> +#include <86box/flash.h> #include <86box/scsi_ncr53c8xx.h> #include <86box/machine.h> @@ -62,6 +61,7 @@ machine_at_acc386_init(const machine_t *model) return ret; } + int machine_at_asus386_init(const machine_t *model) { @@ -81,6 +81,7 @@ ret = bios_load_linear(L"roms/machines/asus386/ASUS_ISA-386C_BIOS.bin", return ret; } + int machine_at_ecs386_init(const machine_t *model) { @@ -101,6 +102,7 @@ machine_at_ecs386_init(const machine_t *model) return ret; } + int machine_at_pb410a_init(const machine_t *model) { @@ -125,6 +127,7 @@ machine_at_pb410a_init(const machine_t *model) return ret; } + int machine_at_acera1g_init(const machine_t *model) { @@ -136,7 +139,7 @@ machine_at_acera1g_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_common_ide_init(model); + machine_at_common_init(model); if (gfxcard == VID_INTERNAL) device_add(&gd5428_a1g_device); @@ -144,7 +147,7 @@ machine_at_acera1g_init(const machine_t *model) device_add(&ali1429_device); device_add(&keyboard_ps2_acer_pci_device); device_add(&fdc_at_device); - device_add(&ide_isa_device); + device_add(&ide_isa_2ch_device); return ret; } diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index cb90b06ce..3ddc77186 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -29,9 +29,8 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> #include <86box/keyboard.h> -#include <86box/intel_flash.h> +#include <86box/flash.h> #include <86box/sio.h> -#include <86box/sst_flash.h> #include <86box/hwm.h> #include <86box/spd.h> #include <86box/video.h> diff --git a/src/machine/m_at_slot2.c b/src/machine/m_at_slot2.c index 8ed78a000..fc9538f53 100644 --- a/src/machine/m_at_slot2.c +++ b/src/machine/m_at_slot2.c @@ -30,8 +30,7 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> #include <86box/keyboard.h> -#include <86box/intel_flash.h> -#include <86box/sst_flash.h> +#include <86box/flash.h> #include <86box/sio.h> #include <86box/hwm.h> #include <86box/spd.h> diff --git a/src/machine/m_at_socket370.c b/src/machine/m_at_socket370.c index 5642cc74f..c41737b5e 100644 --- a/src/machine/m_at_socket370.c +++ b/src/machine/m_at_socket370.c @@ -29,9 +29,8 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> #include <86box/keyboard.h> -#include <86box/intel_flash.h> +#include <86box/flash.h> #include <86box/sio.h> -#include <86box/sst_flash.h> #include <86box/hwm.h> #include <86box/spd.h> #include <86box/video.h> @@ -180,6 +179,38 @@ machine_at_atc7020bxii_init(const machine_t *model) return ret; } +int +machine_at_ambx133_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/ambx133/mkbx2vg2.bin", + 0x000c0000, 262144, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init_ex(model, 2); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4); + device_add(&i440bx_device); + device_add(&piix4e_device); + device_add(&w83977ef_device); + device_add(&keyboard_ps2_pci_device); + device_add(&sst_flash_39sf020_device); + spd_register(SPD_TYPE_SDRAM, 0x7, 256); + + return ret; +} + int machine_at_63a_init(const machine_t *model) diff --git a/src/machine/m_at_socket4_5.c b/src/machine/m_at_socket4_5.c index eb311d587..0f21ca67a 100644 --- a/src/machine/m_at_socket4_5.c +++ b/src/machine/m_at_socket4_5.c @@ -34,8 +34,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/keyboard.h> -#include <86box/intel_flash.h> -#include <86box/sst_flash.h> +#include <86box/flash.h> #include <86box/nvr.h> #include <86box/sio.h> #include <86box/video.h> @@ -55,7 +54,7 @@ machine_at_excalibur_init(const machine_t *model) device_add(&ide_vlb_device); device_add(&opti5x7_device); - device_add(&fdc37c663_device); + device_add(&fdc37c661_device); device_add(&keyboard_at_ami_device); return ret; @@ -63,12 +62,12 @@ machine_at_excalibur_init(const machine_t *model) static void -machine_at_premiere_common_init(const machine_t *model) +machine_at_premiere_common_init(const machine_t *model, int pci_switch) { machine_at_common_init(model); device_add(&ide_pci_2ch_device); - pci_init(PCI_CONFIG_TYPE_2); + pci_init(PCI_CONFIG_TYPE_2 | pci_switch); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x01, PCI_CARD_SPECIAL, 0, 0, 0, 0); pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 2, 1, 4); @@ -99,8 +98,6 @@ machine_at_award_common_init(const machine_t *model) pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); device_add(&fdc_at_device); device_add(&keyboard_ps2_pci_device); - device_add(&sio_device); - device_add(&intel_flash_bxt_device); } @@ -115,7 +112,7 @@ machine_at_batman_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_premiere_common_init(model); + machine_at_premiere_common_init(model, 0); device_add(&i430lx_device); @@ -134,7 +131,7 @@ machine_at_ambradp60_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_premiere_common_init(model); + machine_at_premiere_common_init(model, 0); device_add(&i430lx_device); @@ -154,7 +151,7 @@ machine_at_valuepointp60_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_premiere_common_init(model); + machine_at_premiere_common_init(model, 0); device_add(&i430lx_device); @@ -163,6 +160,37 @@ machine_at_valuepointp60_init(const machine_t *model) #endif +int +machine_at_p5mp3_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/p5mp3/0205.bin", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + device_add(&ide_pci_device); + + pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x05, PCI_CARD_NORMAL, 1, 2, 3, 4); /* 05 = Slot 1 */ + pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1); /* 04 = Slot 2 */ + pci_register_slot(0x03, PCI_CARD_NORMAL, 3, 4, 1, 2); /* 03 = Slot 3 */ + pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); + device_add(&fdc_at_device); + device_add(&keyboard_ps2_pci_device); + + device_add(&sio_zb_device); + device_add(&catalyst_flash_device); + device_add(&i430lx_device); + + return ret; +} + + int machine_at_586mc1_init(const machine_t *model) { @@ -176,6 +204,8 @@ machine_at_586mc1_init(const machine_t *model) machine_at_award_common_init(model); + device_add(&sio_device); + device_add(&intel_flash_bxt_device); device_add(&i430lx_device); return ret; @@ -193,7 +223,7 @@ machine_at_plato_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_premiere_common_init(model); + machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE); device_add(&i430nx_device); @@ -212,7 +242,7 @@ machine_at_ambradp90_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_premiere_common_init(model); + machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE); device_add(&i430nx_device); @@ -233,6 +263,8 @@ machine_at_430nx_init(const machine_t *model) machine_at_award_common_init(model); + device_add(&sio_device); + device_add(&intel_flash_bxt_device); device_add(&i430nx_device); return ret; @@ -399,6 +431,7 @@ machine_at_mb500n_init(const machine_t *model) return ret; } + #if defined(DEV_BRANCH) && defined(USE_VECTRA54) int machine_at_vectra54_init(const machine_t *model) diff --git a/src/machine/m_at_socket7_s7.c b/src/machine/m_at_socket7_s7.c index 41ca9aa55..a2fa0cceb 100644 --- a/src/machine/m_at_socket7_s7.c +++ b/src/machine/m_at_socket7_s7.c @@ -33,9 +33,8 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> #include <86box/keyboard.h> -#include <86box/intel_flash.h> +#include <86box/flash.h> #include <86box/sio.h> -#include <86box/sst_flash.h> #include <86box/hwm.h> #include <86box/video.h> #include <86box/spd.h> @@ -370,6 +369,37 @@ machine_at_p55t2s_init(const machine_t *model) return ret; } + +int +machine_at_8500tuc_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/8500tuc/Tuc0221b.rom", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + device_add(&i430hx_device); + device_add(&piix3_device); + device_add(&keyboard_ps2_ami_pci_device); + device_add(&um8669f_device); + device_add(&intel_flash_bxt_device); + + return ret; +} + + int machine_at_m7shi_init(const machine_t *model) { diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c index 95dfa2e14..04fcffd1f 100644 --- a/src/machine/m_at_socket8.c +++ b/src/machine/m_at_socket8.c @@ -29,10 +29,8 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> #include <86box/keyboard.h> -#include <86box/intel_flash.h> -#include <86box/sst_flash.h> +#include <86box/flash.h> #include <86box/sio.h> -#include <86box/sst_flash.h> #include <86box/hwm.h> #include <86box/spd.h> #include <86box/video.h> diff --git a/src/machine/m_at_sockets7.c b/src/machine/m_at_sockets7.c index ebaaa49ee..f66a29353 100644 --- a/src/machine/m_at_sockets7.c +++ b/src/machine/m_at_sockets7.c @@ -33,9 +33,8 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> #include <86box/keyboard.h> -#include <86box/intel_flash.h> +#include <86box/flash.h> #include <86box/sio.h> -#include <86box/sst_flash.h> #include <86box/spd.h> #include <86box/hwm.h> #include <86box/video.h> diff --git a/src/machine/m_ps1.c b/src/machine/m_ps1.c index 9295b5b7b..52ac3a523 100644 --- a/src/machine/m_ps1.c +++ b/src/machine/m_ps1.c @@ -48,6 +48,8 @@ #include <86box/nmi.h> #include <86box/rom.h> #include <86box/device.h> +#include <86box/chipset.h> +#include <86box/sio.h> #include <86box/nvr.h> #include <86box/gameport.h> #include <86box/lpt.h> @@ -490,14 +492,6 @@ ps1_setup(int model) device_add(&snd_device); } -#if defined(DEV_BRANCH) && defined(USE_PS1M2133) - if (model == 2133) { - device_add(&fdc_at_device); - - device_add(&ide_isa_device); - } -#endif - /* Enable the PS/1 VGA controller. */ if (model == 2011) device_add(&ps1vga_device); @@ -505,7 +499,6 @@ ps1_setup(int model) device_add(&ibm_ps1_2121_device); } - static void ps1_common_init(const machine_t *model) { @@ -565,8 +558,6 @@ machine_ps1_m2121_init(const machine_t *model) return ret; } - -#if defined(DEV_BRANCH) && defined(USE_PS1M2133) int machine_ps1_m2133_init(const machine_t *model) { @@ -579,11 +570,21 @@ machine_ps1_m2133_init(const machine_t *model) return ret; ps1_common_init(model); - - ps1_setup(2133); + device_add(&fdc_at_device); + device_add(&ide_isa_device); + device_add(&vl82c480_device); nmi_mask = 0x80; + if (gfxcard == VID_INTERNAL) + device_add(&gd5426_onboard_device); + return ret; } -#endif + +const device_t * +ps1_m2133_get_device(void) +{ + return &gd5426_onboard_device; +} + diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 98aa88381..063612dad 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -171,13 +171,15 @@ const machine_t machines[] = { { "[NEAT] DTK 386SX clone", "dtk386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_neat_init, NULL }, { "[NEAT] Goldstar 386", "goldstar386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_goldstar386_init, NULL }, { "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL }, + { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, + { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL }, /* 386SX machines which utilize the MCA bus */ { "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL }, /* 386DX machines */ { "[ACC 2168] AMI 386DX clone", "acc386", MACHINE_TYPE_386DX, {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 16384, 128, 127, machine_at_acc386_init, NULL }, - { "[SiS Rabbit] ASUS ISA-386C", "asus386", MACHINE_TYPE_386DX, {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 16384, 128, 127, machine_at_asus386_init, NULL }, + { "[SiS 310] ASUS ISA-386C", "asus386", MACHINE_TYPE_386DX, {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 16384, 128, 127, machine_at_asus386_init, NULL }, { "[ISA] Compaq Portable III (386)", "portableiii386", MACHINE_TYPE_386DX, {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO, 1, 14, 1, 127, machine_at_portableiii386_init, at_cpqiii_get_device }, { "[ISA] Micronics 386 clone", "micronics386", MACHINE_TYPE_386DX, {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_micronics386_init, NULL }, { "[C&T 386] ECS 386/32", "ecs386", MACHINE_TYPE_386DX, {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 1, 16, 1, 127, machine_at_ecs386_init, NULL }, @@ -205,12 +207,10 @@ const machine_t machines[] = { #endif { "[SiS 471] DTK PKM-0038S E-2", "dtk486", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_dtk486_init, NULL }, { "[SiS 471] Phoenix SiS 471", "px471", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_px471_init, NULL }, - { "[ALi M1429G] Acer A1G", "acera1g", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO | MACHINE_PS2, 4, 36, 1, 127, machine_at_acera1g_init, at_acera1g_get_device }, + { "[ALi M1429G] Acer A1G", "acera1g", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO | MACHINE_PS2, 4, 36, 1, 127, machine_at_acera1g_init, at_acera1g_get_device }, { "[ALi M1429] Olystar LIL1429", "ali1429", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_ali1429_init, NULL }, { "[ALi M1429] AMI WinBIOS 486", "win486", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_winbios1429_init, NULL }, -#if defined(DEV_BRANCH) && defined(USE_PS1M2133) - { "[VLB] IBM PS/1 model 2133", "ibmps1_2133", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_NONMI, 1, 64, 1, 127, machine_ps1_m2133_init, NULL }, -#endif + { "[VLSI 82c480] IBM PS/1 model 2133", "ibmps1_2133", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_NONMI | MACHINE_VIDEO, 1, 64, 1, 127, machine_ps1_m2133_init, ps1_m2133_get_device }, /* 486 machines with utilize the MCA bus */ #if defined(DEV_BRANCH) && defined(USE_PS2M70T4) @@ -227,7 +227,7 @@ const machine_t machines[] = { /* Socket 4 machines */ /* OPTi 596/597 */ - { "[OPTi Python] AMI Excalibur VLB", "excalibur", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_excalibur_init, NULL }, + { "[OPTi 597] AMI Excalibur VLB", "excalibur", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 2, 64, 2, 127, machine_at_excalibur_init, NULL }, /* 430LX */ { "[i430LX] IBM Ambra DP60 PCI", "ambradp60", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_ambradp60_init, NULL }, @@ -235,7 +235,9 @@ const machine_t machines[] = { { "[i430LX] IBM PS/ValuePoint P60", "valuepointp60", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_valuepointp60_init, NULL }, #endif { "[i430LX] Intel Premiere/PCI", "revenge", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_batman_init, NULL }, + { "[i430LX] ASUS P/I-P5MP3", "p5mp3", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 192, 2, 127, machine_at_p5mp3_init, NULL }, { "[i430LX] Micro Star 586MC1", "586mc1", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_586mc1_init, NULL }, + /* Socket 5 machines */ /* 430NX */ { "[i430NX] Intel Premiere/PCI II", "plato", MACHINE_TYPE_SOCKET5, MACHINE_CPUS_PENTIUM_S5, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_plato_init, NULL }, @@ -266,6 +268,7 @@ const machine_t machines[] = { /* 430HX */ { "[i430HX-3V] Acer M3a", "acerm3a", MACHINE_TYPE_SOCKET7_3V, MACHINE_CPUS_PENTIUM_S73V, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerm3a_init, NULL }, { "[i430HX-3V] AOpen AP53", "ap53", MACHINE_TYPE_SOCKET7_3V, MACHINE_CPUS_PENTIUM_S73V, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 127, machine_at_ap53_init, NULL }, + { "[i430HX-3V] Biostar 8500TUC", "8500tuc", MACHINE_TYPE_SOCKET7_3V, MACHINE_CPUS_PENTIUM_S73V, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 127, machine_at_8500tuc_init, NULL }, { "[i430HX-3V] SuperMicro Super P55T2S", "p55t2s", MACHINE_TYPE_SOCKET7_3V, MACHINE_CPUS_PENTIUM_S73V, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 127, machine_at_p55t2s_init, NULL }, { "[i430HX] Acer V35n", "acerv35n", MACHINE_TYPE_SOCKET7, MACHINE_CPUS_PENTIUM_S7, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerv35n_init, NULL }, @@ -331,20 +334,21 @@ const machine_t machines[] = { { "[i440BX] AOpen AX6BC", "ax6bc", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_ax6bc_init, NULL }, { "[i440BX] A-Trend ATC6310BXII", "atc6310bxii", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_atc6310bxii_init, NULL }, { "[i440BX] Tyan Tsunami ATX", "tsunamiatx", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_SOUND, 8, 1024, 8, 255, machine_at_tsunamiatx_init, at_tsunamiatx_get_device }, - { "[i440BX] Supermicro P6SBA", "p6sba", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_p6sba_init, NULL }, + { "[i440BX] SuperMicro Super P6SBA", "p6sba", MACHINE_TYPE_SLOT1, {{"Intel", cpus_PentiumII}, {"Intel/PGA370", cpus_Celeron},{"", NULL}, {"", NULL},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_p6sba_init, NULL }, /* Slot 2 machines(Including Slot 1/2 Hybrids) */ /* 440GX */ { "[i440GX] Gigabyte GA-6GXU", "6gxu", MACHINE_TYPE_SLOT2, {{"Intel", cpus_Xeon}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 16, 2048, 16, 511, machine_at_6gxu_init, NULL }, - { "[i440GX] Supermicro S2DGE", "s2dge", MACHINE_TYPE_SLOT2, {{"Intel", cpus_Xeon}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 16, 2048, 16, 511, machine_at_s2dge_init, NULL }, + { "[i440GX] SuperMicro Super S2DGE", "s2dge", MACHINE_TYPE_SLOT2, {{"Intel", cpus_Xeon}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 16, 2048, 16, 511, machine_at_s2dge_init, NULL }, /* PGA370 machines */ /* 440LX */ - { "[i440LX] Supermicro 370SLM", "s370slm", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_s370slm_init, NULL }, + { "[i440LX] SuperMicro Super 370SLM", "s370slm", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_s370slm_init, NULL }, /* 440BX */ { "[i440BX] ASUS CUBX", "cubx", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_cubx_init, NULL }, { "[i440BX] A-Trend ATC7020BXII", "atc7020bxii", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_atc7020bxii_init, NULL }, + { "[i440BX] AmazePC AM-BX133", "ambx133", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_ambx133_init, NULL }, /* 440ZX */ { "[i440ZX] Soltek SL-63A1", "63a", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_63a_init, NULL }, diff --git a/src/mem/catalyst_flash.c b/src/mem/catalyst_flash.c new file mode 100644 index 000000000..7e672e5a8 --- /dev/null +++ b/src/mem/catalyst_flash.c @@ -0,0 +1,269 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the Intel 1 Mbit and 2 Mbit, 8-bit and + * 16-bit flash devices. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * + * Copyright 2008-2019 Sarah Walker. + * Copyright 2016-2019 Miran Grca. + */ +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include <86box/device.h> +#include <86box/mem.h> +#include <86box/machine.h> +#include <86box/timer.h> +#include <86box/nvr.h> +#include <86box/plat.h> + + +#define FLAG_WORD 4 +#define FLAG_BXB 2 +#define FLAG_INV_A16 1 + + +enum +{ + BLOCK_MAIN1, + BLOCK_MAIN2, + BLOCK_DATA1, + BLOCK_DATA2, + BLOCK_BOOT, + BLOCKS_NUM +}; + +enum +{ + CMD_SET_READ = 0x00, + CMD_READ_SIGNATURE = 0x90, + CMD_ERASE = 0x20, + CMD_ERASE_CONFIRM = 0x20, + CMD_ERASE_VERIFY = 0xA0, + CMD_PROGRAM = 0x40, + CMD_PROGRAM_VERIFY = 0xC0, + CMD_RESET = 0xFF +}; + + +typedef struct flash_t +{ + uint8_t command, pad, + pad0, pad1, + *array; + + mem_mapping_t mapping, mapping_h[2]; +} flash_t; + + +static wchar_t flash_path[1024]; + + +static uint8_t +flash_read(uint32_t addr, void *p) +{ + flash_t *dev = (flash_t *) p; + uint8_t ret = 0xff; + + addr &= biosmask; + + switch (dev->command) { + case CMD_ERASE_VERIFY: + case CMD_PROGRAM_VERIFY: + case CMD_RESET: + case CMD_SET_READ: + ret = dev->array[addr]; + break; + + case CMD_READ_SIGNATURE: + if (addr == 0x00000) + ret = 0x31; /* CATALYST */ + else if (addr == 0x00001) + ret = 0xB4; /* 28F010 */ + break; + } + + return ret; +} + + +static uint16_t +flash_readw(uint32_t addr, void *p) +{ + flash_t *dev = (flash_t *)p; + uint16_t *q; + + addr &= biosmask; + + q = (uint16_t *)&(dev->array[addr]); + + return *q; +} + + +static uint32_t +flash_readl(uint32_t addr, void *p) +{ + flash_t *dev = (flash_t *)p; + uint32_t *q; + + addr &= biosmask; + + q = (uint32_t *)&(dev->array[addr]); + + return *q; +} + + +static void +flash_write(uint32_t addr, uint8_t val, void *p) +{ + flash_t *dev = (flash_t *) p; + + addr &= biosmask; + + switch (dev->command) { + case CMD_ERASE: + if (val == CMD_ERASE_CONFIRM) + memset(dev->array, 0xff, biosmask + 1); + break; + + case CMD_PROGRAM: + dev->array[addr] = val; + break; + + default: + dev->command = val; + break; + } +} + + +static void +flash_writew(uint32_t addr, uint16_t val, void *p) +{ +} + + +static void +flash_writel(uint32_t addr, uint32_t val, void *p) +{ +} + + +static void +catalyst_flash_add_mappings(flash_t *dev) +{ + memcpy(dev->array, rom, biosmask + 1); + + mem_mapping_add(&dev->mapping, 0xe0000, 0x20000, + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROMCS, (void *) dev); + + mem_mapping_add(&(dev->mapping_h[0]), 0xfffc0000, 0x20000, + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROMCS, (void *) dev); + mem_mapping_add(&(dev->mapping_h[1]), 0xfffe0000, 0x20000, + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROMCS, (void *) dev); +} + + +static void +catalyst_flash_reset(void *priv) +{ + flash_t *dev = (flash_t *) priv; + + dev->command = CMD_RESET; +} + + +static void * +catalyst_flash_init(const device_t *info) +{ + FILE *f; + int l; + flash_t *dev; + wchar_t *machine_name, *flash_name; + + dev = malloc(sizeof(flash_t)); + memset(dev, 0, sizeof(flash_t)); + + l = strlen(machine_get_internal_name_ex(machine))+1; + machine_name = (wchar_t *) malloc(l * sizeof(wchar_t)); + mbstowcs(machine_name, machine_get_internal_name_ex(machine), l); + l = wcslen(machine_name)+5; + flash_name = (wchar_t *)malloc(l*sizeof(wchar_t)); + swprintf(flash_name, l, L"%ls.bin", machine_name); + + if (wcslen(flash_name) <= 1024) + wcscpy(flash_path, flash_name); + else + wcsncpy(flash_path, flash_name, 1024); + + mem_mapping_disable(&bios_mapping); + mem_mapping_disable(&bios_high_mapping); + + dev->array = (uint8_t *) malloc(0x20000); + memset(dev->array, 0xff, 0x20000); + + catalyst_flash_add_mappings(dev); + + dev->command = CMD_RESET; + + f = nvr_fopen(flash_path, L"rb"); + if (f) { + fread(dev->array, 0x20000, 1, f); + fclose(f); + } + + free(flash_name); + free(machine_name); + + return dev; +} + + +static void +catalyst_flash_close(void *p) +{ + FILE *f; + flash_t *dev = (flash_t *)p; + + f = nvr_fopen(flash_path, L"wb"); + fwrite(dev->array, 0x20000, 1, f); + fclose(f); + + free(dev->array); + dev->array = NULL; + + free(dev); +} + + +const device_t catalyst_flash_device = +{ + "Catalyst 28F010-D Flash BIOS", + DEVICE_PCI, + 0, + catalyst_flash_init, + catalyst_flash_close, + catalyst_flash_reset, + NULL, NULL, NULL, NULL +}; diff --git a/src/mem/intel_flash.c b/src/mem/intel_flash.c index 28ea1e8d4..d6a625ab7 100644 --- a/src/mem/intel_flash.c +++ b/src/mem/intel_flash.c @@ -463,6 +463,9 @@ intel_flash_close(void *p) fwrite(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f); fclose(f); + free(dev->array); + dev->array = NULL; + free(dev); } diff --git a/src/mem/mem.c b/src/mem/mem.c index 5ad097631..572c5878a 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -81,6 +81,7 @@ page_t *pages, /* RAM page table */ uint32_t pages_sz; /* #pages in table */ uint8_t *ram, *ram2; /* the virtual RAM */ +uint8_t page_ff[4096]; uint32_t rammask; uint8_t *rom; /* the virtual ROM */ @@ -1720,6 +1721,9 @@ page_remove_from_evict_list(page_t *p) void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) { + if ((p != NULL) && (p->mem == page_ff)) + return; + #ifdef USE_DYNAREC if (val != p->mem[addr & 0xfff] || codegen_in_recompile) { #else @@ -1743,6 +1747,9 @@ mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) { + if ((p != NULL) && (p->mem == page_ff)) + return; + #ifdef USE_DYNAREC if (val != *(uint16_t *)&p->mem[addr & 0xfff] || codegen_in_recompile) { #else @@ -1776,6 +1783,9 @@ mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) { + if ((p != NULL) && (p->mem == page_ff)) + return; + #ifdef USE_DYNAREC if (val != *(uint32_t *)&p->mem[addr & 0xfff] || codegen_in_recompile) { #else @@ -1805,6 +1815,9 @@ mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) { + if ((p != NULL) && (p->mem == page_ff)) + return; + #ifdef USE_DYNAREC if ((p == NULL) || (p->mem == NULL) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) { #else @@ -1820,6 +1833,9 @@ mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) { + if ((p != NULL) && (p->mem == page_ff)) + return; + #ifdef USE_DYNAREC if ((p == NULL) || (p->mem == NULL) || (val != *(uint16_t *)&p->mem[addr & 0xfff]) || codegen_in_recompile) { #else @@ -1837,6 +1853,9 @@ mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) { + if ((p != NULL) && (p->mem == page_ff)) + return; + #ifdef USE_DYNAREC if ((p == NULL) || (p->mem == NULL) || (val != *(uint32_t *)&p->mem[addr & 0xfff]) || codegen_in_recompile) { #else @@ -2606,13 +2625,17 @@ mem_log("MEM: reset: new pages=%08lx, pages_sz=%i\n", pages, pages_sz); #endif for (c = 0; c < pages_sz; c++) { - if (mem_size > 1048576) { - if ((c << 12) < (1 << 30)) + if ((c << 12) >= (mem_size << 10)) + pages[c].mem = page_ff; + else { + if (mem_size > 1048576) { + if ((c << 12) < (1 << 30)) + pages[c].mem = &ram[c << 12]; + else + pages[c].mem = &ram2[(c << 12) - (1 << 30)]; + } else pages[c].mem = &ram[c << 12]; - else - pages[c].mem = &ram2[(c << 12) - (1 << 30)]; - } else - pages[c].mem = &ram[c << 12]; + } if (c < m) { pages[c].write_b = mem_write_ramb_page; pages[c].write_w = mem_write_ramw_page; @@ -2745,6 +2768,7 @@ mem_init(void) #if FIXME memset(ff_array, 0xff, sizeof(ff_array)); #endif + memset(page_ff, 0xff, sizeof(page_ff)); /* Reset the memory state. */ mem_reset(); diff --git a/src/mem/spd.c b/src/mem/spd.c index 5d26d7364..ae81c5d67 100644 --- a/src/mem/spd.c +++ b/src/mem/spd.c @@ -25,6 +25,7 @@ #include <86box/device.h> #include <86box/smbus.h> #include <86box/spd.h> +#include <86box/version.h> #define MIN(a, b) ((a) < (b) ? (a) : (b)) diff --git a/src/pc.c b/src/pc.c index 574b81d58..0a7ea9b14 100644 --- a/src/pc.c +++ b/src/pc.c @@ -77,6 +77,7 @@ #include <86box/ui.h> #include <86box/plat.h> #include <86box/plat_midi.h> +#include <86box/version.h> /* Stuff that used to be globally declared in plat.h but is now extern there diff --git a/src/pci.c b/src/pci.c index 4f5b40f66..ace9e14e5 100644 --- a/src/pci.c +++ b/src/pci.c @@ -55,13 +55,14 @@ int pci_burst_time, pci_nonburst_time; static pci_card_t pci_cards[32]; -static uint8_t last_pci_card = 0; +static uint8_t pci_pmc = 0, last_pci_card = 0; static uint8_t pci_card_to_slot_mapping[32]; static uint8_t elcr[2] = { 0, 0 }; static uint8_t pci_irqs[4], pci_irq_level[4]; static uint64_t pci_irq_hold[16]; static pci_mirq_t pci_mirqs[3]; static int pci_type, + pci_switch, pci_index, pci_func, pci_card, @@ -71,6 +72,9 @@ static int pci_type, static int trc_reg = 0, elcr_enabled = 1; +static void pci_reset_regs(void); + + #ifdef ENABLE_PCI_LOG int pci_do_log = ENABLE_PCI_LOG; @@ -244,15 +248,39 @@ pci_type2_write(uint16_t port, uint8_t val, void *priv) if (!pci_key && (val & 0xf0)) io_sethandler(0xc000, 0x1000, pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, priv); - else + pci_type2_write, NULL, NULL, NULL); + else if (pci_key && !(val & 0xf0)) io_removehandler(0xc000, 0x1000, pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, priv); + pci_type2_write, NULL, NULL, NULL); pci_key = val & 0xf0; - } else if (port == 0xcfa) { + } else if (port == 0xcfa) pci_bus = val; + else if (port == 0xcfb) { + pci_reset_regs(); + + if (!pci_pmc && (val & 0x01)) { + io_removehandler(0x0cf8, 1, + pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_removehandler(0x0cfa, 1, + pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_sethandler(0x0cf8, 1, + NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); + io_sethandler(0x0cfc, 4, + pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); + } else if (pci_pmc && !(val & 0x01)) { + io_removehandler(0x0cf8, 1, + NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); + io_removehandler(0x0cfc, 4, + pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); + io_sethandler(0x0cf8, 1, + pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + } + + pci_pmc = (val & 0x01); } else { pci_card = (port >> 8) & 0xf; pci_index = port & 0xff; @@ -283,9 +311,10 @@ pci_type2_read(uint16_t port, void *priv) if (port == 0xcf8) return pci_key | (pci_func << 1); - - if (port == 0xcfa) + else if (port == 0xcfa) return pci_bus; + else if (port == 0xcfb) + return pci_pmc; pci_card = (port >> 8) & 0xf; pci_index = port & 0xff; @@ -612,11 +641,24 @@ pci_elcr_set_enabled(int enabled) } -void -pci_reset(void) +static void +pci_reset_regs(void) +{ + pci_index = pci_card = pci_func = pci_bus = pci_key = 0; + + io_removehandler(0xc000, 0x1000, + pci_type2_read, NULL, NULL, + pci_type2_write, NULL, NULL, NULL); +} + + +static void +pci_reset_hard(void) { int i; + pci_reset_regs(); + for (i = 0; i < 16; i++) { if (pci_irq_hold[i]) { pci_irq_hold[i] = 0; @@ -629,6 +671,26 @@ pci_reset(void) } +void +pci_reset(void) +{ + if (pci_switch) { + pci_pmc = 0x00; + + io_removehandler(0x0cf8, 1, + NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); + io_removehandler(0x0cfc, 4, + pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); + io_sethandler(0x0cf8, 1, + pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + } + + pci_reset_hard(); +} + + static void pci_slots_clear(void) { @@ -741,11 +803,19 @@ pci_init(int type) pci_slots_clear(); - pci_reset(); + pci_reset_hard(); trc_init(); pci_type = type; + pci_switch = !!(type & PCI_CAN_SWITCH_TYPE); + + if (pci_switch) { + pci_pmc = 0x00; + + io_sethandler(0x0cfb, 1, + pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + } if (!(type & PCI_NO_IRQ_STEERING)) { io_sethandler(0x04d0, 0x0002, diff --git a/src/pic.c b/src/pic.c index 4e723a12a..364d87589 100644 --- a/src/pic.c +++ b/src/pic.c @@ -407,7 +407,7 @@ pic2_write(uint16_t addr, uint8_t val, void *priv) if (val & 4) pic2.read=4; if (val & 2) - pic2.read=(val & 3); + pic2.read=(val & 1); } } } diff --git a/src/pit.c b/src/pit.c index 7c6c1923d..b33adbc1a 100644 --- a/src/pit.c +++ b/src/pit.c @@ -1030,7 +1030,7 @@ pit_set_clock(int clock) isa_timing = (cpuclock / (double)8000000.0); if (cpu_64bitbus) - bus_timing = (cpuclock / ((double)cpu_busspeed) / 2); + bus_timing = (cpuclock / ((double)cpu_busspeed / 2)); else bus_timing = (cpuclock / (double)cpu_busspeed); pci_timing = (cpuclock / (double)cpu_pci_speed); diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index 8e1b5a55d..f8a7e96fa 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -36,6 +36,7 @@ #include <86box/ui.h> #include <86box/cdrom.h> #include <86box/scsi_cdrom.h> +#include <86box/version.h> #pragma pack(push,1) diff --git a/src/scsi/scsi_disk.c b/src/scsi/scsi_disk.c index 19d87bfa6..2f3850292 100644 --- a/src/scsi/scsi_disk.c +++ b/src/scsi/scsi_disk.c @@ -30,6 +30,7 @@ #include <86box/plat.h> #include <86box/ui.h> #include <86box/scsi_disk.h> +#include <86box/version.h> #define scsi_disk_sense_error dev->sense[0] diff --git a/src/sio/sio_fdc37c661.c b/src/sio/sio_fdc37c661.c new file mode 100644 index 000000000..6936dff7c --- /dev/null +++ b/src/sio/sio_fdc37c661.c @@ -0,0 +1,278 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the SMC FDC37C661 Super + * I/O Chip. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * + * Copyright 2008-2020 Sarah Walker. + * Copyright 2016-2020 Miran Grca. + * Copyright 2020 plant/nerd73. + */ +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include <86box/io.h> +#include <86box/timer.h> +#include <86box/device.h> +#include <86box/pci.h> +#include <86box/lpt.h> +#include <86box/serial.h> +#include <86box/hdc.h> +#include <86box/hdc_ide.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/sio.h> + + +typedef struct { + uint8_t lock[2], + regs[4]; + int cur_reg, + com3_addr, com4_addr; + fdc_t *fdc; + serial_t *uart[2]; +} fdc37c661_t; + + +static void +write_lock(fdc37c661_t *dev, uint8_t val) +{ + if (val == 0x55 && dev->lock[1] == 0x55) + fdc_3f1_enable(dev->fdc, 0); + if ((dev->lock[0] == 0x55) && (dev->lock[1] == 0x55) && (val != 0x55)) + fdc_3f1_enable(dev->fdc, 1); + + dev->lock[0] = dev->lock[1]; + dev->lock[1] = val; +} + + +static void +set_com34_addr(fdc37c661_t *dev) +{ + switch (dev->regs[1] & 0x60) { + case 0x00: + dev->com3_addr = 0x338; + dev->com4_addr = 0x238; + break; + case 0x20: + dev->com3_addr = 0x3e8; + dev->com4_addr = 0x2e8; + break; + case 0x40: + dev->com3_addr = 0x3e8; + dev->com4_addr = 0x2e0; + break; + case 0x60: + dev->com3_addr = 0x220; + dev->com4_addr = 0x228; + break; + } +} + + +static void +set_serial_addr(fdc37c661_t *dev, int port) +{ + uint8_t shift = (port << 4); + + if (dev->regs[2] & (4 << shift)) { + switch (dev->regs[2] & (3 << shift)) { + case 0: + serial_setup(dev->uart[port], SERIAL1_ADDR, SERIAL1_IRQ); + break; + case 1: + serial_setup(dev->uart[port], SERIAL2_ADDR, SERIAL2_IRQ); + break; + case 2: + serial_setup(dev->uart[port], dev->com3_addr, 4); + break; + case 3: + serial_setup(dev->uart[port], dev->com4_addr, 3); + break; + } + } +} + + +static void +lpt1_handler(fdc37c661_t *dev) +{ + lpt1_remove(); + switch (dev->regs[1] & 3) { + case 1: + lpt1_init(0x3bc); + lpt1_irq(7); + break; + case 2: + lpt1_init(0x378); + lpt1_irq(5); + break; + case 3: + lpt1_init(0x278); + lpt1_irq(5); + break; + } +} + + +static void +fdc_handler(fdc37c661_t *dev) +{ + fdc_remove(dev->fdc); + if (dev->regs[0] & 0x10) + fdc_set_base(dev->fdc, 0x03f0); +} + + +static void +fdc37c661_write(uint16_t port, uint8_t val, void *priv) +{ + fdc37c661_t *dev = (fdc37c661_t *) priv; + uint8_t valxor = 0; + + if ((dev->lock[0] == 0x55) && (dev->lock[1] == 0x55)) { + if (port == 0x3f0) { + if (val == 0xaa) + write_lock(dev, val); + else + dev->cur_reg = val; + } else { + if (dev->cur_reg > 4) + return; + + valxor = val ^ dev->regs[dev->cur_reg]; + dev->regs[dev->cur_reg] = val; + + switch(dev->cur_reg) { + case 0: + if (valxor & 0x10) + fdc_handler(dev); + + break; + case 1: + if (valxor & 3) + lpt1_handler(dev); + if (valxor & 0x60) { + serial_remove(dev->uart[0]); + serial_remove(dev->uart[1]); + set_com34_addr(dev); + set_serial_addr(dev, 0); + set_serial_addr(dev, 1); + } + break; + case 2: + if (valxor & 7) { + serial_remove(dev->uart[0]); + set_serial_addr(dev, 0); + } + if (valxor & 0x70) { + serial_remove(dev->uart[1]); + set_serial_addr(dev, 1); + } + break; + case 3: + if (valxor & 4) + fdc_update_enh_mode(dev->fdc, (dev->regs[3] & 4) ? 1 : 0); + break; + } + } + } else { + if (port == 0x3f0) + write_lock(dev, val); + } +} + + +static uint8_t +fdc37c661_read(uint16_t port, void *priv) +{ + fdc37c661_t *dev = (fdc37c661_t *) priv; + uint8_t ret = 0xff; + + if ((dev->lock[0] == 0x55) && (dev->lock[1] == 0x55)) { + if (port == 0x3f1) + ret = dev->regs[dev->cur_reg]; + } + + return ret; +} + + +static void +fdc37c661_reset(fdc37c661_t *dev) +{ + dev->com3_addr = 0x338; + dev->com4_addr = 0x238; + + serial_remove(dev->uart[0]); + serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ); + + serial_remove(dev->uart[1]); + serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ); + + lpt1_remove(); + lpt1_init(0x378); + + fdc_reset(dev->fdc); + + memset(dev->lock, 0, 2); + memset(dev->regs, 0, 16); + + dev->regs[0x0] = 0x3f; + dev->regs[0x1] = 0x9f; + dev->regs[0x2] = 0xdc; + dev->regs[0x3] = 0x78; +} + + +static void +fdc37c661_close(void *priv) +{ + fdc37c661_t *dev = (fdc37c661_t *) priv; + + free(dev); +} + + +static void * +fdc37c661_init(const device_t *info) +{ + fdc37c661_t *dev = (fdc37c661_t *) malloc(sizeof(fdc37c661_t)); + memset(dev, 0, sizeof(fdc37c661_t)); + + dev->fdc = device_add(&fdc_at_smc_device); + + dev->uart[0] = device_add_inst(&ns16550_device, 1); + dev->uart[1] = device_add_inst(&ns16550_device, 2); + + io_sethandler(0x03f0, 0x0002, + fdc37c661_read, NULL, NULL, fdc37c661_write, NULL, NULL, dev); + + fdc37c661_reset(dev); + + return dev; +} + +const device_t fdc37c661_device = { + "SMC FDC37C661 Super I/O", + 0, + 0, + fdc37c661_init, fdc37c661_close, NULL, + NULL, NULL, NULL, + NULL +}; + diff --git a/src/sio/sio_ps1_m2133.c b/src/sio/sio_ps1_m2133.c new file mode 100644 index 000000000..264dd78c7 --- /dev/null +++ b/src/sio/sio_ps1_m2133.c @@ -0,0 +1,148 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the chipset used by the IBM PS/1 Model 2133 EMEA 451 + * whose name is currently unknown. + * + * Authors: Sarah Walker, + * + * Copyright 2020 Sarah Walker. + */ +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include <86box/io.h> +#include <86box/timer.h> +#include <86box/device.h> +#include <86box/lpt.h> +#include <86box/serial.h> +#include <86box/sio.h> + + +typedef struct ps1_m2133_sio_t +{ + int idx; + uint8_t regs[3]; + serial_t *uart[2]; +} ps1_m2133_sio_t; + +static uint16_t ps1_lpt_io[4] = {0x378, 0x3bc, 0x278, 0x378}; +static uint16_t ps1_com_io[4] = {0x3f8, 0x2f8, 0x3e8, 0x2e8}; + +static uint8_t +ps1_m2133_read(uint16_t port, void *p) +{ + ps1_m2133_sio_t *dev = (ps1_m2133_sio_t *)p; + uint8_t ret = 0xff; + + switch (port) { + case 0x398: + ret = dev->idx; + break; + + case 0x399: + if (dev->idx < 3) + ret = dev->regs[dev->idx]; + break; + } + return ret; +} + +static void +ps1_m2133_write(uint16_t port, uint8_t val, void *p) +{ + ps1_m2133_sio_t *dev = (ps1_m2133_sio_t *)p; + uint16_t lpt_addr; + + switch (port) { + case 0x398: + dev->idx = val; + break; + + case 0x399: + if (dev->idx < 3) { + dev->regs[dev->idx] = val; + + lpt1_remove(); + lpt2_remove(); + serial_remove(dev->uart[0]); + serial_remove(dev->uart[1]); + + if (dev->regs[0] & 1) { + lpt_addr = ps1_lpt_io[dev->regs[1] & 3]; + + lpt1_init(lpt_addr); + if ((lpt_addr == 0x378) || (lpt_addr == 0x3bc)) { + if (((dev->regs[1] & 3) == 3) && (lpt_addr == 0x378)) { + lpt1_irq(5); + } else { + lpt1_irq(7); + } + } else if (lpt_addr == 0x278) { + lpt1_irq(5); + } + } + + if (dev->regs[0] & 2) + serial_setup(dev->uart[0], ps1_com_io[(dev->regs[1] >> 2) & 3], 4); + if (dev->regs[0] & 4) + serial_setup(dev->uart[1], ps1_com_io[(dev->regs[1] >> 4) & 3], 3); + } + break; + } +} + +static void +ps1_m2133_reset(ps1_m2133_sio_t *dev) +{ + serial_remove(dev->uart[0]); + serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ); + + serial_remove(dev->uart[1]); + serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ); + + lpt1_remove(); + lpt1_init(0x378); + lpt1_irq(7); +} + +static void * +ps1_m2133_init(const device_t *info) +{ + ps1_m2133_sio_t *dev = (ps1_m2133_sio_t *) malloc(sizeof(ps1_m2133_sio_t)); + memset(dev, 0, sizeof(ps1_m2133_sio_t)); + + dev->uart[0] = device_add_inst(&ns16450_device, 1); + dev->uart[1] = device_add_inst(&ns16450_device, 2); + + io_sethandler(0x0398, 0x0002, ps1_m2133_read, NULL, NULL, ps1_m2133_write, NULL, NULL, dev); + + ps1_m2133_reset(dev); + + return dev; +} + +static void +ps1_m2133_close(void *p) +{ + ps1_m2133_sio_t *dev = (ps1_m2133_sio_t *)p; + + free(dev); +} + +const device_t ps1_m2133_sio = { + "IBM PS/1 Model 2133 EMEA 451 Super I/O", + 0, + 0, + ps1_m2133_init, ps1_m2133_close, NULL, + NULL, NULL, NULL, + NULL +}; diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index 09acdc3e0..c169253b0 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -3023,7 +3023,10 @@ static void #endif case CIRRUS_ID_CLGD5426: - romfn = BIOS_GD5426_PATH; + if (info->local & 0x200) { + romfn = NULL; + } else + romfn = BIOS_GD5426_PATH; break; case CIRRUS_ID_CLGD5428: @@ -3542,6 +3545,20 @@ const device_t gd5426_vlb_device = gd5428_config }; +const device_t gd5426_onboard_device = +{ + "Cirrus Logic CL-GD 5426 (On-board)", + DEVICE_VLB, + CIRRUS_ID_CLGD5426 | 0x200, + gd54xx_init, + gd54xx_close, + NULL, + NULL, + gd54xx_speed_changed, + gd54xx_force_redraw, + gd5428_config +}; + const device_t gd5428_isa_device = { "Cirrus Logic CL-GD 5428 (ISA)", @@ -3586,7 +3603,7 @@ const device_t gd5428_mca_device = const device_t gd5428_a1g_device = { - "Cirrus Logic CL-GD 5428 (Onboard)", + "Cirrus Logic CL-GD 5428 (On-Board)", DEVICE_AT | DEVICE_ISA, CIRRUS_ID_CLGD5428, gd54xx_init, diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 551229513..a86a20584 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -647,7 +647,9 @@ static void s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) if (s3_cpu_dest(s3)) break; s3->accel.pix_trans[0] = val; - if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80 && !(s3->accel.cmd & 0x600) && (s3->accel.cmd & 0x100)) + /*Check to see if there's actual data from CPU*/ + if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80 && !(s3->accel.cmd & 0x600) && (s3->accel.cmd & 0x100) && + (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40))) s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); else if (!(s3->accel.cmd & 0x600) && (s3->accel.cmd & 0x100)) s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); @@ -656,7 +658,9 @@ static void s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) if (s3_cpu_dest(s3)) break; s3->accel.pix_trans[1] = val; - if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80 && (s3->accel.cmd & 0x600) == 0x200 && (s3->accel.cmd & 0x100)) + /*Check to see if there's actual data from CPU*/ + if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80 && (s3->accel.cmd & 0x600) == 0x200 && (s3->accel.cmd & 0x100) && + (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40))) { if (s3->accel.cmd & 0x1000) s3_accel_start(16, 1, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), 0, s3); else s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); @@ -695,7 +699,9 @@ static void s3_accel_out_fifo_w(s3_t *s3, uint16_t port, uint16_t val) { if (s3->accel.cmd & 0x100) { - if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80) + /*Check to see if there's actual data from CPU*/ + if ((s3->accel.multifunc[0xa] & 0xc0) == 0x80 && + (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40))) { if (s3->accel.cmd & 0x1000) val = (val >> 8) | (val << 8); @@ -704,7 +710,7 @@ static void s3_accel_out_fifo_w(s3_t *s3, uint16_t port, uint16_t val) s3_accel_start(8, 1, (val >> 8) & 0xff, 0, s3); s3_accel_start(8, 1, val & 0xff, 0, s3); } - if ((s3->accel.cmd & 0x600) == 0x000) + else if ((s3->accel.cmd & 0x600) == 0x000) s3_accel_start(8, 1, val | (val << 16), 0, s3); else s3_accel_start(16, 1, val | (val << 16), 0, s3); @@ -1316,8 +1322,10 @@ void s3_out(uint16_t addr, uint8_t val, void *p) else rs3 = 0; bt48x_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga); - } else if (s3->chip == S3_86C801 || s3->chip == S3_86C805 || s3->chip == S3_86C911) + } else if (s3->chip == S3_86C801 || s3->chip == S3_86C805) att49x_ramdac_out(addr, val, svga->ramdac, svga); + else if (s3->chip == S3_86C911) + sc1148x_ramdac_out(addr, val, svga->ramdac, svga); else sdac_ramdac_out(addr, rs2, val, svga->ramdac, svga); return; @@ -1440,7 +1448,7 @@ void s3_out(uint16_t addr, uint8_t val, void *p) s3->hwc_fg_col = (s3->hwc_fg_col & 0x00ffff) | (val << 16); break; } - s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) % 3; + s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3; break; case 0x4b: switch (s3->hwc_col_stack_pos) @@ -1455,12 +1463,12 @@ void s3_out(uint16_t addr, uint8_t val, void *p) s3->hwc_bg_col = (s3->hwc_bg_col & 0x00ffff) | (val << 16); break; } - s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) % 3; + s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3; break; case 0x53: case 0x58: case 0x59: case 0x5a: - if (s3->chip != S3_86C911) + if (s3->chip != S3_86C911) /*S3 911/924 doesn't do MMIO*/ s3_updatemapping(s3); break; @@ -1553,8 +1561,10 @@ uint8_t s3_in(uint16_t addr, void *p) else if (s3->chip == S3_VISION964 || s3->chip == S3_86C928) { rs3 = !!(svga->crtc[0x55] & 0x02); return bt48x_ramdac_in(addr, rs2, rs3, svga->ramdac, svga); - } else if (s3->chip == S3_86C801 || s3->chip == S3_86C805 || s3->chip == S3_86C911) + } else if (s3->chip == S3_86C801 || s3->chip == S3_86C805) return att49x_ramdac_in(addr, svga->ramdac, svga); + else if (s3->chip == S3_86C911) + return sc1148x_ramdac_in(addr, svga->ramdac, svga); else return sdac_ramdac_in(addr, rs2, svga->ramdac, svga); break; @@ -1641,7 +1651,7 @@ void s3_recalctimings(svga_t *svga) break; case 15: svga->render = svga_render_15bpp_highres; - if (s3->chip != S3_VISION964 && s3->chip != S3_86C801 && s3->chip != S3_86C928) + if (s3->chip != S3_VISION964 && s3->chip != S3_86C801 && s3->chip != S3_86C928 && s3->chip != S3_86C911) svga->hdisp /= 2; break; case 16: @@ -1716,7 +1726,7 @@ void s3_updatemapping(s3_t *s3) s3->linear_base = (svga->crtc[0x5a] << 16) | (svga->crtc[0x59] << 24); if ((s3->chip == S3_86C801) || (s3->chip == S3_86C805) || - (s3->chip == S3_86C911) || (s3->chip == S3_86C928)) { + (s3->chip == S3_86C928)) { if (s3->vlb) s3->linear_base &= 0x03ffffff; else @@ -1734,11 +1744,8 @@ void s3_updatemapping(s3_t *s3) s3->linear_size = 0x200000; break; case 3: /*8mb*/ - switch (s3->chip) { - case S3_TRIO32: + switch (s3->chip) { /* Not on video cards that don't support 4MB*/ case S3_TRIO64: - case S3_86C801: - case S3_86C805: case S3_86C928: s3->linear_size = 0x400000; break; @@ -1767,7 +1774,8 @@ void s3_updatemapping(s3_t *s3) /* Memory mapped I/O. */ if ((svga->crtc[0x53] & 0x10) || (s3->accel.advfunc_cntl & 0x20)) { /* Old MMIO. */ - mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&svga->mapping); /* This must stay otherwise we can get a big messup in most operating systems, + like missing backgrounds, etc.*/ mem_mapping_enable(&s3->mmio_mapping); } else mem_mapping_disable(&s3->mmio_mapping); @@ -1834,7 +1842,8 @@ void s3_accel_out(uint16_t port, uint8_t val, void *p) break; case 0x4948: case 0x4ae8: s3->accel.advfunc_cntl = val; - s3_updatemapping(s3); + if (s3->chip != S3_86C911) /*S3 911/924 doesn't do MMIO*/ + s3_updatemapping(s3); break; } } @@ -3432,7 +3441,7 @@ static void *s3_init(const device_t *info) if (chip == S3_VISION964) svga->dac_hwcursor_draw = bt48x_hwcursor_draw; - if (s3->chip >= S3_VISION864) { + if (chip >= S3_VISION864) { switch (vram) { case 0: /* 512 kB */ svga->vram_mask = (1 << 19) - 1; @@ -3502,7 +3511,7 @@ static void *s3_init(const device_t *info) s3->packed_mmio = 0; s3->width = 1024; - svga->ramdac = device_add(&att490_ramdac_device); + svga->ramdac = device_add(&sc11483_ramdac_device); svga->clock_gen = device_add(&av9194_device); svga->getclock = av9194_getclock; break; @@ -3800,9 +3809,6 @@ static const device_config_t s3_config[] = { "4 MB", 4 }, - { - "8 MB", 8 - }, { "" } diff --git a/src/video/vid_sc1148x_ramdac.c b/src/video/vid_sc1148x_ramdac.c new file mode 100644 index 000000000..b786629ab --- /dev/null +++ b/src/video/vid_sc1148x_ramdac.c @@ -0,0 +1,143 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Emulation of Sierra SC11483 and SC11487 RAMDACs. + * + * Used by the S3 911 and 924 chips. + * + * + * + * Authors: TheCollector1995, + * + * Copyright 2020 TheCollector1995. + */ +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include <86box/device.h> +#include <86box/mem.h> +#include <86box/timer.h> +#include <86box/video.h> +#include <86box/vid_svga.h> + + +typedef struct +{ + int type; + int state; + uint8_t ctrl; +} sc1148x_ramdac_t; + + +void +sc1148x_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga) +{ + sc1148x_ramdac_t *ramdac = (sc1148x_ramdac_t *) p; + + switch (addr) { + case 0x3C6: + if (ramdac->state == 4) { + ramdac->state = 0; + ramdac->ctrl = val; + if (ramdac->ctrl & 0x80) { + if (ramdac->ctrl & 0x40) + svga->bpp = 16; + else + svga->bpp = 15; + } else { + svga->bpp = 8; + } + svga_recalctimings(svga); + return; + } + ramdac->state = 0; + break; + case 0x3C7: + case 0x3C8: + case 0x3C9: + ramdac->state = 0; + break; + } + + svga_out(addr, val, svga); +} + + +uint8_t +sc1148x_ramdac_in(uint16_t addr, void *p, svga_t *svga) +{ + sc1148x_ramdac_t *ramdac = (sc1148x_ramdac_t *) p; + uint8_t temp = svga_in(addr, svga); + + switch (addr) { + case 0x3C6: + if (ramdac->state == 4) { + ramdac->state = 0; + temp = ramdac->ctrl; + + if (ramdac->type == 1) { + if (ramdac->ctrl & 0x80) + temp |= 1; + else + temp &= ~1; + } + break; + } + + ramdac->state++; + break; + case 0x3C7: + case 0x3C8: + case 0x3C9: + ramdac->state = 0; + break; + } + + return temp; +} + + +static void * +sc1148x_ramdac_init(const device_t *info) +{ + sc1148x_ramdac_t *ramdac = (sc1148x_ramdac_t *) malloc(sizeof(sc1148x_ramdac_t)); + memset(ramdac, 0, sizeof(sc1148x_ramdac_t)); + + ramdac->type = info->local; + + return ramdac; +} + + +static void +sc1148x_ramdac_close(void *priv) +{ + sc1148x_ramdac_t *ramdac = (sc1148x_ramdac_t *) priv; + + if (ramdac) + free(ramdac); +} + +const device_t sc11483_ramdac_device = +{ + "Sierra SC11483 RAMDAC", + 0, 0, + sc1148x_ramdac_init, sc1148x_ramdac_close, + NULL, NULL, NULL, NULL +}; + +const device_t sc11487_ramdac_device = +{ + "Sierra SC11487 RAMDAC", + 0, 1, + sc1148x_ramdac_init, sc1148x_ramdac_close, + NULL, NULL, NULL, NULL +}; diff --git a/src/win/86Box.rc b/src/win/86Box.rc index 6ceab5ab7..62031c373 100644 --- a/src/win/86Box.rc +++ b/src/win/86Box.rc @@ -22,6 +22,7 @@ #include <86box/resource.h> #include <86box/86box.h> #include <86box/plat.h> +#include <86box/version.h> #undef IN_RESOURCE_H #define APSTUDIO_READONLY_SYMBOLS @@ -163,7 +164,7 @@ BEGIN #endif POPUP "&Help" BEGIN - MENUITEM "&About " EMU_NAME "...", IDM_ABOUT + MENUITEM "&About 86Box...", IDM_ABOUT END END @@ -318,7 +319,7 @@ END DLG_CONFIG DIALOG DISCARDABLE 0, 0, 366, 251 STYLE DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION | WS_SYSMENU -CAPTION EMU_NAME " Settings" +CAPTION "86Box Settings" FONT 9, "Segoe UI" BEGIN DEFPUSHBUTTON "OK",IDOK,246,230,50,14 @@ -877,7 +878,7 @@ END STRINGTABLE DISCARDABLE BEGIN - 2048 EMU_NAME + 2048 "86Box" IDS_2049 "Error" IDS_2050 "Fatal error" IDS_2051 "Are you sure you want to save the settings?" @@ -885,7 +886,7 @@ BEGIN IDS_2053 "Speed" IDS_2054 "ZIP %03i %i (%s): %ls" IDS_2055 "ZIP images (*.IM?;*.ZDI)\0*.IM?;*.ZDI\0" - IDS_2056 EMU_NAME " could not find any usable ROM images.\n\nPlease download a ROM set from " EMU_ROMS_URL " and extract it into the ""roms"" directory." + IDS_2056 "86Box could not find any usable ROM images.\n\nPlease download a ROM set and extract it into the ""roms"" directory." IDS_2057 "(empty)" IDS_2058 "ZIP images (*.IM?;*.ZDI)\0*.IM?;*.ZDI\0All files (*.*)\0*.*\0" IDS_2059 "Turbo" @@ -950,19 +951,19 @@ BEGIN IDS_2110 "Unable to initialize FreeType" IDS_2111 "Unable to initialize SDL, SDL2.dll is required" IDS_2112 "Are you sure you want to hard reset the emulated machine?" - IDS_2113 "Are you sure you want to exit " EMU_NAME "?" + IDS_2113 "Are you sure you want to exit 86Box?" IDS_2114 "Unable to initialize Ghostscript" IDS_2115 "MO %i (%03i): %ls" IDS_2116 "MO images (*.IM?)\0*.IM?\0All files (*.*)\0*.*\0" - IDS_2117 "Welcome to " EMU_NAME "!" + IDS_2117 "Welcome to 86Box!" IDS_2118 "Internal controller" IDS_2119 "Exit" IDS_2120 "No ROMs found" IDS_2121 "Save changes\nThis will hard reset the emulated machine." IDS_2122 "Discard changes\nAll changes made to the settings will be lost." IDS_2123 "Cancel\nGo back to the Settings window." - IDS_2124 "About " EMU_NAME - IDS_2125 EMU_NAME " v" EMU_VERSION + IDS_2124 "About 86Box" + IDS_2125 "86Box v2.10" IDS_2126 "An emulator of old computers\n\nAuthors: Sarah Walker, Miran Grca, Fred N. van Kempen (waltje), SA1988, MoochMcGee, reenigne, leilei, JohnElliott, greatpsycho, and others.\n\nReleased under the GNU General Public License version 2. See LICENSE for more information." IDS_2127 "OK" IDS_2128 "Hardware not available" @@ -1103,9 +1104,9 @@ BEGIN VALUE "FileDescription", EMU_NAME "\0" VALUE "FileVersion", EMU_VERSION "\0" VALUE "InternalName", EMU_NAME "\0" - VALUE "LegalCopyright", "Copyright © 2007-" COPYRIGHT_YEAR " " EMU_NAME " contributors\0" - VALUE "OriginalFilename", EMU_NAME ".exe\0" - VALUE "ProductName", EMU_NAME " Emulator\0" + VALUE "LegalCopyright", "Copyright © 2007-2020 " EMU_NAME " contributors\0" + VALUE "OriginalFilename", "86box.exe\0" + VALUE "ProductName", EMU_NAME "\0" VALUE "ProductVersion", EMU_VERSION "\0" END END diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 3d48ac37a..2334fa603 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -552,18 +552,19 @@ MAINOBJ := pc.o config.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \ usb.o device.o nvr.o nvr_at.o nvr_ps2.o \ $(VNCOBJ) -MEMOBJ := intel_flash.o mem.o rom.o spd.o sst_flash.o +MEMOBJ := catalyst_flash.o intel_flash.o mem.o rom.o spd.o sst_flash.o CPUOBJ := cpu.o cpu_table.o \ 808x.o 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o $(CGTOBJ) \ x86seg.o x87.o x87_timings.o \ $(DYNARECOBJ) -CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o \ +CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o i82335.o \ intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \ neat.o opti495.o opti5x7.o scamp.o scat.o \ sis_85c310.o sis_85c471.o sis_85c496.o \ - via_apollo.o via_vpx.o via_vt82c586b.o via_vt82c596b.o wd76c10.o + via_apollo.o via_vpx.o via_vt82c586b.o via_vt82c596b.o wd76c10.o vl82c480.o \ + amd640.o MCHOBJ := machine.o machine_table.o \ m_xt.o m_xt_compaq.o \ @@ -591,9 +592,10 @@ DEVOBJ := bugger.o hwm.o hwm_lm75.o hwm_lm78.o ibm_5161.o isamem.o isartc.o lpt SIOOBJ := sio_acc3221.o \ sio_f82c710.o \ - sio_fdc37c66x.o sio_fdc37c669.o \ + sio_fdc37c661.o sio_fdc37c66x.o sio_fdc37c669.o \ sio_fdc37c93x.o \ sio_pc87306.o sio_pc87307.o sio_pc87309.o sio_pc87332.o \ + sio_ps1_m2133.o \ sio_w83787f.o \ sio_w83877f.o sio_w83977f.o \ sio_um8669f.o @@ -689,7 +691,8 @@ VIDOBJ := video.o \ vid_av9194.o \ vid_icd2061.o vid_ics2595.o \ vid_cl54xx.o \ - vid_et4000.o vid_sc1502x_ramdac.o \ + vid_et4000.o vid_sc1148x_ramdac.o \ + vid_sc1502x_ramdac.o \ vid_et4000w32.o vid_stg_ramdac.o \ vid_ht216.o \ vid_oak_oti.o \ diff --git a/src/win/win.c b/src/win/win.c index c109c9b8b..6a2d685ea 100644 --- a/src/win/win.c +++ b/src/win/win.c @@ -47,6 +47,7 @@ #endif #include <86box/win_sdl.h> #include <86box/win.h> +#include <86box/version.h> typedef struct { diff --git a/src/win/win_about.c b/src/win/win_about.c index b09efa478..7ca81cd2c 100644 --- a/src/win/win_about.c +++ b/src/win/win_about.c @@ -30,6 +30,7 @@ #include <86box/86box.h> #include <86box/plat.h> #include <86box/win.h> +#include <86box/version.h> void diff --git a/src/win/win_sdl.c b/src/win/win_sdl.c index d80cbe222..b71595c58 100644 --- a/src/win/win_sdl.c +++ b/src/win/win_sdl.c @@ -70,6 +70,7 @@ #include <86box/ui.h> #include <86box/win.h> #include <86box/win_sdl.h> +#include <86box/version.h> #define RENDERER_FULL_SCREEN 1