Rewrote memory access handling to properly split execute from read, bus from CPU (but the mappings will still match until otherwise specified), and fixed exec[] usage by the mem_*_phys() functions.
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OBattler
@@ -22,66 +22,93 @@
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# define EMU_MEM_H
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#define MEM_MAPPING_EXTERNAL 1 /* on external bus (ISA/PCI) */
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#define MEM_MAPPING_INTERNAL 2 /* on internal bus (RAM) */
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#define MEM_MAPPING_ROM 4 /* Executing from ROM may involve
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* additional wait states. */
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#define MEM_MAPPING_ROMCS 8 /* respond to ROMCS* */
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#define MEM_MAPPING_SMRAM 16 /* on internal bus (RAM) but SMRAM */
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#define MEM_MAP_TO_SHADOW_RAM_MASK 1
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#define MEM_MAP_TO_RAM_ADDR_MASK 2
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/* _mem_state layout:
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Bits 0 - 7: Normal write
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Bits 8 -15: Normal read
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Bits 16 -23: SMM write
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Bits 24 -31: SMM read
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*/
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#define STATE_CPU 0
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#define STATE_BUS 2
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#define MEM_READ_DISABLED 0x0000
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#define MEM_READ_INTERNAL 0x0100
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#define MEM_READ_EXTERNAL 0x0200
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#define MEM_READ_ANY 0x0300
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#define MEM_READ_NORMAL 0x0400 /* SMM only - means use the non-SMM state */
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#define MEM_READ_EXTERNAL_EX 0x0500 /* External but with internal exec - needed by the VIA Apollo Pro */
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#define MEM_READ_ROMCS 0x0600 /* EXTERNAL type + ROMC flag */
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#define MEM_READ_EXTANY 0x0700 /* Any EXTERNAL type */
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#define MEM_READ_SMRAM 0x1000
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#define MEM_READ_SMRAM_EX 0x2000
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#define MEM_READ_DISABLED_EX 0x4000
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#define MEM_READ_MASK 0xff00
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#define ACCESS_CPU 1 /* Update CPU non-SMM access. */
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#define ACCESS_CPU_SMM 2 /* Update CPU SMM access. */
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#define ACCESS_BUS 4 /* Update bus access. */
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#define ACCESS_BUS_SMM 8 /* Update bus SMM access. */
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#define ACCESS_NORMAL 5 /* Update CPU and bus non-SMM accesses. */
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#define ACCESS_SMM 10 /* Update CPU and bus SMM accesses. */
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#define ACCESS_CPU_BOTH 3 /* Update CPU non-SMM and SMM accesses. */
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#define ACCESS_BUS_BOTH 12 /* Update bus non-SMM and SMM accesses. */
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#define ACCESS_ALL 15 /* Update all accesses. */
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#define MEM_WRITE_DISABLED 0x0000
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#define MEM_WRITE_INTERNAL 0x0001
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#define MEM_WRITE_EXTERNAL 0x0002
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#define MEM_WRITE_ANY 0x0003
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#define MEM_WRITE_NORMAL 0x0004 /* SMM only - means use the non-SMM state */
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#define MEM_WRITE_EXTERNAL_EX 0x0005
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#define MEM_WRITE_ROMCS 0x0006 /* EXTERNAL type + ROMC flag */
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#define MEM_WRITE_EXTANY 0x0007 /* Any EXTERNAL type */
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#define MEM_WRITE_SMRAM 0x0010
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#define MEM_WRITE_SMRAM_EX 0x0020
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#define MEM_WRITE_DISABLED_EX 0x0040
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#define MEM_WRITE_MASK 0x00ff
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#define ACCESS_INTERNAL 1
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#define ACCESS_ROMCS 2
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#define ACCESS_SMRAM 4
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#define ACCESS_CACHE 8
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#define ACCESS_DISABLED 16
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#define MEM_STATE_SMM_SHIFT 16
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#define ACCESS_X_INTERNAL 1
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#define ACCESS_X_ROMCS 2
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#define ACCESS_X_SMRAM 4
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#define ACCESS_X_CACHE 8
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#define ACCESS_X_DISABLED 16
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#define ACCESS_W_INTERNAL 32
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#define ACCESS_W_ROMCS 64
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#define ACCESS_W_SMRAM 128
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#define ACCESS_W_CACHE 256
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#define ACCESS_W_DISABLED 512
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#define ACCESS_R_INTERNAL 1024
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#define ACCESS_R_ROMCS 2048
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#define ACCESS_R_SMRAM 4096
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#define ACCESS_R_CACHE 8192
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#define ACCESS_R_DISABLED 16384
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/* #define's for memory granularity, currently 16k, but may
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change in the future - 4k works, less does not because of
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internal 4k pages. */
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#ifdef DEFAULT_GRANULARITY
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#define MEM_GRANULARITY_BITS 14
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#define MEM_GRANULARITY_SIZE (1 << MEM_GRANULARITY_BITS)
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#define MEM_GRANULARITY_HBOUND (MEM_GRANULARITY_SIZE - 2)
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#define MEM_GRANULARITY_QBOUND (MEM_GRANULARITY_SIZE - 4)
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#define MEM_GRANULARITY_MASK (MEM_GRANULARITY_SIZE - 1)
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#define MEM_GRANULARITY_HMASK ((1 << (MEM_GRANULARITY_BITS - 1)) - 1)
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#define MEM_GRANULARITY_QMASK ((1 << (MEM_GRANULARITY_BITS - 2)) - 1)
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#define MEM_GRANULARITY_PMASK ((1 << (MEM_GRANULARITY_BITS - 3)) - 1)
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#define MEM_MAPPINGS_NO ((0x100000 >> MEM_GRANULARITY_BITS) << 12)
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#define MEM_GRANULARITY_PAGE (MEM_GRANULARITY_MASK & ~0xfff)
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#else
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#define ACCESS_EXECUTE 0
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#define ACCESS_READ 1
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#define ACCESS_WRITE 2
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/* Conversion #define's - we need these to seamlessly convert the old mem_set_mem_state() calls to
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the new stuff in order to make this a drop in replacement.
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Read here includes execute access since the old code also used read access for execute access,
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with some exceptions. */
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#define MEM_READ_DISABLED (ACCESS_X_DISABLED | ACCESS_R_DISABLED)
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#define MEM_READ_INTERNAL (ACCESS_X_INTERNAL | ACCESS_R_INTERNAL)
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#define MEM_READ_EXTERNAL 0
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/* These two are going to be identical - on real hardware, chips that don't care about ROMCS#,
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are not magically disabled. */
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#define MEM_READ_ROMCS (ACCESS_X_ROMCS | ACCESS_R_ROMCS)
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#define MEM_READ_EXTANY MEM_READ_ROMCS
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/* Internal execute access, external read access. */
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#define MEM_READ_EXTERNAL_EX 0
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#define MEM_READ_SMRAM (ACCESS_X_SMRAM | ACCESS_R_SMRAM)
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#define MEM_READ_SMRAM_EX (ACCESS_X_SMRAM)
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/* Theese two are going to be identical. */
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#define MEM_READ_DISABLED_EX MEM_READ_DISABLED
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#define MEM_READ_MASK 0x7c1f
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#define MEM_WRITE_DISABLED (ACCESS_W_DISABLED)
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#define MEM_WRITE_INTERNAL (ACCESS_W_INTERNAL)
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#define MEM_WRITE_EXTERNAL 0
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/* These two are going to be identical - on real hardware, chips that don't care about ROMCS#,
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are not magically disabled. */
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#define MEM_WRITE_ROMCS (ACCESS_W_ROMCS)
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#define MEM_WRITE_EXTANY (ACCESS_W_ROMCS)
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#define MEM_WRITE_SMRAM (ACCESS_W_SMRAM)
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/* Theese two are going to be identical. */
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#define MEM_WRITE_DISABLED_EX MEM_READ_DISABLED
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#define MEM_WRITE_MASK 0x03e0
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#define MEM_MAPPING_EXTERNAL 1 /* On external bus (ISA/PCI). */
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#define MEM_MAPPING_INTERNAL 2 /* On internal bus (RAM). */
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#define MEM_MAPPING_ROM_WS 4 /* Executing from ROM may involve additional wait states. */
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#define MEM_MAPPING_IS_ROM 8 /* Responds to ROMCS#. */
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#define MEM_MAPPING_ROM (MEM_MAPPING_ROM_WS | MEM_MAPPING_IS_ROM)
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#define MEM_MAPPING_ROMCS 16 /* If it responds to ROMCS#, it requires ROMCS# asserted. */
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#define MEM_MAPPING_SMRAM 32 /* On internal bus (RAM) but SMRAM. */
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#define MEM_MAPPING_CACHE 64 /* Cache or MTRR - please avoid such mappings unless
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stricly necessary (eg. for CoreBoot). */
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/* #define's for memory granularity, currently 4k, less does
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not work because of internal 4k pages. */
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#define MEM_GRANULARITY_BITS 12
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#define MEM_GRANULARITY_SIZE (1 << MEM_GRANULARITY_BITS)
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#define MEM_GRANULARITY_HBOUND (MEM_GRANULARITY_SIZE - 2)
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@@ -92,16 +119,39 @@
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#define MEM_GRANULARITY_PMASK ((1 << (MEM_GRANULARITY_BITS - 3)) - 1)
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#define MEM_MAPPINGS_NO ((0x100000 >> MEM_GRANULARITY_BITS) << 12)
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#define MEM_GRANULARITY_PAGE (MEM_GRANULARITY_MASK & ~0xfff)
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#endif
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#define MEM_GRANULARITY_BASE (~MEM_GRANULARITY_MASK)
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#define mem_set_mem_state_common(smm, base, size, state) mem_set_state(!!smm, 0, base, size, state)
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#define mem_set_mem_state(base, size, state) mem_set_state(0, 0, base, size, state)
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#define mem_set_mem_state_smm(base, size, state) mem_set_state(1, 0, base, size, state)
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#define mem_set_mem_state_both(base, size, state) mem_set_state(2, 0, base, size, state)
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#define mem_set_mem_state_smram(smm, base, size, is_smram) mem_set_state(!!smm, 1, base, size, is_smram)
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#define mem_set_mem_state_smram_ex(smm, base, size, is_smram) mem_set_state(!!smm, 2, base, size, is_smram)
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/* Compatibility #defines. */
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#define mem_set_state(smm, mode, base, size, access) \
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mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), mode, base, size, access)
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#define mem_set_mem_state_common(smm, base, size, access) \
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mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 0, base, size, access)
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#define mem_set_mem_state(base, size, access) \
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mem_set_access(ACCESS_NORMAL, 0, base, size, access)
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#define mem_set_mem_state_smm(base, size, access) \
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mem_set_access(ACCESS_SMM, 0, base, size, access)
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#define mem_set_mem_state_both(base, size, access) \
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mem_set_access(ACCESS_ALL, 0, base, size, access)
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#define mem_set_mem_state_smram(smm, base, size, is_smram) \
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mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 1, base, size, is_smram)
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#define mem_set_mem_state_smram_ex(smm, base, size, is_smram) \
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mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 2, base, size, is_smram)
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#define flushmmucache_cr3 \
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flushmmucache_nopc
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typedef struct {
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uint16_t x :5,
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w :5,
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r :5,
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pad :1;
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} state_t;
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typedef union {
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uint16_t vals[4];
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state_t states[4];
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} mem_state_t;
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typedef struct _mem_mapping_ {
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struct _mem_mapping_ *prev, *next;
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@@ -121,9 +171,9 @@ typedef struct _mem_mapping_ {
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uint32_t flags;
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void *p; /* backpointer to mapping or device */
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void *dev; /* backpointer to memory device */
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/* There is never a needed to pass a pointer to the mapping itself, it is much preferable to
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prepare a structure with the requires data (usually, the base address and mask) instead. */
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void *p; /* backpointer to device */
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} mem_mapping_t;
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#ifdef USE_NEW_DYNAREC
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@@ -260,8 +310,18 @@ extern uint32_t mmutranslatereal32(uint32_t addr, int rw);
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extern void addreadlookup(uint32_t virt, uint32_t phys);
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extern void addwritelookup(uint32_t virt, uint32_t phys);
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extern void mem_mapping_del(mem_mapping_t *);
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extern void mem_mapping_set(mem_mapping_t *,
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uint32_t base,
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uint32_t size,
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uint8_t (*read_b)(uint32_t addr, void *p),
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uint16_t (*read_w)(uint32_t addr, void *p),
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uint32_t (*read_l)(uint32_t addr, void *p),
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void (*write_b)(uint32_t addr, uint8_t val, void *p),
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void (*write_w)(uint32_t addr, uint16_t val, void *p),
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void (*write_l)(uint32_t addr, uint32_t val, void *p),
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uint8_t *exec,
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uint32_t flags,
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void *p);
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extern void mem_mapping_add(mem_mapping_t *,
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uint32_t base,
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uint32_t size,
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@@ -285,8 +345,6 @@ extern void mem_mapping_set_handler(mem_mapping_t *,
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extern void mem_mapping_set_p(mem_mapping_t *, void *p);
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extern void mem_mapping_set_dev(mem_mapping_t *, void *dev);
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extern void mem_mapping_set_addr(mem_mapping_t *,
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uint32_t base, uint32_t size);
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extern void mem_mapping_set_exec(mem_mapping_t *, uint8_t *exec);
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@@ -294,7 +352,7 @@ extern void mem_mapping_disable(mem_mapping_t *);
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extern void mem_mapping_enable(mem_mapping_t *);
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extern void mem_mapping_recalc(uint64_t base, uint64_t size);
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extern void mem_set_state(int smm, int mode, uint32_t base, uint32_t size, uint32_t state);
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extern void mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t access);
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extern uint8_t mem_readb_phys(uint32_t addr);
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extern uint16_t mem_readw_phys(uint32_t addr);
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@@ -333,7 +391,6 @@ extern void mem_flush_write_page(uint32_t addr, uint32_t virt);
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extern void mem_reset_page_blocks(void);
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extern void flushmmucache(void);
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extern void flushmmucache_cr3(void);
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extern void flushmmucache_nopc(void);
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extern void mmu_invalidate(uint32_t addr);
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@@ -67,6 +67,9 @@ extern int bios_load_linear_combined(char *fn1, char *fn2,
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extern int bios_load_linear_combined2(char *fn1, char *fn2,
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char *fn3, char *fn4, char *fn5,
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int sz, int off);
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extern int bios_load_linear_combined2_ex(char *fn1, char *fn2,
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char *fn3, char *fn4, char *fn5,
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int sz, int off);
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extern int rom_init(rom_t *rom, char *fn, uint32_t address, int size,
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int mask, int file_offset, uint32_t flags);
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