Added the Xi8088.
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@@ -8,7 +8,7 @@
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*
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* CPU type handler.
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*
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* Version: @(#)cpu.c 1.0.11 2018/02/18
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* Version: @(#)cpu.c 1.0.12 2018/03/02
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* leilei,
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@@ -97,6 +97,7 @@ enum
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};
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CPU *cpu_s;
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int cpu_effective;
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int cpu_multi;
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int cpu_iscyrix;
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int cpu_16bitbus;
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@@ -181,9 +182,21 @@ int timing_misaligned;
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msr_t msr;
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void cpu_dynamic_switch(int new_cpu)
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{
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if (cpu_effective == new_cpu)
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return;
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int c = cpu;
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cpu = new_cpu;
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cpu_set();
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speedchanged();
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cpu = c;
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}
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void cpu_set_edx()
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{
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EDX = machines[machine].cpu[cpu_manufacturer].cpus[cpu].edx_reset;
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EDX = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].edx_reset;
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}
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@@ -198,7 +211,8 @@ void cpu_set()
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cpu = 0;
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}
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cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu];
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cpu_effective = cpu;
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cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective];
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CPUID = cpu_s->cpuid_model;
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cpuspeed = cpu_s->speed;
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@@ -1277,7 +1291,7 @@ cpu_current_pc(char *bufp)
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void cpu_CPUID()
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{
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type)
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{
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case CPU_i486DX:
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if (!EAX)
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@@ -1708,7 +1722,7 @@ void cpu_CPUID()
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void cpu_RDMSR()
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{
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type)
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{
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case CPU_WINCHIP:
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EAX = EDX = 0;
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@@ -1936,7 +1950,7 @@ i686_invalid_rdmsr:
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void cpu_WRMSR()
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{
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type)
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{
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case CPU_WINCHIP:
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switch (ECX)
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@@ -1959,7 +1973,7 @@ void cpu_WRMSR()
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if (EAX & (1 << 29))
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CPUID = 0;
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else
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CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpuid_model;
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CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpuid_model;
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break;
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case 0x108:
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msr.fcr2 = EAX | ((uint64_t)EDX << 32);
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@@ -2027,7 +2041,7 @@ void cpu_WRMSR()
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tsc = EAX | ((uint64_t)EDX << 32);
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break;
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case 0x17:
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type != CPU_PENTIUM2D) goto i686_invalid_wrmsr;
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type != CPU_PENTIUM2D) goto i686_invalid_wrmsr;
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ecx17_msr = EAX | ((uint64_t)EDX << 32);
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break;
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case 0x1B:
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@@ -2055,15 +2069,15 @@ void cpu_WRMSR()
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ecx11e_msr = EAX | ((uint64_t)EDX << 32);
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break;
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case 0x174:
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
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cs_msr = EAX & 0xFFFF;
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break;
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case 0x175:
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
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esp_msr = EAX;
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break;
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case 0x176:
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUMPRO) goto i686_invalid_wrmsr;
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eip_msr = EAX;
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break;
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case 0x186:
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@@ -2141,10 +2155,10 @@ void cyrix_write(uint16_t addr, uint8_t val, void *priv)
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if ((ccr3 & 0xf0) == 0x10)
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{
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ccr4 = val;
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type >= CPU_Cx6x86)
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if (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type >= CPU_Cx6x86)
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{
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if (val & 0x80)
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CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpuid_model;
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CPUID = machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpuid_model;
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else
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CPUID = 0;
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}
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@@ -2174,11 +2188,11 @@ uint8_t cyrix_read(uint16_t addr, void *priv)
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case 0xe8: return ((ccr3 & 0xf0) == 0x10) ? ccr4 : 0xff;
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case 0xe9: return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff;
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case 0xea: return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff;
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case 0xfe: return machines[machine].cpu[cpu_manufacturer].cpus[cpu].cyrix_id & 0xff;
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case 0xff: return machines[machine].cpu[cpu_manufacturer].cpus[cpu].cyrix_id >> 8;
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case 0xfe: return machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cyrix_id & 0xff;
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case 0xff: return machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cyrix_id >> 8;
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}
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if ((cyrix_addr & 0xf0) == 0xc0) return 0xff;
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if (cyrix_addr == 0x20 && machines[machine].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_Cx5x86) return 0xff;
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if (cyrix_addr == 0x20 && machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_Cx5x86) return 0xff;
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}
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return 0xff;
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}
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@@ -2201,7 +2215,7 @@ void x86_setopcodes(OpFn *opcodes, OpFn *opcodes_0f)
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void cpu_update_waitstates()
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{
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cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu];
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cpu_s = &machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective];
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cpu_prefetch_width = cpu_16bitbus ? 2 : 4;
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