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The "Acer M3a" I/O registers are in fact SMC FDC37C932FR General Purpose I/O registers, and are now implemented as such.

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This commit is contained in:
OBattler
2017-07-20 14:35:44 +02:00
parent 753937741e
commit 9aa45f9e25
4 changed files with 6 additions and 46 deletions
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2
src/Makefile.mingw
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@@ -159,7 +159,7 @@ SYSOBJ = model.o \
scat.o \
sis496.o \
wd76c10.o \
acer386sx.o acerm3a.o amstrad.o \
acer386sx.o amstrad.o \
compaq.o laserxt.o jim.o \
olivetti_m24.o ps1.o ps2.o ps2_mca.o \
tandy_eeprom.o tandy_rom.o

38
src/acerm3a.c
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@@ -1,38 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "device.h"
#include "model.h"
static int acerm3a_index;
static void acerm3a_write(uint16_t port, uint8_t val, void *p)
{
if (port == 0xea)
acerm3a_index = val;
}
static uint8_t acerm3a_read(uint16_t port, void *p)
{
if (port == 0xeb)
{
switch (acerm3a_index)
{
case 2:
return 0xfd;
}
}
return 0xff;
}
void acerm3a_io_init(void)
{
io_sethandler(0x00ea, 0x0002, acerm3a_read, NULL, NULL, acerm3a_write, NULL, NULL, NULL);
}

5
src/fdc37c932fr.c
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@@ -488,6 +488,9 @@ void fdc37c932fr_reset(void)
fdc_update_drvrate(3, 0);
fdc_update_max_track(79);
memset(fdc37c932fr_gpio_regs, 0, sizeof(fdc37c932fr_gpio_regs));
fdc37c932fr_gpio_regs[2] = 0xfd;
fdc37c932fr_locked = 0;
}
@@ -498,6 +501,8 @@ void fdc37c932fr_init()
fdc37c932fr_reset();
io_sethandler(0xe0, 0x0006, fdc37c932fr_gpio_read, NULL, NULL, fdc37c932fr_gpio_write, NULL, NULL, NULL);
io_sethandler(0xe2, 0x0006, fdc37c932fr_gpio_read, NULL, NULL, fdc37c932fr_gpio_write, NULL, NULL, NULL);
io_sethandler(0xe4, 0x0006, fdc37c932fr_gpio_read, NULL, NULL, fdc37c932fr_gpio_write, NULL, NULL, NULL);
io_sethandler(0xea, 0x0002, fdc37c932fr_gpio_read, NULL, NULL, fdc37c932fr_gpio_write, NULL, NULL, NULL);
io_sethandler(0x3f0, 0x0002, fdc37c932fr_read, NULL, NULL, fdc37c932fr_write, NULL, NULL, NULL);

7
src/model.c
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@@ -779,7 +779,6 @@ void at_ap53_init(void)
i430hx_init();
piix_init(7, 0x11, 0x12, 0x13, 0x14);
fdc37c669_init();
acerm3a_io_init();
device_add(&intel_flash_bxt_device);
}
@@ -796,14 +795,12 @@ void at_p55t2s_init(void)
i430hx_init();
piix_init(7, 0x12, 0x11, 0x14, 0x13);
pc87306_init();
acerm3a_io_init();
device_add(&intel_flash_bxt_device);
}
void at_acerm3a_init(void)
{
at_ide_init();
memregs_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(0xc);
@@ -813,14 +810,12 @@ void at_acerm3a_init(void)
i430hx_init();
piix3_init(7, 0xc, 0xd, 0xe, 0xf);
fdc37c932fr_init();
acerm3a_io_init();
device_add(&intel_flash_bxb_device);
}
void at_acerv35n_init(void)
{
at_ide_init();
memregs_init();
powermate_memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(0x11);
@@ -830,7 +825,6 @@ void at_acerv35n_init(void)
i430hx_init();
piix3_init(7, 0x11, 0x12, 0x13, 0x14);
fdc37c932fr_init();
acerm3a_io_init();
device_add(&intel_flash_bxb_device);
}
@@ -884,7 +878,6 @@ void at_p55tvp4_init(void)
void at_p55va_init(void)
{
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(8);
pci_slot(9);