A slight reorganization of the source tree and fixed a warning in disk/mo.c.
This commit is contained in:
300
src/sio/sio_fdc37c669.c
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300
src/sio/sio_fdc37c669.c
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the SMC FDC37C669 Super I/O Chip.
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*
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*
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2016-2018 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/device.h>
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#include <86box/pci.h>
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#include <86box/lpt.h>
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#include <86box/serial.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/sio.h>
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typedef struct {
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uint8_t tries,
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regs[42];
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int locked, rw_locked,
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cur_reg;
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fdc_t *fdc;
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serial_t *uart[2];
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} fdc37c669_t;
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static uint16_t
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make_port(fdc37c669_t *dev, uint8_t reg)
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{
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uint16_t p = 0;
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uint16_t mask = 0;
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switch(reg) {
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case 0x20:
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case 0x21:
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case 0x22:
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mask = 0xfc;
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break;
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case 0x23:
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mask = 0xff;
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break;
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case 0x24:
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case 0x25:
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mask = 0xfe;
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break;
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}
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p = ((uint16_t) (dev->regs[reg] & mask)) << 2;
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if (reg == 0x22)
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p |= 6;
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return p;
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}
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static void
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fdc37c669_write(uint16_t port, uint8_t val, void *priv)
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{
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fdc37c669_t *dev = (fdc37c669_t *) priv;
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uint8_t index = (port & 1) ? 0 : 1;
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uint8_t valxor = 0;
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uint8_t max = 42;
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if (index) {
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if ((val == 0x55) && !dev->locked) {
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if (dev->tries) {
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dev->locked = 1;
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dev->tries = 0;
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} else
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dev->tries++;
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} else {
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if (dev->locked) {
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if (val < max)
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dev->cur_reg = val;
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if (val == 0xaa)
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dev->locked = 0;
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} else {
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if (dev->tries)
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dev->tries = 0;
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}
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}
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return;
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} else {
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if (dev->locked) {
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if ((dev->cur_reg < 0x18) && (dev->rw_locked))
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return;
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if ((dev->cur_reg >= 0x26) && (dev->cur_reg <= 0x27))
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return;
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if (dev->cur_reg == 0x29)
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return;
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valxor = val ^ dev->regs[dev->cur_reg];
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dev->regs[dev->cur_reg] = val;
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} else
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return;
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}
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switch(dev->cur_reg) {
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case 0:
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if (valxor & 8) {
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fdc_remove(dev->fdc);
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if ((dev->regs[0] & 8) && (dev->regs[0x20] & 0xc0))
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fdc_set_base(dev->fdc, make_port(dev, 0x20));
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}
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break;
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case 1:
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if (valxor & 4) {
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lpt1_remove();
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if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40))
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lpt1_init(make_port(dev, 0x23));
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}
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if (valxor & 7)
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dev->rw_locked = (val & 8) ? 0 : 1;
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break;
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case 2:
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if (valxor & 8) {
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serial_remove(dev->uart[0]);
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if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40))
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serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4);
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}
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if (valxor & 0x80) {
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serial_remove(dev->uart[1]);
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if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40))
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serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f);
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}
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break;
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case 3:
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if (valxor & 2)
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fdc_update_enh_mode(dev->fdc, (val & 2) ? 1 : 0);
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break;
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case 5:
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if (valxor & 0x18)
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fdc_update_densel_force(dev->fdc, (val & 0x18) >> 3);
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if (valxor & 0x20)
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fdc_set_swap(dev->fdc, (val & 0x20) >> 5);
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break;
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case 0xB:
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if (valxor & 3)
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fdc_update_rwc(dev->fdc, 0, val & 3);
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if (valxor & 0xC)
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fdc_update_rwc(dev->fdc, 1, (val & 0xC) >> 2);
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break;
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case 0x20:
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if (valxor & 0xfc) {
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fdc_remove(dev->fdc);
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if ((dev->regs[0] & 8) && (dev->regs[0x20] & 0xc0))
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fdc_set_base(dev->fdc, make_port(dev, 0x20));
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}
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break;
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case 0x23:
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if (valxor) {
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lpt1_remove();
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if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40))
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lpt1_init(make_port(dev, 0x23));
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}
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break;
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case 0x24:
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if (valxor & 0xfe) {
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serial_remove(dev->uart[0]);
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if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40))
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serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4);
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}
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break;
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case 0x25:
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if (valxor & 0xfe) {
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serial_remove(dev->uart[1]);
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if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40))
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serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f);
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}
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break;
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case 0x27:
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if (valxor & 0xf)
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lpt1_irq(val & 0xf);
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break;
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case 0x28:
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if (valxor & 0xf) {
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serial_remove(dev->uart[1]);
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if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40))
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serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f);
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}
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if (valxor & 0xf0) {
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serial_remove(dev->uart[0]);
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if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40))
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serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4);
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}
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break;
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}
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}
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static uint8_t
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fdc37c669_read(uint16_t port, void *priv)
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{
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fdc37c669_t *dev = (fdc37c669_t *) priv;
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uint8_t index = (port & 1) ? 0 : 1;
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uint8_t ret = 0xff;
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if (dev->locked) {
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if (index)
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ret = dev->cur_reg;
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else if ((dev->cur_reg >= 0x18) || !dev->rw_locked)
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ret = dev->regs[dev->cur_reg];
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}
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return ret;
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}
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static void
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fdc37c669_reset(fdc37c669_t *dev)
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{
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fdc_reset(dev->fdc);
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serial_remove(dev->uart[0]);
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serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
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serial_remove(dev->uart[1]);
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serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
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lpt1_remove();
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lpt1_init(0x378);
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memset(dev->regs, 0, 42);
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dev->regs[0x00] = 0x28;
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dev->regs[0x01] = 0x9c;
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dev->regs[0x02] = 0x88;
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dev->regs[0x03] = 0x78;
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dev->regs[0x06] = 0xff;
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dev->regs[0x0d] = 0x03;
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dev->regs[0x0e] = 0x02;
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dev->regs[0x1e] = 0x80; /* Gameport controller. */
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dev->regs[0x20] = (0x3f0 >> 2) & 0xfc;
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dev->regs[0x21] = (0x1f0 >> 2) & 0xfc;
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dev->regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1;
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dev->regs[0x23] = (0x378 >> 2);
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dev->regs[0x24] = (0x3f8 >> 2) & 0xfe;
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dev->regs[0x25] = (0x2f8 >> 2) & 0xfe;
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dev->regs[0x26] = (2 << 4) | 3;
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dev->regs[0x27] = (6 << 4) | 7;
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dev->regs[0x28] = (4 << 4) | 3;
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dev->locked = 0;
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dev->rw_locked = 0;
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}
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static void
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fdc37c669_close(void *priv)
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{
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fdc37c669_t *dev = (fdc37c669_t *) priv;
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free(dev);
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}
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static void *
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fdc37c669_init(const device_t *info)
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{
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fdc37c669_t *dev = (fdc37c669_t *) malloc(sizeof(fdc37c669_t));
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memset(dev, 0, sizeof(fdc37c669_t));
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dev->fdc = device_add(&fdc_at_smc_device);
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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io_sethandler(0x3f0, 0x0002,
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fdc37c669_read, NULL, NULL, fdc37c669_write, NULL, NULL, dev);
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fdc37c669_reset(dev);
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return dev;
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}
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const device_t fdc37c669_device = {
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"SMC FDC37C669 Super I/O",
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0,
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0,
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fdc37c669_init, fdc37c669_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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