clang format in codegen & codegen_new
This commit is contained in:
@@ -13,84 +13,81 @@
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#include "codegen_ops_mmx_shift.h"
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#include "codegen_ops_helpers.h"
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uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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uint32_t
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ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs+op_pc, 1);
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switch (op)
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{
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case 0x10: /*PSRLW*/
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uop_PSRLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAW*/
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uop_PSRAW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLW*/
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uop_PSLLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs + op_pc, 1);
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switch (op) {
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case 0x10: /*PSRLW*/
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uop_PSRLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAW*/
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uop_PSRAW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLW*/
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uop_PSLLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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}
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}
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codegen_mark_code_present(block, cs+op_pc+1, 1);
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return op_pc + 2;
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codegen_mark_code_present(block, cs + op_pc + 1, 1);
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return op_pc + 2;
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}
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uint32_t ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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uint32_t
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ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs+op_pc, 1);
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switch (op)
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{
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case 0x10: /*PSRLD*/
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uop_PSRLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAD*/
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uop_PSRAD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLD*/
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uop_PSLLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs + op_pc, 1);
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switch (op) {
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case 0x10: /*PSRLD*/
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uop_PSRLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAD*/
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uop_PSRAD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLD*/
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uop_PSLLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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}
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}
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codegen_mark_code_present(block, cs+op_pc+1, 1);
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return op_pc + 2;
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codegen_mark_code_present(block, cs + op_pc + 1, 1);
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return op_pc + 2;
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}
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uint32_t ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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uint32_t
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ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = fastreadb(cs + op_pc + 1);
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs+op_pc, 1);
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switch (op)
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{
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case 0x10: /*PSRLQ*/
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uop_PSRLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAQ*/
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uop_PSRAQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLQ*/
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uop_PSLLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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uop_MMX_ENTER(ir);
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codegen_mark_code_present(block, cs + op_pc, 1);
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switch (op) {
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case 0x10: /*PSRLQ*/
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uop_PSRLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x20: /*PSRAQ*/
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uop_PSRAQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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case 0x30: /*PSLLQ*/
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uop_PSLLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
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break;
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default:
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return 0;
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}
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}
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codegen_mark_code_present(block, cs+op_pc+1, 1);
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return op_pc + 2;
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codegen_mark_code_present(block, cs + op_pc + 1, 1);
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return op_pc + 2;
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}
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