Rewritten the PIIX IDE Bus Master operation, ReactOS now boots using IDE DMA and ATAPI DMA;
Fixed the IDE device detection hang with > 8 GB hard disks; Rewritten the SMC FDC37C932FR Super I/O chip emulation; Added an early implementation of the PIIX4, currently not in the makefile because nothing uses it right now.
This commit is contained in:
OBattler
@@ -9,7 +9,7 @@
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* Implementation of the IDE emulation for hard disks and ATAPI
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* CD-ROM devices.
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*
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* Version: @(#)hdc_ide.c 1.0.13 2017/10/16
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* Version: @(#)hdc_ide.c 1.0.15 2017/10/26
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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@@ -24,6 +24,7 @@
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#include <stdint.h>
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#include <string.h>
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#include <stdarg.h>
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#include <inttypes.h>
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#include <wchar.h>
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#include "../86box.h"
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#include "../ibm.h"
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@@ -103,8 +104,7 @@ int cur_ide[5];
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#ifdef ENABLE_IDE_LOG
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// int ide_do_log = ENABLE_IDE_LOG;
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int ide_do_log = 0;
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int ide_do_log = ENABLE_IDE_LOG;
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#endif
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static void ide_log(const char *format, ...)
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@@ -214,63 +214,6 @@ void ide_irq_lower(IDE *ide)
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ide->irqstat=0;
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}
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void ide_irq_update(IDE *ide)
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{
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int pending = 0;
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int mask = 0;
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if (ide->board > 3)
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{
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return;
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}
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ide_log("Updating IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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mask = ide_irq[ide->board];
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mask &= 7;
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pending = (pic2.pend | pic2.ins);
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pending &= (1 << mask);
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if (ide->irqstat && !pending && !(ide->fdisk & 2))
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{
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if (pci_use_mirq(0) && (ide->board == 1))
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{
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pci_set_mirq(0);
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}
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else
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{
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picint(1 << ide_irq[ide->board]);
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}
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if (ide->board < 2)
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{
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if (ide_bus_master_set_irq)
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{
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ide_bus_master_set_irq(ide->board | 0x40);
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}
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}
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}
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else if (pending)
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{
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if (pci_use_mirq(0) && (ide->board == 1))
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{
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pci_clear_mirq(0);
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}
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else
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{
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picintc(1 << ide_irq[ide->board]);
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}
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if (ide->board < 2)
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{
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if (ide_bus_master_set_irq)
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{
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ide_bus_master_set_irq(ide->board);
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}
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}
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}
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}
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/**
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* Copy a string into a buffer, padding with spaces, and placing characters as
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* if they were packed into 16-bit values, stored little-endian.
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@@ -357,26 +300,13 @@ static void ide_identify(IDE *ide)
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ide->buffer[1] = d_tracks; /* Tracks in default CHS translation. */
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ide->buffer[3] = d_hpc; /* Heads in default CHS translation. */
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ide->buffer[6] = d_spt; /* Heads in default CHS translation. */
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} else {
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ide->buffer[1] = 16383; /* Tracks in default CHS translation. */
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ide->buffer[3] = 16; /* Heads in default CHS translation. */
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ide->buffer[6] = 63; /* Heads in default CHS translation. */
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}
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ide_log("Default CHS translation: %i, %i, %i\n", ide->buffer[1], ide->buffer[3], ide->buffer[6]);
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#if 0
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c = d_tracks; /* Cylinders */
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h = d_hpc; /* Heads */
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s = hdd[ide->hdd_num].spt; /* Sectors */
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if (hdd[ide->hdd_num].tracks <= 16383)
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{
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ide->buffer[1] = hdd[ide->hdd_num].tracks; /* Cylinders */
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}
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else
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{
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ide->buffer[1] = 16383; /* Cylinders */
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}
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ide->buffer[3] = hdd[ide->hdd_num].hpc; /* Heads */
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ide->buffer[6] = hdd[ide->hdd_num].spt; /* Sectors */
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#endif
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ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
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ide_padstr((char *) (ide->buffer + 23), EMU_VERSION, 8); /* Firmware */
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ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */
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@@ -393,6 +323,7 @@ static void ide_identify(IDE *ide)
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if ((ide->tracks >= 1024) || (ide->hpc > 16) || (ide->spt > 63))
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{
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ide->buffer[49] |= (1 << 9);
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ide_log("LBA supported\n");
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}
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ide->buffer[50] = 0x4000; /* Capabilities */
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ide->buffer[51] = 2 << 8; /*PIO timing mode*/
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@@ -401,26 +332,32 @@ static void ide_identify(IDE *ide)
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{
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ide->buffer[60] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */
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ide->buffer[61] = (full_size >> 16) & 0x0FFF;
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ide_log("Full size: %" PRIu64 "\n", full_size);
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ide->buffer[53] |= 1;
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if (full_size <= 16514064) {
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if (ide->specify_success) {
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ide->buffer[54] = (full_size / ide->t_hpc) / ide->t_spt;
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ide->buffer[55] = ide->t_hpc;
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ide->buffer[56] = ide->t_spt;
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full_size = ((uint64_t) ide->t_hpc) * ((uint64_t) ide->t_spt) * ((uint64_t) ide->buffer[54]);
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} else {
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if (ide->specify_success) {
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ide->buffer[54] = (full_size / ide->t_hpc) / ide->t_spt;
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ide->buffer[55] = ide->t_hpc;
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ide->buffer[56] = ide->t_spt;
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} else {
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if (full_size <= 16514064) {
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ide->buffer[54] = d_tracks;
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ide->buffer[55] = d_hpc;
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ide->buffer[56] = d_spt;
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} else {
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ide->buffer[54] = 16383;
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ide->buffer[55] = 16;
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ide->buffer[56] = 63;
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}
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ide->buffer[57] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */
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ide->buffer[58] = (full_size >> 16) & 0x0FFF;
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ide_log("Current CHS translation: %i, %i, %i\n", ide->buffer[54], ide->buffer[55], ide->buffer[56]);
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}
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full_size = ((uint64_t) ide->buffer[54]) * ((uint64_t) ide->buffer[55]) * ((uint64_t) ide->buffer[56]);
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ide->buffer[57] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */
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ide->buffer[58] = (full_size >> 16) & 0x0FFF;
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ide_log("Current CHS translation: %i, %i, %i\n", ide->buffer[54], ide->buffer[55], ide->buffer[56]);
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}
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ide->buffer[59] = ide->blocksize ? (ide->blocksize | 0x100) : 0;
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@@ -437,9 +374,9 @@ static void ide_identify(IDE *ide)
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{
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d = (ide->mdma_mode & 0xff);
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d <<= 8;
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if ((ide->mdma_mode & 0x100) == 0x200)
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if ((ide->mdma_mode & 0x300) == 0x200)
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ide->buffer[88] |= d;
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else if ((ide->mdma_mode & 0x100) == 0x100)
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else if ((ide->mdma_mode & 0x300) == 0x100)
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ide->buffer[63] |= d;
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else
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ide->buffer[62] |= d;
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@@ -490,9 +427,9 @@ static void ide_atapi_identify(IDE *ide)
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{
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d = (ide->mdma_mode & 0xff);
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d <<= 8;
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if ((ide->mdma_mode & 0x100) == 0x200)
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if ((ide->mdma_mode & 0x300) == 0x200)
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ide->buffer[88] |= d;
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else if ((ide->mdma_mode & 0x100) == 0x100)
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else if ((ide->mdma_mode & 0x300) == 0x100)
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ide->buffer[63] |= d;
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else
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ide->buffer[62] |= d;
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@@ -810,6 +747,15 @@ void ide_reset_hard(void)
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int idetimes = 0;
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void ide_set_callback(uint8_t channel, int64_t callback)
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{
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IDE *ide = &ide_drives[channel];
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if (callback)
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idecallback[ide->board] += callback;
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else
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idecallback[ide->board] = 0LL;
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}
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void ide_write_data(int ide_board, uint32_t val, int length)
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{
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IDE *ide = &ide_drives[cur_ide[ide_board]];
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@@ -828,11 +774,6 @@ void ide_write_data(int ide_board, uint32_t val, int length)
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}
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cdrom_write(cur_ide[ide_board], val, length);
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if (cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback)
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{
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idecallback[ide_board] = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback;
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}
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return;
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}
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else
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@@ -1026,7 +967,6 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
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ide->lba_addr = (ide->lba_addr & 0x0FFFFFF) | ((val & 0xF) << 24);
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ide_other->lba_addr = (ide_other->lba_addr & 0x0FFFFFF)|((val & 0xF) << 24);
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ide_irq_update(ide);
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return;
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case 0x1F7: /* Command register */
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@@ -1341,7 +1281,6 @@ ide_bad_command:
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ide->atastat = ide_other->atastat = BUSY_STAT;
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}
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ide->fdisk = ide_other->fdisk = val;
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ide_irq_update(ide);
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return;
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}
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}
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@@ -1364,10 +1303,6 @@ uint32_t ide_read_data(int ide_board, int length)
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return 0;
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}
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temp = cdrom_read(cur_ide[ide_board], length);
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if (cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback)
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{
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idecallback[ide_board] = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback;
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}
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}
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else
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{
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@@ -1616,11 +1551,6 @@ void callbackide(int ide_board)
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}
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ext_ide = ide;
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if (ide_drive_is_cdrom(ide))
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{
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cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback = 0LL;
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}
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if (ide->command==0x30) times30++;
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/*if (ide_board) */ide_log("CALLBACK %02X %i %i %i\n",ide->command,times30,ide->reset,cur_ide[ide_board]);
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@@ -2143,7 +2073,6 @@ void callbackide(int ide_board)
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}
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cdrom_phase_callback(atapi_cdrom_drives[cur_ide[ide_board]]);
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idecallback[ide_board] = cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].callback;
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ide_log("IDE callback now: %i\n", idecallback[ide_board]);
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return;
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