claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions 3 Packages Projects Releases Wiki Activity

Implement TSS debug trap bit

Browse Source
This commit is contained in:
Cacodemon345
2024-01-14 04:04:04 +06:00
parent b1c292a9e9
commit a13a8efb39
3 changed files with 23 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
src/cpu/386_dynarec.c
View File

@@ -268,6 +268,12 @@ exec386_dynarec_int(void)
cpu_block_end = 0;
x86_was_reset = 0;
if (trap == 2) {
/* Handle the T bit in the new TSS first. */
CPU_BLOCK_END();
goto block_ended;
}
while (!cpu_block_end) {
# ifndef USE_NEW_DYNAREC
oldcs = CS;
@@ -321,13 +327,14 @@ exec386_dynarec_int(void)
CPU_BLOCK_END();
}
block_ended:
if (!cpu_state.abrt && trap) {
dr[6] |= (trap == 2) ? 0x8000 : 0x4000;
trap = 0;
# ifndef USE_NEW_DYNAREC
oldcs = CS;
# endif
cpu_state.oldpc = cpu_state.pc;
dr[6] |= 0x4000;
x86_int(1);
}
@@ -542,7 +549,7 @@ exec386_dynarec_dyn(void)
# endif
CPU_BLOCK_END();
if (cpu_state.flags & T_FLAG)
if ((cpu_state.flags & T_FLAG) || (trap == 2))
CPU_BLOCK_END();
if (smi_line)
CPU_BLOCK_END();