diff --git a/src/cpu/808x.c b/src/cpu/808x.c
index 827ec5b1c..f1f669a58 100644
--- a/src/cpu/808x.c
+++ b/src/cpu/808x.c
@@ -2679,7 +2679,8 @@ execx86(int cycs)
 						AL = (uint8_t) cpu_data;
 						AH = (uint8_t) cpu_dest;
 						set_co_mul(bits, AH != ((AL & 0x80) == 0 || (rmdat & 0x38) == 0x20 ? 0 : 0xff));
-						cpu_data = AH;
+						if (! is_nec)
+							cpu_data = AH;
 					}
 					/* NOTE: When implementing the V20, care should be taken to not change
 						 the zero flag. */
diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c
index 09d26cf25..c956bee03 100644
--- a/src/cpu/cpu.c
+++ b/src/cpu/cpu.c
@@ -13,10 +13,10 @@
  *		Miran Grca, <mgrca8@gmail.com>
  *		Fred N. van Kempen, <decwiz@yahoo.com>
  *
- *		Copyright 2008-2018 Sarah Walker.
+ *		Copyright 2008-2020 Sarah Walker.
  *		Copyright 2016-2018 leilei.
- *		Copyright 2016-2018 Miran Grca.
- *		Copyright 2018 Fred N. van Kempen.
+ *		Copyright 2016-2020 Miran Grca.
+ *		Copyright 2018-2021 Fred N. van Kempen.
  */
 #include <math.h>
 #include <stdarg.h>
@@ -58,13 +58,13 @@ enum {
         CPUID_PAE = (1 << 6),
         CPUID_MCE = (1 << 7),
         CPUID_CMPXCHG8B = (1 << 8),
-	CPUID_AMDSEP = (1 << 10),
-	CPUID_SEP = (1 << 11),
-	CPUID_MTRR = (1 << 12),
+        CPUID_AMDSEP = (1 << 10),
+        CPUID_SEP = (1 << 11),
+        CPUID_MTRR = (1 << 12),
         CPUID_MCA = (1 << 14),
         CPUID_CMOV = (1 << 15),
         CPUID_MMX = (1 << 23),
-	CPUID_FXSR = (1 << 24)
+        CPUID_FXSR = (1 << 24)
 };
 
 /*Addition flags returned by CPUID function 0x80000001*/
@@ -372,6 +372,8 @@ cpu_set(void)
 
     CPUID        = cpu_s->cpuid_model;
     is8086       = (cpu_s->cpu_type > CPU_8088);
+    is_nec       = (cpu->type == CPU_NEC);
+    is186        = (cpu->type == CPU_186);
     is286        = (cpu_s->cpu_type >= CPU_286);
     is386        = (cpu_s->cpu_type >= CPU_386SX);
     israpidcad   = (cpu_s->cpu_type == CPU_RAPIDCAD);
@@ -529,6 +531,8 @@ cpu_set(void)
     switch (cpu_s->cpu_type) {
 	case CPU_8088:
 	case CPU_8086:
+	case CPU_NEC:
+	case CPU_186:
 		break;
 
 	case CPU_286:
diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h
index 690869424..5fbe2f2e0 100644
--- a/src/cpu/cpu.h
+++ b/src/cpu/cpu.h
@@ -14,9 +14,9 @@
  *		leilei,
  *		Miran Grca, <mgrca8@gmail.com>
  *
- *		Copyright 2008-2018 Sarah Walker.
+ *		Copyright 2008-2020 Sarah Walker.
  *		Copyright 2016-2018 leilei.
- *		Copyright 2016,2018 Miran Grca.
+ *		Copyright 2016-2020 Miran Grca.
  */
 #ifndef EMU_CPU_H
 # define EMU_CPU_H
@@ -38,6 +38,8 @@ enum {
     CPU_V20,		/* NEC 808x class CPUs - future proofing */
     CPU_V30,
 #endif
+    CPU_188,		/* 18x class CPUs */
+    CPU_186,
     CPU_286,		/* 286 class CPUs */
     CPU_386SX,		/* 386 class CPUs */
     CPU_IBM386SLC,
@@ -114,6 +116,7 @@ enum {
 #define MANU_CYRIX	2
 #define MANU_IDT	3
 #define MANU_NEC	4
+#define MANU_IBM	5
 
 #define CPU_SUPPORTS_DYNAREC 1
 #define CPU_REQUIRES_DYNAREC 2
@@ -489,10 +492,11 @@ extern double   fpu_multi;
 extern int	cpu_cyrix_alignment;	/*Cyrix 5x86/6x86 only has data misalignment
 					  penalties when crossing 8-byte boundaries*/
 
-extern int	is8086,	is286, is386, is486;
+extern int	is8086,	is186, is286, is386, is486;
 extern int	is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm;
 extern int	hascache;
 extern int	isibm486;
+extern int	is_nec;
 extern int	is_rapidcad;
 extern int	hasfpu;
 #define CPU_FEATURE_RDTSC (1 << 0)
@@ -502,6 +506,7 @@ extern int	hasfpu;
 #define CPU_FEATURE_VME   (1 << 4)
 #define CPU_FEATURE_CX8   (1 << 5)
 #define CPU_FEATURE_3DNOW (1 << 6)
+#define CPU_FEATURE_SYSCALL (1 << 7)
 
 extern uint32_t	cpu_features;
 
diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c
index bb0e04637..7931dffc7 100644
--- a/src/cpu/cpu_table.c
+++ b/src/cpu/cpu_table.c
@@ -20,7 +20,7 @@
  *		Copyright 2008-2019 Sarah Walker.
  *		Copyright 2016-2019 leilei.
  *		Copyright 2016-2019 Miran Grca.
- *		Copyright 2017-2019 Fred N. van Kempen.
+ *		Copyright 2017-2020 Fred N. van Kempen.
  *		Copyright 2020 RichardG.
  *		Copyright 2021 dob205.
  */
@@ -79,6 +79,7 @@ const cpu_family_t cpu_families[] = {
 		{"4.77",    CPU_8088, fpus_8088,  4772728,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
 		{"7.16",    CPU_8088, fpus_8088,  7159092,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
 		{"8",       CPU_8088, fpus_8088,  8000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+//		{"9.54",    CPU_8088, fpus_8088,  9545456,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
 		{"10",      CPU_8088, fpus_8088, 10000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
 		{"12",      CPU_8088, fpus_8088, 12000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
 		{"16",      CPU_8088, fpus_8088, 16000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
@@ -109,6 +110,66 @@ const cpu_family_t cpu_families[] = {
 		{"16",      CPU_8086, fpus_8088,  16000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 2},
 		{"", 0}
 	}
+    }, {
+	.package = CPU_PKG_188,
+	.manufacturer = "Intel",
+	.name = "80188",
+	.internal_name = "80188",
+	.cpus = (const CPU[]) {
+		{"6",       CPU_188, fpus_80186,   6000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"7.16",    CPU_188, fpus_80186,   7159092,    1, 5000, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1},
+		{"8",       CPU_188, fpus_80186,   8000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"9.54",    CPU_188, fpus_80186,   9545456,    1, 5000, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1},
+		{"10",      CPU_188, fpus_80186,  10000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"12",      CPU_188, fpus_80186,  12000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"16",      CPU_188, fpus_80186,  16000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 2},
+		{"20",      CPU_188, fpus_80186,  20000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 3},
+		{"25",      CPU_188, fpus_80186,  25000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 3},
+		{"", 0}
+	}
+    }, {
+	.package = CPU_PKG_NECV20,
+	.manufacturer = "NEC",
+	.name = "NEC V20",
+	.internal_name = "necv20",
+	.cpus = (const CPU[]) {
+		{"5",       CPU_V20, fpus_8088,   5000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"8",       CPU_V20, fpus_8088,   8000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"10",      CPU_V20, fpus_8088,  10000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"12",      CPU_V20, fpus_8088,  12000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"16",      CPU_V20, fpus_8088,  16000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 2},
+		{"", 0}
+	}
+    }, {
+	.package = CPU_PKG_186,
+	.manufacturer = "Intel",
+	.name = "80186",
+	.internal_name = "80186",
+	.cpus = (const CPU[]) {
+		{"6",       CPU_186, fpus_80186,   6000000,    1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"7.16",    CPU_186, fpus_80186,   7159092,    1, 0, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1},
+		{"8",       CPU_186, fpus_80186,   8000000,    1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"9.54",    CPU_186, fpus_80186,   9545456,    1, 0, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1},
+		{"10",      CPU_186, fpus_80186,  10000000,    1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"12",      CPU_186, fpus_80186,  12000000,    1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"16",      CPU_186, fpus_80186,  16000000,    1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
+		{"20",      CPU_186, fpus_80186,  20000000,    1, 0, 0, 0, 0, 0, 0,0,0,0, 3},
+		{"25",      CPU_186, fpus_80186,  25000000,    1, 0, 0, 0, 0, 0, 0,0,0,0, 3},
+		{"", 0}
+	}
+    }, {
+	.package = CPU_PKG_NECV30,
+	.manufacturer = "NEC",
+	.name = "NEC V30",
+	.internal_name = "necv30",
+	.cpus = (const CPU[]) {
+		{"5",       CPU_V20, fpus_80186,   5000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"8",       CPU_V20, fpus_80186,   8000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"10",      CPU_V20, fpus_80186,  10000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"12",      CPU_V20, fpus_80186,  12000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
+		{"16",      CPU_V20, fpus_80186,  16000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 2},
+		{"", 0}
+	}
     }, {
 	.package = CPU_PKG_286,
 	.manufacturer = "Intel",