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Applied all relevant PCem commits;

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Extensively cleaned up and changed the CD-ROM code;
Removed CD-ROM IOCTTL (it was causing performance and stability issues);
Turned a lot of things into device_t's;
Added the PS/1 Model 2011 XTA and standalone XTA hard disk controllers, ported from Varcem;
Numerous FDC fixes for the PS/1 Model 2121;
NVR changes ported from Varcem;
The PCap code no longer requires libpcap to be compiled;
Numerous fixes to various SCSI controllers;
Updated NukedOPL to 1.8;
Fixes to OpenAL initialization and closing, should give less Audio issues now;
Revorked parts of the common (S)VGA code (also based on code from QEMU);
Removed the Removable SCSI hard disks (they were a never finished experiment so there was no need to keep them there);
Cleaned up the SCSI hard disk and Iomega ZIP code (but more cleanups of that are coming in the future);
In some occasions (IDE hard disks in multiple sector mode and SCSI hard disks) the status bar icon is no longer updated, should improve performance a bit;
Redid the way the tertiary and quaternary IDE controllers are configured (and they are now device_t's);
Extensively reworked the IDE code and fixed quite a few bugs;
Fixes to XT MFM, AT MFM, and AT ESDI code;
Some changes to XTIDE and MCA ESDI code;
Some fixes to the CD-ROM image handler.
This commit is contained in:
OBattler
2018-04-25 23:51:13 +02:00
parent 2789adca0e
commit a412ceb4d9
151 changed files with 21026 additions and 21058 deletions
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79
src/mem.c
View File

@@ -193,11 +193,11 @@ flushmmucache(void)
int c;
for (c = 0; c < 256; c++) {
if (readlookup[c] != 0xffffffff) {
if (readlookup[c] != (int) 0xffffffff) {
readlookup2[readlookup[c]] = -1;
readlookup[c] = 0xffffffff;
}
if (writelookup[c] != 0xffffffff) {
if (writelookup[c] != (int) 0xffffffff) {
page_lookup[writelookup[c]] = NULL;
writelookup2[writelookup[c]] = -1;
writelookup[c] = 0xffffffff;
@@ -220,11 +220,11 @@ flushmmucache_nopc(void)
int c;
for (c = 0; c < 256; c++) {
if (readlookup[c] != 0xffffffff) {
if (readlookup[c] != (int) 0xffffffff) {
readlookup2[readlookup[c]] = -1;
readlookup[c] = 0xffffffff;
}
if (writelookup[c] != 0xffffffff) {
if (writelookup[c] != (int) 0xffffffff) {
page_lookup[writelookup[c]] = NULL;
writelookup2[writelookup[c]] = -1;
writelookup[c] = 0xffffffff;
@@ -239,11 +239,11 @@ flushmmucache_cr3(void)
int c;
for (c = 0; c < 256; c++) {
if (readlookup[c] != 0xffffffff) {
if (readlookup[c] != (int) 0xffffffff) {
readlookup2[readlookup[c]] = -1;
readlookup[c] = 0xffffffff;
}
if (writelookup[c] != 0xffffffff) {
if (writelookup[c] != (int) 0xffffffff) {
page_lookup[writelookup[c]] = NULL;
writelookup2[writelookup[c]] = -1;
writelookup[c] = 0xffffffff;
@@ -259,7 +259,7 @@ mem_flush_write_page(uint32_t addr, uint32_t virt)
int c;
for (c = 0; c < 256; c++) {
if (writelookup[c] != 0xffffffff) {
if (writelookup[c] != (int) 0xffffffff) {
uintptr_t target = (uintptr_t)&ram[(uintptr_t)(addr & ~0xfff) - (virt & ~0xfff)];
if (writelookup2[writelookup[c]] == target || page_lookup[writelookup[c]] == page_target) {
@@ -403,9 +403,9 @@ addreadlookup(uint32_t virt, uint32_t phys)
{
if (virt == 0xffffffff) return;
if (readlookup2[virt>>12] != -1) return;
if (readlookup2[virt>>12] != (uintptr_t) -1) return;
if (readlookup[readlnext] != 0xffffffff)
if (readlookup[readlnext] != (int) 0xffffffff)
readlookup2[readlookup[readlnext]] = -1;
readlookup2[virt>>12] = (uintptr_t)&ram[(uintptr_t)(phys & ~0xFFF) - (uintptr_t)(virt & ~0xfff)];
@@ -496,7 +496,7 @@ readmembl(uint32_t addr)
if (addr < 0x100000 && ram_mapped_addr[addr >> 14]) {
addr = (ram_mapped_addr[addr >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr : (ram_mapped_addr[addr >> 14] & ~0x3fff) + (addr & 0x3fff);
if(addr < mem_size * 1024) return ram[addr];
if(addr < (uint32_t) (mem_size * 1024)) return ram[addr];
return 0xff;
}
@@ -520,7 +520,7 @@ writemembl(uint32_t addr, uint8_t val)
if (addr < 0x100000 && ram_mapped_addr[addr >> 14]) {
addr = (ram_mapped_addr[addr >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr : (ram_mapped_addr[addr >> 14] & ~0x3fff) + (addr & 0x3fff);
if (addr < mem_size * 1024)
if (addr < (uint32_t) (mem_size * 1024))
ram[addr] = val;
return;
}
@@ -545,7 +545,7 @@ writemembl(uint32_t addr, uint8_t val)
uint8_t
readmemb386l(uint32_t seg, uint32_t addr)
{
{
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
@@ -554,7 +554,7 @@ readmemb386l(uint32_t seg, uint32_t addr)
mem_logical_addr = addr = addr + seg;
if (addr < 0x100000 && ram_mapped_addr[addr >> 14]) {
addr = (ram_mapped_addr[addr >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr : (ram_mapped_addr[addr >> 14] & ~0x3fff) + (addr & 0x3fff);
addr = (ram_mapped_addr[addr >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr : (ram_mapped_addr[addr >> 14] & ~0x3fff) + (addr & 0x3fff);
if (addr < (uint32_t) (mem_size * 1024))
return ram[addr];
return 0xff;
@@ -577,7 +577,7 @@ readmemb386l(uint32_t seg, uint32_t addr)
void
writememb386l(uint32_t seg, uint32_t addr, uint8_t val)
{
{
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
@@ -585,7 +585,7 @@ writememb386l(uint32_t seg, uint32_t addr, uint8_t val)
mem_logical_addr = addr = addr + seg;
if (addr < 0x100000 && ram_mapped_addr[addr >> 14]) {
addr = (ram_mapped_addr[addr >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr : (ram_mapped_addr[addr >> 14] & ~0x3fff) + (addr & 0x3fff);
addr = (ram_mapped_addr[addr >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr : (ram_mapped_addr[addr >> 14] & ~0x3fff) + (addr & 0x3fff);
if (addr < (uint32_t) (mem_size * 1024))
ram[addr] = val;
return;
@@ -613,7 +613,7 @@ readmemwl(uint32_t seg, uint32_t addr)
readmemwl(uint32_t seg, uint32_t addr)
{
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return -1;
@@ -626,16 +626,16 @@ readmemwl(uint32_t seg, uint32_t addr)
if (cr0 >> 31) {
if (mmutranslate_read(addr2) == 0xffffffff) return 0xffff;
if (mmutranslate_read(addr2+1) == 0xffffffff) return 0xffff;
}
if (is386) return readmemb386l(seg,addr)|(readmemb386l(seg,addr+1)<<8);
}
if (is386) return readmemb386l(seg,addr)|(((uint16_t) readmemb386l(seg,addr+1))<<8);
else return readmembl(seg+addr)|(((uint16_t) readmembl(seg+addr+1))<<8);
}
}
else if (readlookup2[addr2 >> 12] != (uintptr_t) -1)
return *(uint16_t *)(readlookup2[addr2 >> 12] + addr2);
}
if (addr2 < 0x100000 && ram_mapped_addr[addr2 >> 14]) {
addr = (ram_mapped_addr[addr2 >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr2 : (ram_mapped_addr[addr2 >> 14] & ~0x3fff) + (addr2 & 0x3fff);
addr = (ram_mapped_addr[addr2 >> 14] & MEM_MAP_TO_SHADOW_RAM_MASK) ? addr2 : (ram_mapped_addr[addr2 >> 14] & ~0x3fff) + (addr2 & 0x3fff);
if (addr < (uint32_t) (mem_size * 1024))
return *((uint16_t *)&ram[addr]);
return 0xffff;
@@ -653,9 +653,11 @@ readmemwl(uint32_t seg, uint32_t addr)
return _mem_read_w[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]);
if (_mem_read_b[addr2 >> 14]) {
if (AT)
if (AT)
return _mem_read_b[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) |
((uint16_t) (_mem_read_b[(addr2 + 1) >> 14](addr2 + 1, _mem_priv_r[addr2 >> 14])) << 8);
else
else
return _mem_read_b[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) |
((uint16_t) (_mem_read_b[(seg + ((addr + 1) & 0xffff)) >> 14](seg + ((addr + 1) & 0xffff), _mem_priv_r[addr2 >> 14])) << 8);
}
@@ -667,7 +669,7 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val)
writememwl(uint32_t seg, uint32_t addr, uint16_t val)
{
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
@@ -695,7 +697,7 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val)
writemembl(seg+addr,val);
writemembl(seg+addr+1,val>>8);
}
return;
return;
} else if (writelookup2[addr2 >> 12] != (uintptr_t) -1) {
*(uint16_t *)(writelookup2[addr2 >> 12] + addr2) = val;
return;
@@ -736,7 +738,7 @@ readmemll(uint32_t seg, uint32_t addr)
readmemll(uint32_t seg, uint32_t addr)
{
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return -1;
@@ -757,7 +759,7 @@ readmemll(uint32_t seg, uint32_t addr)
if (mmutranslate_read(addr2) == 0xffffffff) return 0xffffffff;
if (mmutranslate_read(addr2+3) == 0xffffffff) return 0xffffffff;
}
return readmemwl(seg,addr)|(readmemwl(seg,addr+2)<<16);
return readmemwl(seg,addr)|(readmemwl(seg,addr+2)<<16);
} else if (readlookup2[addr2 >> 12] != (uintptr_t) -1)
return *(uint32_t *)(readlookup2[addr2 >> 12] + addr2);
}
@@ -773,10 +775,14 @@ readmemll(uint32_t seg, uint32_t addr)
if (_mem_read_l[addr2 >> 14])
return _mem_read_l[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]);
if (_mem_read_w[addr2 >> 14])
if (_mem_read_w[addr2 >> 14])
return _mem_read_w[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) |
((uint32_t) (_mem_read_w[addr2 >> 14](addr2 + 2, _mem_priv_r[addr2 >> 14])) << 16);
if (_mem_read_b[addr2 >> 14])
if (_mem_read_b[addr2 >> 14])
return _mem_read_b[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) |
((uint32_t) (_mem_read_b[addr2 >> 14](addr2 + 1, _mem_priv_r[addr2 >> 14])) << 8) |
((uint32_t) (_mem_read_b[addr2 >> 14](addr2 + 2, _mem_priv_r[addr2 >> 14])) << 16) |
((uint32_t) (_mem_read_b[addr2 >> 14](addr2 + 3, _mem_priv_r[addr2 >> 14])) << 24);
return 0xffffffff;
@@ -787,7 +793,7 @@ writememll(uint32_t seg, uint32_t addr, uint32_t val)
writememll(uint32_t seg, uint32_t addr, uint32_t val)
{
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
@@ -810,7 +816,7 @@ writememll(uint32_t seg, uint32_t addr, uint32_t val)
}
writememwl(seg,addr,val);
writememwl(seg,addr+2,val>>16);
return;
return;
} else if (writelookup2[addr2 >> 12] != (uintptr_t) -1) {
*(uint32_t *)(writelookup2[addr2 >> 12] + addr2) = val;
return;
@@ -852,7 +858,7 @@ readmemql(uint32_t seg, uint32_t addr)
readmemql(uint32_t seg, uint32_t addr)
{
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return -1;
@@ -872,7 +878,7 @@ readmemql(uint32_t seg, uint32_t addr)
if (mmutranslate_read(addr2) == 0xffffffff) return 0xffffffff;
if (mmutranslate_read(addr2+7) == 0xffffffff) return 0xffffffff;
}
return readmemll(seg,addr)|((uint64_t)readmemll(seg,addr+4)<<32);
return readmemll(seg,addr)|((uint64_t)readmemll(seg,addr+4)<<32);
} else if (readlookup2[addr2 >> 12] != (uintptr_t) -1)
return *(uint64_t *)(readlookup2[addr2 >> 12] + addr2);
}
@@ -897,7 +903,7 @@ writememql(uint32_t seg, uint32_t addr, uint64_t val)
writememql(uint32_t seg, uint32_t addr, uint64_t val)
{
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
@@ -919,7 +925,7 @@ writememql(uint32_t seg, uint32_t addr, uint64_t val)
}
writememll(seg, addr, val);
writememll(seg, addr+4, val >> 32);
return;
return;
} else if (writelookup2[addr2 >> 12] != (uintptr_t) -1) {
*(uint64_t *)(writelookup2[addr2 >> 12] + addr2) = val;
return;
@@ -1278,6 +1284,7 @@ mem_mapping_recalc(uint64_t base, uint64_t size)
for (c = base; c < base + size; c += 0x4000) {
_mem_read_b[c >> 14] = NULL;
_mem_read_w[c >> 14] = NULL;
_mem_read_l[c >> 14] = NULL;
_mem_exec[c >> 14] = NULL;
_mem_priv_r[c >> 14] = NULL;
_mem_mapping_r[c >> 14] = NULL;
@@ -1760,7 +1767,7 @@ mem_init(void)
static void
mem_remap_top(int max_size)
mem_remap_top(int max_size)
{
uint32_t c;
@@ -1799,7 +1806,7 @@ mem_remap_top_384k(void)
void
mem_reset_page_blocks(void)
mem_reset_page_blocks(void)
{
uint32_t c;