claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Corrected PCI slots for Intel Advanced/ATX and Intel Advanced/ZP.

Browse Source
This commit is contained in:
OBattler
2017-08-28 23:47:09 +02:00
parent 979977b430
commit a5b7512882
3 changed files with 52 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

39
src/model.c
View File

@@ -109,9 +109,11 @@ extern void at_endeavor_init(void);
extern void at_dtk486_init(void);
extern void at_r418_init(void);
extern void at_plato_init(void);
extern void at_zappa_init(void);
extern void at_mb500n_init(void);
extern void at_president_init(void);
extern void at_p54tp4xe_init(void);
extern void at_thor_init(void);
extern void at_ap53_init(void);
extern void at_p55t2s_init(void);
extern void at_acerm3a_init(void);
@@ -208,12 +210,12 @@ MODEL models[] =
{"[Socket 5 FX] ASUS P/I-P54TP4XE", ROM_P54TP4XE, "p54tp4xe", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 256, 1, 127, at_p54tp4xe_init, NULL },
{"[Socket 5 FX] Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 128, 1, 127, at_endeavor_init, NULL },
{"[Socket 5 FX] Intel Advanced/ZP", ROM_ZAPPA, "zappa", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 128, 1, 127, at_endeavor_init, NULL },
{"[Socket 5 FX] Intel Advanced/ZP", ROM_ZAPPA, "zappa", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 128, 1, 127, at_zappa_init, NULL },
{"[Socket 5 FX] PC Partner MB500N", ROM_MB500N, "mb500n", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 128, 1, 127, at_mb500n_init, NULL },
{"[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT,"president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MODEL_AT | MODEL_HAS_IDE | MODEL_PCI, 1, 128, 1, 127, at_president_init, NULL },
{"[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 256, 1, 127, at_endeavor_init, NULL },
{"[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 256, 1, 127, at_endeavor_init, NULL },
{"[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 256, 1, 127, at_thor_init, NULL },
{"[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 256, 1, 127, at_thor_init, NULL },
{"[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 256, 1, 127, at_acerm3a_init, NULL },
{"[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MODEL_AT | MODEL_PS2 | MODEL_HAS_IDE | MODEL_PCI, 1, 256, 1, 127, at_acerv35n_init, NULL },
@@ -698,7 +700,7 @@ void at_plato_init(void)
i430nx_init();
}
void at_advanced_common_init(void)
void at_endeavor_init(void)
{
at_ide_init();
memregs_init();
@@ -710,11 +712,20 @@ void at_advanced_common_init(void)
i430fx_init();
piix_init(7, 0xd, 0xe, 0xf, 0x10);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}
void at_endeavor_init(void)
void at_zappa_init(void)
{
at_advanced_common_init();
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(0xd);
pci_slot(0xf);
pci_slot(0xe);
i430fx_init();
piix_init(7, 0xd, 0xf, 0xe, 0);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}
@@ -765,6 +776,22 @@ void at_p54tp4xe_init(void)
device_add(&intel_flash_bxt_device);
}
void at_thor_init(void)
{
at_ide_init();
memregs_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_slot(8);
pci_slot(0xd);
pci_slot(0xe);
pci_slot(0xf);
pci_slot(0x10);
i430fx_init();
piix_init_thor(7, 8, 0xd, 0xf, 0xe, 0x10);
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
}
void at_ap53_init(void)
{
at_ide_init();

18
src/piix.c
View File

@@ -683,7 +683,7 @@ void piix3_reset(void)
card_piix_ide[0x44] = 0x00;
}
void piix_init(int card, int pci_a, int pci_b, int pci_c, int pci_d)
void piix_init_common(int card)
{
pci_add_specific(card, piix_read, piix_write, NULL);
@@ -702,7 +702,23 @@ void piix_init(int card, int pci_a, int pci_b, int pci_c, int pci_d)
dma_alias_set();
pci_reset_handler.pci_set_reset = piix_reset;
}
void piix_init(int card, int pci_a, int pci_b, int pci_c, int pci_d)
{
piix_init_common(card);
pci_set_card_routing(pci_a, PCI_INTA);
pci_set_card_routing(pci_b, PCI_INTB);
pci_set_card_routing(pci_c, PCI_INTC);
pci_set_card_routing(pci_d, PCI_INTD);
}
void piix_init_thor(int card, int pci_d_only, int pci_a, int pci_b, int pci_c, int pci_d)
{
piix_init_common(card);
pci_set_card_routing(pci_d_only, PCI_INTD);
pci_set_card_routing(pci_a, PCI_INTA);
pci_set_card_routing(pci_b, PCI_INTB);
pci_set_card_routing(pci_c, PCI_INTC);

2
src/piix.h
View File

@@ -17,6 +17,8 @@
*/
extern void piix_init(int card, int pci_a, int pci_b, int pci_c, int pci_d);
extern void piix_init_thor(int card, int pci_d_only, int pci_a, int pci_b, int pci_c, int pci_d);
extern void piix3_init(int card, int pci_a, int pci_b, int pci_c, int pci_d);
extern uint8_t piix_bus_master_read(uint16_t port, void *priv);