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Fix EGA/VGA/SVGA odd-even handling of write mask

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Matches my AMD Stoney + S3 Trio64V2, and also Intel's 2023 GPU docs (which *still* tend to be more accurate than IBM's), and makes more sense than what we've (I've?) been doing.
This commit is contained in:
GreaseMonkey
2025-05-02 10:51:34 +12:00
parent a2abb497e2
commit a72142f2b5
2 changed files with 2 additions and 6 deletions
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4
src/video/vid_ega.c
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@@ -1180,9 +1180,7 @@ ega_write(uint32_t addr, uint8_t val, void *priv)
cycles -= video_timing_write_b; cycles -= video_timing_write_b;
if (ega->chain2_write) { if (ega->chain2_write) {
writemask2 &= ~0xa; writemask2 &= 0x5 << (addr & 1);
if (addr & 1)
writemask2 <<= 1;
} }
addr = ega_remap_cpu_addr(addr, ega); addr = ega_remap_cpu_addr(addr, ega);

4
src/video/vid_svga.c
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@@ -1689,9 +1689,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv)
addr &= ~3; addr &= ~3;
addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff);
} else if (svga->chain2_write) { } else if (svga->chain2_write) {
writemask2 &= ~0xa; writemask2 &= 0x5 << (addr & 1);
if (addr & 1)
writemask2 <<= 1;
addr &= ~1; addr &= ~1;
addr <<= 2; addr <<= 2;
} else } else