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Changed CPU cycles period tweak so it only affects the 486's;

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Applied Laser XT ROM BASIC and Laser XT EMS patches from Greatpsycho.
This commit is contained in:
OBattler
2017-06-03 16:34:40 +02:00
parent 8151f47135
commit ac18a8f539
7 changed files with 217 additions and 43 deletions
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24
src/CPU/386_dynarec.c
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@@ -1284,32 +1284,12 @@ static int cpu_cycle_period(void)
{
switch(cpu_pci_speed)
{
case 16000000:
return 800;
case 333333333:
return is_pentium ? 1000 : 1333;
break;
case 20000000:
case 40000000:
return 1000;
break;
case 25000000:
default:
return 1000;
break;
case 27500000:
return 1100;
break;
case 30000000:
return 1200;
break;
case 333333333:
return 1333;
break;
case 37500000:
return 1500;
break;
case 41666667:
return 1041;
break;
}
}

5
src/Makefile.mingw
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@@ -8,9 +8,9 @@
#
# Modified Makefile for Win32 MinGW 32-bit environment.
#
# Version: @(#)Makefile.mingw 1.0.21 2017/06/01
# Version: @(#)Makefile.mingw 1.0.22 2017/06/01
#
# Authors: Kotori, <oubattler@gmail.com>
# Authors: Miran Grca, <mgrca8@gmail.com>
# Fred N. van Kempen, <decwiz@yahoo.com>
# Sarah Walker,
# Richard G.,
@@ -128,6 +128,7 @@ SYSOBJ = model.o \
i430hx.o i430lx.o i430fx.o i430nx.o i430vx.o i440fx.o \
neat.o \
ali1429.o \
laserxt.o \
opti495.o \
scat.o \
sis496.o \

121
src/laserxt.c Normal file
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@@ -0,0 +1,121 @@
/*This is the chipset used in the LaserXT series model*/
#include "ibm.h"
#include "io.h"
#include "mem.h"
static int laserxt_emspage[4];
static int laserxt_emscontrol[4];
static mem_mapping_t laserxt_ems_mapping[4];
static int laserxt_ems_baseaddr_index = 0;
uint32_t get_laserxt_ems_addr(uint32_t addr)
{
if(laserxt_emspage[(addr >> 14) & 3] & 0x80)
{
addr = 0xA0000 + ((laserxt_emspage[(addr >> 14) & 3] & 0x0F) << 14) + ((laserxt_emspage[(addr >> 14) & 3] & 0x40) << 12) + (addr & 0x3FFF);
}
return addr;
}
void laserxt_write(uint16_t port, uint8_t val, void *priv)
{
int i;
uint32_t paddr, vaddr;
switch (port)
{
case 0x0208: case 0x4208: case 0x8208: case 0xC208:
laserxt_emspage[port >> 14] = val;
paddr = 0xC0000 + (port & 0xC000) + (((laserxt_ems_baseaddr_index + (4 - (port >> 14))) & 0x0C) << 14);
if(val & 0x80)
{
mem_mapping_enable(&laserxt_ems_mapping[port >> 14]);
vaddr = get_laserxt_ems_addr(paddr);
//pclog("Mapping address %05X to %06X\n", paddr, vaddr);
mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr);
}
else
{
//pclog("Unmap address %05X\n", paddr);
mem_mapping_disable(&laserxt_ems_mapping[port >> 14]);
}
//pclog("Write LaserXT port %04X to %02X at %04X:%04X\n", port, val, CS, cpu_state.pc);
flushmmucache();
break;
case 0x0209: case 0x4209: case 0x8209: case 0xC209:
laserxt_emscontrol[port >> 14] = val;
laserxt_ems_baseaddr_index = 0;
for(i=0; i<4; i++)
{
laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i);
}
//pclog("Set base_index to %d\n", laserxt_ems_baseaddr_index);
if(laserxt_ems_baseaddr_index < 3)
{
mem_mapping_disable(&romext_mapping);
}
else
{
mem_mapping_enable(&romext_mapping);
}
mem_mapping_set_addr(&laserxt_ems_mapping[0], 0xC0000 + (((laserxt_ems_baseaddr_index + 4) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000);
//pclog("Write LaserXT port %04X to %02X at %04X:%04X\n", port, val, CS, cpu_state.pc);
flushmmucache();
break;
}
}
uint8_t laserxt_read(uint16_t port, void *priv)
{
switch (port)
{
case 0x0208: case 0x4208: case 0x8208: case 0xC208:
//pclog("Read LaserXT port %04X at %04X:%04X\n", port, CS, cpu_state.pc);
return laserxt_emspage[port >> 14];
case 0x0209: case 0x4209: case 0x8209: case 0xC209:
return laserxt_emscontrol[port >> 14];
break;
}
return 0xff;
}
void mem_write_laserxtems(uint32_t addr, uint8_t val, void *priv)
{
addr = get_laserxt_ems_addr(addr);
if (addr < (mem_size << 10))
ram[addr] = val;
}
uint8_t mem_read_laserxtems(uint32_t addr, void *priv)
{
uint8_t val = 0xFF;
addr = get_laserxt_ems_addr(addr);
if (addr < (mem_size << 10))
val = ram[addr];
return val;
}
void laserxt_init()
{
int i;
if(mem_size > 640)
{
io_sethandler(0x0208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0x4208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0x8208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0xc208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
}
for (i = 0; i < 4; i++)
{
laserxt_emspage[i] = 0x7F;
laserxt_emscontrol[i] = (i == 3) ? 0x00 : 0x80;
mem_mapping_add(&laserxt_ems_mapping[i], 0xE0000 + (i << 14), 0x4000, mem_read_laserxtems, NULL, NULL, mem_write_laserxtems, NULL, NULL, ram + 0xA0000 + (i << 14), 0, NULL);
mem_mapping_disable(&laserxt_ems_mapping[i]);
}
mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
}

1
src/laserxt.h Normal file
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@@ -0,0 +1 @@
void laserxt_init();

96
src/mem.c
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@@ -44,7 +44,7 @@ static mem_mapping_t ram_mid_mapping;
static mem_mapping_t ram_remapped_mapping;
mem_mapping_t bios_mapping[8];
mem_mapping_t bios_high_mapping[8];
static mem_mapping_t romext_mapping;
mem_mapping_t romext_mapping;
uint8_t *ram;
uint32_t rammask;
@@ -367,22 +367,32 @@ int loadbios()
if (!f) break;
fread(rom+0xE000,8192,1,f);
fclose(f);
f=romfopen(L"roms/ibmpc/basicc11.f6",L"rb");
if (!f) return 1; /*I don't really care if BASIC is there or not*/
fread(rom+0x6000,8192,1,f);
fclose(f);
f=romfopen(L"roms/ibmpc/basicc11.f8",L"rb");
if (!f) break; /*But if some of it is there, then all of it must be*/
fread(rom+0x8000,8192,1,f);
fclose(f);
f=romfopen(L"roms/ibmpc/basicc11.fa",L"rb");
if (!f) break;
fread(rom+0xA000,8192,1,f);
fclose(f);
f=romfopen(L"roms/ibmpc/basicc11.fc",L"rb");
if (!f) break;
fread(rom+0xC000,8192,1,f);
fclose(f);
f=romfopen("roms/ibmpc/ibm-basic-1.10.rom","rb");
+ if (!f)
{
f=romfopen("roms/ibmpc/basicc11.f6","rb");
if (!f) return 1; /*I don't really care if BASIC is there or not*/
fread(rom+0x6000,8192,1,f);
fclose(f);
f=romfopen("roms/ibmpc/basicc11.f8","rb");
if (!f) break; /*But if some of it is there, then all of it must be*/
fread(rom+0x8000,8192,1,f);
fclose(f);
f=romfopen("roms/ibmpc/basicc11.fa","rb");
if (!f) break;
fread(rom+0xA000,8192,1,f);
fclose(f);
f=romfopen("roms/ibmpc/basicc11.fc","rb");
if (!f) break;
fread(rom+0xC000,8192,1,f);
fclose(f);
}
else
{
fread(rom+0x6000,32768,1,f);
fclose(f);
}
return 1;
case ROM_MEGAPC:
@@ -516,6 +526,32 @@ int loadbios()
if (!f) break;
fread(rom + 0xE000, 8192, 1, f);
fclose(f);
f=romfopen("roms/ltxt/ibm-basic-1.10.rom","rb");
+ if (!f)
{
f=romfopen("roms/ltxt/basicc11.f6","rb");
if (!f) return 1; /*I don't really care if BASIC is there or not*/
fread(rom+0x6000,8192,1,f);
fclose(f);
f=romfopen("roms/ltxt/basicc11.f8","rb");
if (!f) break; /*But if some of it is there, then all of it must be*/
fread(rom+0x8000,8192,1,f);
fclose(f);
f=romfopen("roms/ltxt/basicc11.fa","rb");
if (!f) break;
fread(rom+0xA000,8192,1,f);
fclose(f);
f=romfopen("roms/ltxt/basicc11.fc","rb");
if (!f) break;
fread(rom+0xC000,8192,1,f);
fclose(f);
}
else
{
fread(rom+0x6000,32768,1,f);
fclose(f);
}
return 1;
case ROM_LXT3:
@@ -523,6 +559,32 @@ int loadbios()
if (!f) break;
fread(rom + 0xE000, 8192, 1, f);
fclose(f);
f=romfopen("roms/lxt3/ibm-basic-1.10.rom","rb");
+ if (!f)
{
f=romfopen("roms/lxt3/basicc11.f6","rb");
if (!f) return 1; /*I don't really care if BASIC is there or not*/
fread(rom+0x6000,8192,1,f);
fclose(f);
f=romfopen("roms/lxt3/basicc11.f8","rb");
if (!f) break; /*But if some of it is there, then all of it must be*/
fread(rom+0x8000,8192,1,f);
fclose(f);
f=romfopen("roms/lxt3/basicc11.fa","rb");
if (!f) break;
fread(rom+0xA000,8192,1,f);
fclose(f);
f=romfopen("roms/lxt3/basicc11.fc","rb");
if (!f) break;
fread(rom+0xC000,8192,1,f);
fclose(f);
}
else
{
fread(rom+0x6000,32768,1,f);
fclose(f);
}
return 1;
case ROM_SPC4200P: /*Samsung SPC-4200P*/

1
src/mem.h
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@@ -109,6 +109,7 @@ void mem_write_nulll(uint32_t addr, uint32_t val, void *p);
mem_mapping_t bios_mapping[8];
mem_mapping_t bios_high_mapping[8];
mem_mapping_t romext_mapping;
extern mem_mapping_t ram_high_mapping;

12
src/model.c
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@@ -136,6 +136,8 @@ void at_p55va_init();
void at_i440fx_init();
void at_s1668_init();
void xt_laserxt_init();
int model;
int AMSTRAD, AT, PCI, TANDY;
@@ -156,8 +158,8 @@ MODEL models[] =
{"Generic XT clone", ROM_GENXT, "genxt", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init, NULL},
{"AMI XT clone", ROM_AMIXT, "amixt", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init, NULL},
{"DTK XT clone", ROM_DTKXT, "dtk", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init, NULL},
{"VTech Laser Turbo XT", ROM_LTXT, "ltxt", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init, NULL},
{"VTech Laser XT3", ROM_LXT3, "lxt3", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init, NULL},
{"VTech Laser Turbo XT", ROM_LTXT, "ltxt", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_laserxt_init, NULL},
{"VTech Laser XT3", ROM_LXT3, "lxt3", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_laserxt_init, NULL},
{"Phoenix XT clone", ROM_PXXT, "pxxt", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init, NULL},
{"Juko XT clone", ROM_JUKOPC, "jukopc", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init, NULL},
{"Tandy 1000", ROM_TANDY, "tandy", { "", cpus_8088, "", NULL, "", NULL, "", NULL, "", NULL}, 1, 0, 128, 640, 128, tandy1k_init, &tandy1000_device},
@@ -392,6 +394,12 @@ void olim24_init()
if (joystick_type != 7) device_add(&gameport_device);
}
void xt_laserxt_init()
{
xt_init();
laserxt_init();
}
void at_init()
{
AT = 1;