claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge pull request #5116 from 86Box/tc1995

Browse Source 
And Cirrus per the previous commit.
This commit is contained in:
Miran Grča
2025-01-09 23:43:22 +01:00
committed by GitHub
parent 0c4347f936 3a22930c07
commit acd0595c7b
1 changed files with 7 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
src/video/vid_cl54xx.c
View File

@@ -1361,7 +1361,7 @@ gd54xx_in(uint16_t addr, void *priv)
32-bit (Pre-5434)/64-bit (5434 and up) DRAM data bus width 32-bit (Pre-5434)/64-bit (5434 and up) DRAM data bus width
for 2M of memory for 2M of memory
*/ */
ret |= (gd54xx_is_5434(svga)) ? 0x98 : 0x18; ret |= 0x18;
break; break;
case 4096: case 4096:
ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/ ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/
@@ -2281,6 +2281,9 @@ gd54xx_writew(uint32_t addr, uint16_t val, void *priv)
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY))
val = (val >> 8) | (val << 8);
gd54xx_write(addr, val, gd54xx); gd54xx_write(addr, val, gd54xx);
gd54xx_write(addr + 1, val >> 8, gd54xx); gd54xx_write(addr + 1, val >> 8, gd54xx);
return; return;
@@ -2308,6 +2311,9 @@ gd54xx_writel(uint32_t addr, uint32_t val, void *priv)
if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest &&
!(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) {
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY))
val = ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24);
gd54xx_write(addr, val, gd54xx); gd54xx_write(addr, val, gd54xx);
gd54xx_write(addr + 1, val >> 8, gd54xx); gd54xx_write(addr + 1, val >> 8, gd54xx);
gd54xx_write(addr + 2, val >> 16, gd54xx); gd54xx_write(addr + 2, val >> 16, gd54xx);
@@ -3661,9 +3667,6 @@ gd54xx_mem_sys_src(gd54xx_t *gd54xx, uint32_t cpu_dat, uint32_t count)
mask_shift = 31 - byte_pos; mask_shift = 31 - byte_pos;
if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND)) if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND))
cpu_dat >>= byte_pos; cpu_dat >>= byte_pos;
else if (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)
cpu_dat = ((cpu_dat & 0xff000000) >> 24) | ((cpu_dat & 0x00ff0000) >> 8) |
((cpu_dat & 0x0000ff00) << 8) | ((cpu_dat & 0x000000ff) << 24);
} else } else
mask_shift = 7; mask_shift = 7;