clang-format in src/include/86box/
This commit is contained in:
Jasmine Iwanek
@@ -17,14 +17,14 @@
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* Copyright 2016-2019 Miran Grca.
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*/
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#ifndef EMU_IDE_H
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# define EMU_IDE_H
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#define EMU_IDE_H
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#define IDE_BUS_MAX 4
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#define IDE_CHAN_MAX 2
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#define IDE_BUS_MAX 4
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#define IDE_CHAN_MAX 2
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#define HDC_PRIMARY_BASE 0x01F0
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#define HDC_PRIMARY_SIDE 0x03F6
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#define HDC_PRIMARY_IRQ 14
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#define HDC_PRIMARY_IRQ 14
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#define HDC_SECONDARY_BASE 0x0170
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#define HDC_SECONDARY_SIDE 0x0376
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#define HDC_SECONDARY_IRQ 15
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@@ -35,8 +35,7 @@
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#define HDC_QUATERNARY_SIDE 0x03EE
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#define HDC_QUATERNARY_IRQ 11
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enum
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{
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enum {
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IDE_NONE = 0,
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IDE_HDD,
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IDE_ATAPI
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@@ -45,55 +44,55 @@ enum
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#ifdef SCSI_DEVICE_H
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typedef struct ide_s {
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uint8_t selected,
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atastat, error,
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command, fdisk;
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atastat, error,
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command, fdisk;
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int type, board,
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irqstat, service,
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blocksize, blockcount,
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hdd_num, channel,
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pos, sector_pos,
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lba,
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reset, mdma_mode,
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do_initial_read;
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irqstat, service,
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blocksize, blockcount,
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hdd_num, channel,
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pos, sector_pos,
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lba,
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reset, mdma_mode,
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do_initial_read;
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uint32_t secount, sector,
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cylinder, head,
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drive, cylprecomp,
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cfg_spt, cfg_hpc,
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lba_addr, tracks,
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spt, hpc;
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cylinder, head,
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drive, cylprecomp,
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cfg_spt, cfg_hpc,
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lba_addr, tracks,
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spt, hpc;
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uint16_t *buffer;
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uint8_t *sector_buffer;
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uint8_t *sector_buffer;
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pc_timer_t timer;
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pc_timer_t timer;
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/* Stuff mostly used by ATAPI */
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scsi_common_t *sc;
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int interrupt_drq;
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double pending_delay;
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scsi_common_t *sc;
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int interrupt_drq;
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double pending_delay;
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int (*get_max)(int ide_has_dma, int type);
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int (*get_timings)(int ide_has_dma, int type);
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void (*identify)(struct ide_s *ide, int ide_has_dma);
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void (*stop)(scsi_common_t *sc);
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void (*packet_command)(scsi_common_t *sc, uint8_t *cdb);
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void (*device_reset)(scsi_common_t *sc);
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uint8_t (*phase_data_out)(scsi_common_t *sc);
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void (*command_stop)(scsi_common_t *sc);
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void (*bus_master_error)(scsi_common_t *sc);
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int (*get_max)(int ide_has_dma, int type);
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int (*get_timings)(int ide_has_dma, int type);
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void (*identify)(struct ide_s *ide, int ide_has_dma);
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void (*stop)(scsi_common_t *sc);
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void (*packet_command)(scsi_common_t *sc, uint8_t *cdb);
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void (*device_reset)(scsi_common_t *sc);
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uint8_t (*phase_data_out)(scsi_common_t *sc);
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void (*command_stop)(scsi_common_t *sc);
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void (*bus_master_error)(scsi_common_t *sc);
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} ide_t;
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extern ide_t *ide_drives[IDE_NUM];
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extern ide_t *ide_drives[IDE_NUM];
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#endif
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/* Type:
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0 = PIO,
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1 = SDMA,
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2 = MDMA,
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3 = UDMA
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0 = PIO,
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1 = SDMA,
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2 = MDMA,
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3 = UDMA
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Return:
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-1 = Not supported,
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Anything else = maximum mode
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-1 = Not supported,
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Anything else = maximum mode
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This will eventually be hookable. */
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enum {
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@@ -104,8 +103,8 @@ enum {
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};
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/* Return:
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0 = Not supported,
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Anything else = timings
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0 = Not supported,
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Anything else = timings
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This will eventually be hookable. */
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enum {
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@@ -114,66 +113,63 @@ enum {
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TIMINGS_PIO_FC
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};
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extern int ide_ter_enabled, ide_qua_enabled;
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#ifdef SCSI_DEVICE_H
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extern ide_t * ide_get_drive(int ch);
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extern void ide_irq_raise(ide_t *ide);
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extern void ide_irq_lower(ide_t *ide);
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extern void ide_allocate_buffer(ide_t *dev);
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extern void ide_atapi_attach(ide_t *dev);
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extern ide_t *ide_get_drive(int ch);
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extern void ide_irq_raise(ide_t *ide);
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extern void ide_irq_lower(ide_t *ide);
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extern void ide_allocate_buffer(ide_t *dev);
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extern void ide_atapi_attach(ide_t *dev);
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#endif
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extern void * ide_xtide_init(void);
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extern void ide_xtide_close(void);
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extern void *ide_xtide_init(void);
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extern void ide_xtide_close(void);
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extern void ide_writew(uint16_t addr, uint16_t val, void *priv);
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extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
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extern void ide_writeb(uint16_t addr, uint8_t val, void *priv);
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extern uint8_t ide_readb(uint16_t addr, void *priv);
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extern uint8_t ide_read_alt_status(uint16_t addr, void *priv);
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extern uint16_t ide_readw(uint16_t addr, void *priv);
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extern void ide_writew(uint16_t addr, uint16_t val, void *priv);
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extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
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extern void ide_writeb(uint16_t addr, uint8_t val, void *priv);
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extern uint8_t ide_readb(uint16_t addr, void *priv);
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extern uint8_t ide_read_alt_status(uint16_t addr, void *priv);
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extern uint16_t ide_readw(uint16_t addr, void *priv);
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extern void ide_set_bus_master(int board,
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int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv),
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void (*set_irq)(int channel, void *priv), void *priv);
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extern void ide_set_bus_master(int board,
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int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv),
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void (*set_irq)(int channel, void *priv), void *priv);
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extern void win_cdrom_eject(uint8_t id);
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extern void win_cdrom_reload(uint8_t id);
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extern void win_cdrom_eject(uint8_t id);
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extern void win_cdrom_reload(uint8_t id);
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extern void ide_set_base(int board, uint16_t port);
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extern void ide_set_side(int board, uint16_t port);
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extern void ide_set_base(int board, uint16_t port);
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extern void ide_set_side(int board, uint16_t port);
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extern void ide_set_handlers(uint8_t board);
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extern void ide_remove_handlers(uint8_t board);
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extern void ide_set_handlers(uint8_t board);
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extern void ide_remove_handlers(uint8_t board);
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extern void ide_pri_enable(void);
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extern void ide_pri_disable(void);
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extern void ide_sec_enable(void);
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extern void ide_sec_disable(void);
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extern void ide_pri_enable(void);
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extern void ide_pri_disable(void);
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extern void ide_sec_enable(void);
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extern void ide_sec_disable(void);
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extern void ide_board_set_force_ata3(int board, int force_ata3);
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extern void ide_board_set_force_ata3(int board, int force_ata3);
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#ifdef EMU_ISAPNP_H
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extern void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv);
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extern void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv);
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#endif
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extern double ide_atapi_get_period(uint8_t channel);
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extern double ide_atapi_get_period(uint8_t channel);
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#ifdef SCSI_DEVICE_H
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extern void ide_set_callback(ide_t *ide, double callback);
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extern void ide_set_callback(ide_t *ide, double callback);
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#endif
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extern void ide_set_board_callback(uint8_t board, double callback);
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extern void ide_set_board_callback(uint8_t board, double callback);
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extern void ide_padstr(char *str, const char *src, int len);
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extern void ide_padstr8(uint8_t *buf, int buf_size, const char *src);
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extern void ide_padstr(char *str, const char *src, int len);
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extern void ide_padstr8(uint8_t *buf, int buf_size, const char *src);
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extern int (*ide_bus_master_dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv);
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extern void (*ide_bus_master_set_irq)(int channel, void *priv);
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extern void *ide_bus_master_priv[2];
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extern int (*ide_bus_master_dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv);
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extern void (*ide_bus_master_set_irq)(int channel, void *priv);
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extern void *ide_bus_master_priv[2];
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extern uint8_t ide_read_ali_75(void);
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extern uint8_t ide_read_ali_76(void);
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extern uint8_t ide_read_ali_75(void);
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extern uint8_t ide_read_ali_76(void);
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#endif /*EMU_IDE_H*/
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#endif /*EMU_IDE_H*/
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