Properly enabled SMM (and with the correct SMBASE) on AMD 486 CPU's.
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@@ -74,9 +74,10 @@ smram_t temp_smram[2];
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/* SMM feature masks */
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#define SMM_IO_INSTRUCTION_RESTART (0x00010000)
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#define SMM_SMBASE_RELOCATION (0x00020000)
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#define SMM_REVISION (0x20000000)
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/* TODO: Which CPU added SMBASE relocation? */
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#define SMM_REVISION_ID SMM_SMBASE_RELOCATION
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#define SMM_REVISION_ID (SMM_SMBASE_RELOCATION | SMM_IO_INSTRUCTION_RESTART | SMM_REVISION)
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#define SMM_SAVE_STATE_MAP_SIZE 128
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@@ -989,7 +990,7 @@ enter_smm(int in_hlt)
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uint32_t smram_state = smbase + 0x10000;
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/* If it's a CPU on which SMM is not supporter, do nothing. */
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if (!is_pentium && !is_k5 && !is_k6 && !is_p6)
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if (!is_am486 && !is_pentium && !is_k5 && !is_k6 && !is_p6)
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return;
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x386_common_log("enter_smm(): smbase = %08X\n", smbase);
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@@ -1146,7 +1147,7 @@ leave_smm(void)
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uint32_t smram_state = smbase + 0x10000;
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/* If it's a CPU on which SMM is not supported (or not implemented in 86Box), do nothing. */
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if (!is_pentium && !is_k5 && !is_k6 && !is_p6)
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if (!is_am486 && !is_pentium && !is_k5 && !is_k6 && !is_p6)
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return;
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memset(saved_state, 0x00, SMM_SAVE_STATE_MAP_SIZE * sizeof(uint32_t));
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