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This commit is contained in:
Jasmine Iwanek
2022-03-11 22:04:57 -05:00
parent 41f1c2facd
commit b24008f075
23 changed files with 55 additions and 55 deletions
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6
src/chipset/ali1543.c
View File

@@ -1465,7 +1465,7 @@ ali1533_sio_write(uint16_t addr, uint8_t val, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
switch (addr) {
case 0x3f0:
case FDC_PRIMARY_ADDR:
dev->sio_index = val;
if (dev->sio_index == 0x51)
dev->in_configuration_mode = 1;
@@ -1501,7 +1501,7 @@ ali1533_sio_write(uint16_t addr, uint8_t val, void *priv)
break;
}
if ((!dev->in_configuration_mode) && (dev->sio_regs[0x07] <= 7) && (addr == 0x03f0))
if ((!dev->in_configuration_mode) && (dev->sio_regs[0x07] <= 7) && (addr == FDC_PRIMARY_ADDR))
ali1533_sio_ldn(dev->sio_regs[0x07], dev);
}
@@ -1686,7 +1686,7 @@ ali1543_init(const device_t *info)
dev->usb_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, ali5237_read, ali5237_write, dev);
/* Ports 3F0-1h: M1543 Super I/O */
io_sethandler(0x03f0, 0x0002, ali1533_sio_read, NULL, NULL, ali1533_sio_write, NULL, NULL, dev);
io_sethandler(FDC_PRIMARY_ADDR, 0x0002, ali1533_sio_read, NULL, NULL, ali1533_sio_write, NULL, NULL, dev);
/* ACPI */
dev->acpi = device_add(&acpi_ali_device);

2
src/chipset/wd76c10.c
View File

@@ -172,7 +172,7 @@ static void wd76c10_disk_chip_select(wd76c10_t *dev)
fdc_remove(dev->fdc_controller);
if (!(dev->disk_chip_select & 2))
fdc_set_base(dev->fdc_controller, !(dev->disk_chip_select & 0x0010) ? 0x3f0 : 0x370);
fdc_set_base(dev->fdc_controller, !(dev->disk_chip_select & 0x0010) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR);
}
static void wd76c10_shadow_recalc(wd76c10_t *dev)

10
src/scsi/scsi_aha154x.c
View File

@@ -197,7 +197,7 @@ aha154x_eeprom(x54x_t *dev, uint8_t cmd,uint8_t arg,uint8_t len,uint8_t off,uint
if (dev->type == AHA_154xCF) {
if (dev->fdc_address > 0) {
fdc_remove(dev->fdc);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
}
@@ -901,7 +901,7 @@ aha_initnvr(x54x_t *dev)
/* Initialize the on-board EEPROM. */
dev->nvr[0] = dev->HostID; /* SCSI ID 7 */
dev->nvr[0] |= (0x10 | 0x20 | 0x40);
if (dev->fdc_address == 0x370)
if (dev->fdc_address == FDC_SECONDARY_ADDR)
dev->nvr[0] |= EE0_ALTFLOP;
dev->nvr[1] = dev->Irq-9; /* IRQ15 */
dev->nvr[1] |= (dev->DmaChannel<<4); /* DMA6 */
@@ -939,7 +939,7 @@ aha_setnvr(x54x_t *dev)
if (dev->type == AHA_154xCF) {
if (dev->fdc_address > 0) {
fdc_remove(dev->fdc);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
}
@@ -1308,8 +1308,8 @@ static const device_config_t aha_154xcf_config[] = {
"fdc_addr", "FDC address", CONFIG_HEX16, "", 0, "", { 0 },
{
{ "None", 0 },
{ "0x3f0", 0x3f0 },
{ "0x370", 0x370 },
{ "0x3f0", FDC_PRIMARY_ADDR },
{ "0x370", FDC_SECONDARY_ADDR },
{ "" }
},
},

2
src/sio/sio_82091aa.c
View File

@@ -49,7 +49,7 @@ fdc_handler(i82091aa_t *dev)
{
fdc_remove(dev->fdc);
if (dev->regs[0x10] & 0x01)
fdc_set_base(dev->fdc, (dev->regs[0x10] & 0x02) ? 0x0370 : 0x03f0);
fdc_set_base(dev->fdc, (dev->regs[0x10] & 0x02) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}

2
src/sio/sio_acc3221.c
View File

@@ -400,7 +400,7 @@ acc3221_write(uint16_t addr, uint8_t val, void *p)
if ((old ^ val) & REG_FB_FDC_DISABLE) {
fdc_remove(dev->fdc);
if (!(dev->regs[0xfb] & REG_FB_FDC_DISABLE))
fdc_set_base(dev->fdc, 0x03f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
break;

4
src/sio/sio_detect.c
View File

@@ -92,13 +92,13 @@ sio_detect_init(const device_t *info)
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0279, 0x0001,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0370, 0x0002,
io_sethandler(FDC_SECONDARY_ADDR, 0x0002,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0398, 0x0002,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x03e3, 0x0001,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x03f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0a79, 0x0001,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);

2
src/sio/sio_f82c710.c
View File

@@ -100,7 +100,7 @@ f82c710_update_ports(upc_t *dev, int set)
ide_pri_enable();
if (dev->regs[12] & 0x20)
fdc_set_base(dev->fdc, 0x03f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}

4
src/sio/sio_fdc37c669.c
View File

@@ -260,7 +260,7 @@ fdc37c669_reset(fdc37c669_t *dev)
dev->regs[0x0d] = 0x03;
dev->regs[0x0e] = 0x02;
dev->regs[0x1e] = 0x80; /* Gameport controller. */
dev->regs[0x20] = (0x3f0 >> 2) & 0xfc;
dev->regs[0x20] = (FDC_PRIMARY_ADDR >> 2) & 0xfc;
dev->regs[0x21] = (0x1f0 >> 2) & 0xfc;
dev->regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1;
if (dev->id == 1) {
@@ -316,7 +316,7 @@ fdc37c669_init(const device_t *info)
dev->uart[0] = device_add_inst(&ns16550_device, (next_id << 1) + 1);
dev->uart[1] = device_add_inst(&ns16550_device, (next_id << 1) + 2);
io_sethandler(info->local ? 0x370 : (next_id ? 0x370 : 0x3f0), 0x0002,
io_sethandler(info->local ? FDC_SECONDARY_ADDR : (next_id ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR), 0x0002,
fdc37c669_read, NULL, NULL, fdc37c669_write, NULL, NULL, dev);
fdc37c669_reset(dev);

4
src/sio/sio_fdc37c67x.c
View File

@@ -594,9 +594,9 @@ fdc37c67x_init(const device_t *info)
fdc37c67x_reset(dev);
io_sethandler(0x370, 0x0002,
io_sethandler(FDC_SECONDARY_ADDR, 0x0002,
fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev);
io_sethandler(0x3f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev);
return dev;

8
src/sio/sio_fdc37c6xx.c
View File

@@ -128,7 +128,7 @@ fdc_handler(fdc37c6xx_t *dev)
{
fdc_remove(dev->fdc);
if (dev->regs[0] & 0x10)
fdc_set_base(dev->fdc, (dev->regs[5] & 0x01) ? 0x0370 : 0x03f0);
fdc_set_base(dev->fdc, (dev->regs[5] & 0x01) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
@@ -160,7 +160,7 @@ fdc37c6xx_write(uint16_t port, uint8_t val, void *priv)
uint8_t valxor = 0;
if (dev->tries == 2) {
if (port == 0x3f0) {
if (port == FDC_PRIMARY_ADDR) {
if (val == 0xaa)
dev->tries = 0;
else
@@ -216,7 +216,7 @@ fdc37c6xx_write(uint16_t port, uint8_t val, void *priv)
break;
}
}
} else if ((port == 0x3f0) && (val == 0x55))
} else if ((port == FDC_PRIMARY_ADDR) && (val == 0x55))
dev->tries++;
}
@@ -325,7 +325,7 @@ fdc37c6xx_init(const device_t *info)
dev->uart[1] = device_add_inst(&ns16450_device, 2);
}
io_sethandler(0x03f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
fdc37c6xx_read, NULL, NULL, fdc37c6xx_write, NULL, NULL, dev);
fdc37c6xx_reset(dev);

4
src/sio/sio_fdc37c93x.c
View File

@@ -873,9 +873,9 @@ fdc37c93x_init(const device_t *info)
io_sethandler(0x0fb, 0x0001,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
} else {
io_sethandler(0x370, 0x0002,
io_sethandler(FDC_SECONDARY_ADDR, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
io_sethandler(0x3f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
}

4
src/sio/sio_fdc37m60x.c
View File

@@ -319,7 +319,7 @@ const device_t fdc37m60x_device = {
"SMSC FDC37M60X",
"fdc37m60x",
0,
0x03f0,
FDC_PRIMARY_ADDR,
fdc37m60x_init,
fdc37m60x_close,
NULL,
@@ -333,7 +333,7 @@ const device_t fdc37m60x_370_device = {
"SMSC FDC37M60X with 10K Pull Up Resistor",
"fdc37m60x_370",
0,
0x0370,
FDC_SECONDARY_ADDR,
fdc37m60x_init,
fdc37m60x_close,
NULL,

4
src/sio/sio_it8661f.c
View File

@@ -221,7 +221,7 @@ it8661f_write(uint16_t addr, uint8_t val, void *priv)
it8661f_t *dev = (it8661f_t *)priv;
switch (addr) {
case 0x370:
case FDC_SECONDARY_ADDR:
if (!dev->unlocked) {
(val == mb_pnp_key[dev->enumerator]) ? dev->enumerator++ : (dev->enumerator = 0);
if (dev->enumerator == 31) {
@@ -326,7 +326,7 @@ it8661f_init(const device_t *info)
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
io_sethandler(0x0370, 0x0002, it8661f_read, NULL, NULL, it8661f_write, NULL, NULL, dev);
io_sethandler(FDC_SECONDARY_ADDR, 0x0002, it8661f_read, NULL, NULL, it8661f_write, NULL, NULL, dev);
dev->enumerator = 0;
dev->unlocked = 0;

4
src/sio/sio_pc87306.c
View File

@@ -242,7 +242,7 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
if (valxor & 0x28) {
fdc_remove(dev->fdc);
if ((val & 8) && !(dev->regs[2] & 1))
fdc_set_base(dev->fdc, (val & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
break;
case 1:
@@ -277,7 +277,7 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
if (dev->regs[0] & 4)
serial_handler(dev, 1);
if (dev->regs[0] & 8)
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
if (valxor & 8) {

2
src/sio/sio_pc87310.c
View File

@@ -185,7 +185,7 @@ pc87310_write(uint16_t port, uint8_t val, void *priv)
/* bit 6: 1 disable fdc */
if (!(val & 0x40)) {
pc87310_log("SIO: FDC enabled\n");
fdc_set_base(dev->fdc, 0x3f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
}
return;

4
src/sio/sio_pc87311.c
View File

@@ -119,8 +119,8 @@ pc87311_read(uint16_t addr, void *priv)
void pc87311_fdc_handler(pc87311_t *dev)
{
fdc_remove(dev->fdc_controller);
fdc_set_base(dev->fdc_controller, (FUNCTION_ENABLE & 0x20) ? 0x0370 : 0x03f0);
pc87311_log("PC87311-FDC: BASE %04x\n", (FUNCTION_ENABLE & 0x20) ? 0x0370 : 0x03f0);
fdc_set_base(dev->fdc_controller, (FUNCTION_ENABLE & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
pc87311_log("PC87311-FDC: BASE %04x\n", (FUNCTION_ENABLE & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
uint16_t com3(pc87311_t *dev)

4
src/sio/sio_pc87332.c
View File

@@ -195,7 +195,7 @@ pc87332_write(uint16_t port, uint8_t val, void *priv)
if (valxor & 0x28) {
fdc_remove(dev->fdc);
if ((val & 8) && !(dev->regs[2] & 1))
fdc_set_base(dev->fdc, (val & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
if (dev->has_ide && (valxor & 0xc0))
ide_handler(dev);
@@ -232,7 +232,7 @@ pc87332_write(uint16_t port, uint8_t val, void *priv)
if (dev->regs[0] & 4)
serial_handler(dev, 1);
if (dev->regs[0] & 8)
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
if (valxor & 8) {

2
src/sio/sio_prime3b.c
View File

@@ -142,7 +142,7 @@ prime3b_read(uint16_t addr, void *priv)
void prime3b_fdc_handler(prime3b_t *dev)
{
uint16_t fdc_base = !(ASR & 0x40) ? 0x3f0 : 0x370;
uint16_t fdc_base = !(ASR & 0x40) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR;
fdc_remove(dev->fdc_controller);
fdc_set_base(dev->fdc_controller, fdc_base);
prime3b_log("Prime3B-FDC: Enabled with base %03x\n", fdc_base);

6
src/sio/sio_um8669f.c
View File

@@ -71,9 +71,9 @@ static uint8_t um8669f_pnp_rom[] = {
static const isapnp_device_config_t um8669f_pnp_defaults[] = {
{
.activate = 1,
.io = { { .base = 0x03f0 }, },
.irq = { { .irq = 6 }, },
.dma = { { .dma = 2 }, }
.io = { { .base = FDC_PRIMARY_ADDR }, },
.irq = { { .irq = FDC_PRIMARY_IRQ }, },
.dma = { { .dma = FDC_PRIMARY_DMA }, }
}, {
.activate = 1,
.io = { { .base = COM1_ADDR }, },

4
src/sio/sio_vt82c686.c
View File

@@ -239,9 +239,9 @@ vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv)
break;
case 0x85:
io_removehandler(0x3f0, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
io_removehandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
if (val & 0x02)
io_sethandler(0x3f0, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
io_sethandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
break;
}
}

2
src/sio/sio_w83787f.c
View File

@@ -205,7 +205,7 @@ w83787f_fdc_handler(w83787f_t *dev)
{
fdc_remove(dev->fdc);
if (!(dev->regs[0] & 0x20) && !(dev->regs[6] & 0x08))
fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? 0x03f0 : 0x0370);
fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR);
}

14
src/sio/sio_w83877f.c
View File

@@ -81,9 +81,9 @@ w83877f_remap(w83877f_t *dev)
io_removehandler(0x250, 0x0002,
w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev);
io_removehandler(0x3f0, 0x0002,
io_removehandler(FDC_PRIMARY_ADDR, 0x0002,
w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev);
dev->base_address = (hefras ? 0x3f0 : 0x250);
dev->base_address = (hefras ? FDC_PRIMARY_ADDR : 0x250);
io_sethandler(dev->base_address, 0x0002,
w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev);
dev->key_times = hefras + 1;
@@ -153,7 +153,7 @@ w83877f_fdc_handler(w83877f_t *dev)
{
fdc_remove(dev->fdc);
if (!(dev->regs[6] & 0x08) && (dev->regs[0x20] & 0xc0))
fdc_set_base(dev->fdc, 0x03f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
@@ -219,7 +219,7 @@ w83877f_write(uint16_t port, uint8_t val, void *priv)
if (val <= max)
dev->cur_reg = val;
return;
} else if (port == 0x03f0) {
} else if (port == FDC_PRIMARY_ADDR) {
if ((val == dev->key) && !dev->locked) {
if (dev->key_times == 2) {
if (dev->tries) {
@@ -375,7 +375,7 @@ w83877f_read(uint16_t port, void *priv)
uint8_t ret = 0xff;
if (dev->locked) {
if ((port == 0x3f0) || (port == 0x251))
if ((port == FDC_PRIMARY_ADDR) || (port == 0x251))
ret = dev->cur_reg;
else if ((port == 0x3f1) || (port == 0x252)) {
if (dev->cur_reg == 7)
@@ -403,7 +403,7 @@ w83877f_reset(w83877f_t *dev)
dev->regs[0x0d] = 0xA3;
dev->regs[0x16] = dev->reg_init & 0xff;
dev->regs[0x1e] = 0x81;
dev->regs[0x20] = (0x3f0 >> 2) & 0xfc;
dev->regs[0x20] = (FDC_PRIMARY_ADDR >> 2) & 0xfc;
dev->regs[0x21] = (0x1f0 >> 2) & 0xfc;
dev->regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1;
dev->regs[0x23] = (LPT1_ADDR >> 2);
@@ -421,7 +421,7 @@ w83877f_reset(w83877f_t *dev)
w83877f_serial_handler(dev, 0);
w83877f_serial_handler(dev, 1);
dev->base_address = 0x3f0;
dev->base_address = FDC_PRIMARY_ADDR;
dev->key = 0x89;
dev->key_times = 1;

6
src/sio/sio_w83977f.c
View File

@@ -60,12 +60,12 @@ static uint8_t w83977f_read(uint16_t port, void *priv);
static void
w83977f_remap(w83977f_t *dev)
{
io_removehandler(0x3f0, 0x0002,
io_removehandler(FDC_PRIMARY_ADDR, 0x0002,
w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev);
io_removehandler(0x370, 0x0002,
io_removehandler(FDC_SECONDARY_ADDR, 0x0002,
w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev);
dev->base_address = (HEFRAS ? 0x370 : 0x3f0);
dev->base_address = (HEFRAS ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
io_sethandler(dev->base_address, 0x0002,
w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev);