diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c
index d07b9cf01..0eea90f7f 100644
--- a/src/chipset/intel_82335.c
+++ b/src/chipset/intel_82335.c
@@ -56,6 +56,11 @@
 #define rw_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)
 #define ro_shadow (MEM_READ_INTERNAL | MEM_WRITE_DISABLED)
 
+#define extended_granuality_enabled (dev->reg_2c & 0x01)
+#define determine_video_ram_write_acess ((dev->reg_22 & (0x08 << 8)) ? rw_shadow : ro_shadow)
+
+#define ENABLE_INTEL_82335_LOG 1
+
 typedef struct
 {
 
@@ -95,11 +100,11 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 	case 0x22:
     dev->reg_22 = val;
 
-    if (!(dev->reg_2c & 0x01))
+    if (!extended_granuality_enabled)
     {
     mem_set_mem_state_both(0xa0000, 0x20000, (dev->reg_22 & (0x04 << 8)) ? enabled_shadow : disabled_shadow);
     mem_set_mem_state_both(0xc0000, 0x20000, (dev->reg_22 & (0x02 << 8)) ? enabled_shadow : disabled_shadow);
-    mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? enabled_shadow : disabled_shadow);
+    mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? determine_video_ram_write_acess : disabled_shadow);
     }
     break;
 
@@ -126,7 +131,7 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 	case 0x2e:
 	dev->reg_2e = val;
 
-    if(dev->reg_2c & 0x01)
+    if(extended_granuality_enabled)
     {
     for(i=0; i<8; i++)
     {
@@ -175,7 +180,6 @@ intel_82335_read(uint16_t addr, void *priv)
     }
 }
 
-
 static void
 intel_82335_close(void *priv)
 {