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Timer counters now 64-bit;

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Cleaned up floppy code a lot and reverted to single poller;
Fixed segment present bit and limit checking at read/write within segment;
The ASUS boards now have memregs too;
RTC code improved based on suggestion by Sarah Walker;
Fixed SVGA odd/even emulation and added chain odd/even support;
Removed non-existent CPU's.
This commit is contained in:
OBattler
2016-07-19 02:44:32 +02:00
parent c667780aa6
commit b78b2fecaa
64 changed files with 937 additions and 1063 deletions
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4
src/fdc37c665.c
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@@ -24,7 +24,7 @@ static void write_lock(uint8_t val)
void fdc37c665_write(uint16_t port, uint8_t val, void *priv)
{
// pclog("Write SuperIO %04x %02x\n", port, val);
pclog("Write SuperIO %04x %02x\n", port, val);
if (fdc37c665_lock[0] == 0x55 && fdc37c665_lock[1] == 0x55)
{
if (port == 0x3f0)
@@ -126,7 +126,7 @@ void fdc37c665_write(uint16_t port, uint8_t val, void *priv)
uint8_t fdc37c665_read(uint16_t port, void *priv)
{
// pclog("Read SuperIO %04x %02x\n", port, fdc37c665_curreg);
pclog("Read SuperIO %04x %02x\n", port, fdc37c665_curreg);
if (fdc37c665_lock[0] == 0x55 && fdc37c665_lock[1] == 0x55)
{
if (port == 0x3f1)