Timer counters now 64-bit;
Cleaned up floppy code a lot and reverted to single poller; Fixed segment present bit and limit checking at read/write within segment; The ASUS boards now have memregs too; RTC code improved based on suggestion by Sarah Walker; Fixed SVGA odd/even emulation and added chain odd/even support; Removed non-existent CPU's.
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@@ -92,7 +92,7 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
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h = GetDlgItem(hdlg, IDC_COMBOCPUM);
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c = 0;
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while (models[romstomodel[romset]].cpu[c].cpus != NULL && c < 3)
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while (models[romstomodel[romset]].cpu[c].cpus != NULL && c < 4)
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{
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SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)models[romstomodel[romset]].cpu[c].name);
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c++;
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