Added chipset and xta interface to Philips machines.
Major refactoring.
This commit is contained in:
@@ -17,6 +17,7 @@ add_library(chipset OBJECT acc2168.c cs8230.c ali1217.c ali1429.c headland.c int
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cs4031.c intel_420ex.c intel_4x0.c intel_sio.c intel_piix.c ../ioapic.c
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neat.c opti495.c opti895.c opti5x7.c scamp.c scat.c via_vt82c49x.c
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via_vt82c505.c sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c
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gc100.c
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opti283.c opti291.c via_apollo.c via_pipc.c wd76c10.c
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vl82c480.c)
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256
src/chipset/gc100.c
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256
src/chipset/gc100.c
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@@ -0,0 +1,256 @@
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the G2 GC100/GC100A chipset.
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* NOTE: As documentation is currently available only for the
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* CG100 chipset, the GC100A chipset has been reverese-engineered.
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* Thus, its behavior may not be fully accurate.
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*
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* Authors: EngiNerd <webmaster.crrc@yahoo.it>
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*
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* Copyright 2020-2021 EngiNerd
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/nmi.h>
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#include <86box/timer.h>
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#include <86box/pit.h>
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#include <86box/mem.h>
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#include <86box/device.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/fdc_ext.h>
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#include <86box/hdc.h>
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#include <86box/gameport.h>
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#include <86box/ibm_5161.h>
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#include <86box/keyboard.h>
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#include <86box/rom.h>
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#include <86box/machine.h>
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#include <86box/chipset.h>
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#include <86box/io.h>
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#include <86box/video.h>
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typedef struct
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{
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uint8_t reg[0x10];
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} gc100_t;
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#define ENABLE_GC100_LOG 1
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#ifdef ENABLE_GC100_LOG
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int gc100_do_log = ENABLE_GC100_LOG;
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static void
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gc100_log(const char *fmt, ...)
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{
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va_list ap;
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if (gc100_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define gc100_log(fmt, ...)
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#endif
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static uint8_t
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get_fdd_switch_settings(){
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int i, fdd_count = 0;
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for (i = 0; i < FDD_NUM; i++) {
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if (fdd_get_flags(i))
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fdd_count++;
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}
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if (!fdd_count)
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return 0x00;
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else
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return ((fdd_count - 1) << 6) | 0x01;
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}
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static uint8_t
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get_videomode_switch_settings(){
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if (video_is_mda())
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return 0x30;
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else if (video_is_cga())
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return 0x20; /* 0x10 would be 40x25 */
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else
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return 0x00;
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}
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static void
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gc100_write(uint16_t port, uint8_t val, void *priv)
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{
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gc100_t *dev = (gc100_t *) priv;
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uint16_t addr = port & 0xf;
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dev->reg[addr] = val;
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switch (addr)
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{
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/* addr 0x2
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* bits 5-7: not used
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* bit 4: intenal memory wait states
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* bits 2-3: external memory wait states
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* bits 0-1: i/o access wait states
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*/
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case 0x2:
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break;
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/* addr 0x3
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* bits 1-7: not used
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* bit 0: turbo 0 xt 1
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*/
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case 0x3:
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if (val & 0x1)
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cpu_dynamic_switch(0);
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else
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cpu_dynamic_switch(cpu);
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break;
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/* addr 0x5
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* programmable dip-switches
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* bits 6-7: floppy drive number
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* bits 4-5: video mode
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* bits 2-3: memory size
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* bit 1: fpu
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* bit 0: not used
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*/
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/* addr 0x6 */
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/* addr 0x7 */
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}
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gc100_log("GC100: Write %02x at %02x\n", val, port);
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}
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static uint8_t
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gc100_read(uint16_t port, void *priv)
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{
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gc100_t *dev = (gc100_t *) priv;
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uint8_t ret = 0xff;
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uint16_t addr = port & 0xf;
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ret = dev->reg[addr];
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gc100_log("GC100: Read %02x at %02x\n", ret, port);
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switch (addr)
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{
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/* addr 0x2
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* bits 5-7: not used
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* bit 4: intenal memory wait states
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* bits 2-3: external memory wait states
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* bits 0-1: i/o access wait states
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*/
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case 0x2:
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break;
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/* addr 0x3
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* bits 1-7: not used
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* bit 0: turbo 0 xt 1
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*/
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case 0x3:
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break;
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/* addr 0x5
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* programmable dip-switches
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* bits 6-7: floppy drive number
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* bits 4-5: video mode
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* bits 2-3: memory size
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* bit 1: fpu
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* bit 0: not used
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*/
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case 0x5:
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ret = ret & 0x0c;
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ret |= get_fdd_switch_settings();
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ret |= get_videomode_switch_settings();
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if (hasfpu)
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ret |= 0x02;
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break;
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/* addr 0x6 */
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/* addr 0x7 */
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}
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return ret;
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}
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static void
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gc100_close(void *priv)
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{
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gc100_t *dev = (gc100_t *) priv;
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free(dev);
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}
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static void *
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gc100_init(const device_t *info)
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{
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gc100_t *dev = (gc100_t *) malloc(sizeof(gc100_t));
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memset(dev, 0, sizeof(gc100_t));
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dev->reg[0x2] = 0xff;
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dev->reg[0x3] = 0x0;
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dev->reg[0x5] = 0x0;
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dev->reg[0x6] = 0x0;
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dev->reg[0x7] = 0x0;
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/* GC100A */
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if(info->local) {
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io_sethandler(0x0c2, 0x02, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev);
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io_sethandler(0x0c5, 0x03, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev);
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}
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/* GC100 */
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else {
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io_sethandler(0x022, 0x02, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev);
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io_sethandler(0x025, 0x01, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev);
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}
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return dev;
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}
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const device_t gc100_device = {
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"G2 GC100",
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0,
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0,
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gc100_init, gc100_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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const device_t gc100a_device = {
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"G2 GC100A",
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0,
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1,
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gc100_init, gc100_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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