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Fixed the ATi Mach64 and S3 Virge graphics cards;

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HDD controller initializer now ignores non-IDE controllers if the specified model has IDE;
The RTL8029AS NIC and BusLogic BT-958D SCSI controller are now APIC-aware.
This commit is contained in:
OBattler
2017-06-02 02:22:38 +02:00
parent ab847fdecd
commit b805a994b9
6 changed files with 91 additions and 39 deletions
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4
src/VIDEO/vid_ati_mach64.c
View File

@@ -3352,8 +3352,6 @@ static void *mach64gx_init()
else
mach64->config_stat0 |= 1; /*VLB, 256Kx16 DRAM*/
mach64->use_block_decoded_io = PCI ? 4 : 0;
ati_eeprom_load(&mach64->eeprom, L"mach64.nvr", 1);
rom_init(&mach64->bios_rom, L"roms/mach64gx/bios.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
@@ -3371,6 +3369,8 @@ static void *mach64vt2_init()
mach64->dac_cntl = 1 << 16; /*Internal 24-bit DAC*/
mach64->config_stat0 = 4;
mach64->use_block_decoded_io = PCI ? 4 : 0;
ati_eeprom_load(&mach64->eeprom, L"mach64vt.nvr", 1);
rom_init(&mach64->bios_rom, L"roms/atimach64vt2pci.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);

4
src/VIDEO/vid_s3_virge.c
View File

@@ -3728,9 +3728,9 @@ static void s3_virge_pci_write(int func, int addr, uint8_t val, void *p)
mem_mapping_disable(&virge->bios_rom.mapping);
}
return;
/* case 0x3c:
case 0x3c:
virge->pci_regs[0x3c] = val;
return; */
return;
}
}

2
src/WIN/win_settings.c
View File

@@ -988,7 +988,7 @@ static void recalc_hdd_list(HWND hdlg, int model, int use_selected_hdd)
h = GetDlgItem(hdlg, IDC_COMBO_HDC);
if (models[model].flags & MODEL_HAS_IDE)
if (models[temp_model].flags & MODEL_HAS_IDE)
{
hdc_ignore = 1;

7
src/hdd.c
View File

@@ -1,6 +1,8 @@
#include "ibm.h"
#include "CPU/cpu.h"
#include "device.h"
#include "hdd.h"
#include "model.h"
#include "hdd_esdi.h"
#include "mfm_at.h"
@@ -64,6 +66,11 @@ void hdd_controller_init(char *internal_name)
{
int c = 0;
if (models[model].flags & MODEL_HAS_IDE)
{
return;
}
while (hdd_controllers[c].device)
{
if (!strcmp(internal_name, hdd_controllers[c].internal_name))

65
src/net_ne2000.c
View File

@@ -229,6 +229,8 @@ typedef struct {
uint8_t maclocal[6]; /* configured MAC (local) address */
uint8_t eeprom[128]; /* for RTL8029AS */
rom_t bios_rom;
int card;
} nic_t;
@@ -252,6 +254,36 @@ nelog(int lvl, const char *fmt, ...)
}
static void
nic_interrupt(void *priv, int set)
{
nic_t *dev = (nic_t *) priv;
if (!PCI || strcmp(dev->name, "RTL8029AS"))
{
if (set)
{
picint(1 << dev->base_irq);
}
else
{
picintc(1 << dev->base_irq);
}
}
else
{
if (set)
{
pci_set_irq(dev->card, PCI_INTA);
}
else
{
pci_clear_irq(dev->card, PCI_INTA);
}
}
}
/* reset - restore state to power-up, cancelling all i/o */
static void
nic_reset(void *priv)
@@ -317,8 +349,7 @@ nic_reset(void *priv)
dev->ISR.reset = 1;
dev->DCR.longaddr = 1;
picint(1<<dev->base_irq);
picintc(1<<dev->base_irq);
nic_interrupt(dev, 0);
}
@@ -474,7 +505,7 @@ asic_read(nic_t *dev, uint32_t off, unsigned int len)
if (dev->remote_bytes == 0) {
dev->ISR.rdma_done = 1;
if (dev->IMR.rdma_inte) {
picint(1 << dev->base_irq);
nic_interrupt(dev, 1);
}
}
break;
@@ -534,7 +565,7 @@ asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
if (dev->remote_bytes == 0) {
dev->ISR.rdma_done = 1;
if (dev->IMR.rdma_inte) {
picint(1 << dev->base_irq);
nic_interrupt(dev, 1);
}
}
break;
@@ -742,7 +773,7 @@ page0_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
(dev->IMR.tx_inte << 1) |
(dev->IMR.rx_inte));
if (val == 0x00) {
picintc(1 << dev->base_irq);
nic_interrupt(dev, 0);
}
break;
@@ -862,9 +893,9 @@ page0_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
(dev->ISR.pkt_tx << 1) |
(dev->ISR.pkt_rx));
if (((val & val2) & 0x7f) == 0) {
picintc(1 << dev->base_irq);
nic_interrupt(dev, 0);
} else {
picint(1 << dev->base_irq);
nic_interrupt(dev, 1);
}
break;
@@ -1227,9 +1258,9 @@ write_cr(nic_t *dev, uint32_t val)
if (dev->CR.rdma_cmd == 0x01 && dev->CR.start && dev->remote_bytes == 0) {
dev->ISR.rdma_done = 1;
if (dev->IMR.rdma_inte) {
picint(1 << dev->base_irq);
nic_interrupt(dev, 1);
if (! dev->is_pci)
picintc(1 << dev->base_irq);
nic_interrupt(dev, 0);
}
}
}
@@ -1625,18 +1656,8 @@ nic_pci_write(int func, int addr, uint8_t val, void *priv)
case 0x3C: /* PCI_ILR */
if (val != 0xFF) {
#if 1
/*
* Commented out until an APIC controller is
* emulated for the PIIX3, otherwise the
* RTL-8029/AS will not get an IRQ on boards
* using the PIIX3.
*/
nelog(1, "%s: IRQ now: %i (IGNORED)\n", dev->name, val);
#else
nelog(1, "%s: IRQ now: %i\n", dev->name, val);
dev->base_irq = val;
#endif
}
dev->pci_regs[addr] = dev->base_irq;
return;
@@ -1685,7 +1706,7 @@ nic_tx(nic_t *dev, uint32_t val)
/* Generate an interrupt if not masked */
if (dev->IMR.tx_inte)
picint(1 << dev->base_irq);
nic_interrupt(dev, 1);
dev->tx_timer_active = 0;
}
@@ -1821,7 +1842,7 @@ nic_rx(void *priv, uint8_t *buf, int io_len)
dev->ISR.pkt_rx = 1;
if (dev->IMR.rx_inte)
picint(1 << dev->base_irq);
nic_interrupt(dev, 1);
}
@@ -1972,7 +1993,7 @@ nic_init(int board)
dev->eeprom[0x7D] = (PCI_VENDID>>8);
/* Make this device known to the PCI bus. */
pci_add(nic_pci_read, nic_pci_write, dev);
dev->card = pci_add(nic_pci_read, nic_pci_write, dev);
}
/* Set up our BIA. */

46
src/scsi_buslogic.c
View File

@@ -493,6 +493,7 @@ typedef struct {
int Lock;
mem_mapping_t mmio_mapping;
int chip;
int Card;
} Buslogic_t;
#pragma pack(pop)
@@ -534,18 +535,46 @@ BuslogicLog(const char *format, ...)
#define pclog BuslogicLog
static void
BuslogicInterrupt(Buslogic_t *bl, int set)
{
if (bl->chip != CHIP_BUSLOGIC_PCI)
{
if (set)
{
picint(1 << bl->Irq);
}
else
{
picintc(1 << bl->Irq);
}
}
else
{
if (set)
{
pci_set_irq(bl->Card, PCI_INTA);
}
else
{
pci_clear_irq(bl->Card, PCI_INTA);
}
}
}
static void
BuslogicClearInterrupt(Buslogic_t *bl)
{
pclog("Buslogic: Lowering Interrupt 0x%02X\n", bl->Interrupt);
bl->Interrupt = 0;
pclog("Lowering IRQ %i\n", bl->Irq);
picintc(1 << bl->Irq);
BuslogicInterrupt(bl, 0);
if (bl->PendingInterrupt) {
bl->Interrupt = bl->PendingInterrupt;
pclog("Buslogic: Raising Interrupt 0x%02X (Pending)\n", bl->Interrupt);
if (bl->MailboxOutInterrupts || !(bl->Interrupt & INTR_MBOA)) {
if (bl->IrqEnabled) picint(1 << bl->Irq);
if (bl->IrqEnabled) BuslogicInterrupt(bl, 1);
}
bl->PendingInterrupt = 0;
}
@@ -635,7 +664,7 @@ BuslogicCommandComplete(Buslogic_t *bl)
bl->Interrupt = (INTR_ANY | INTR_HACC);
pclog("Raising IRQ %i\n", bl->Irq);
if (bl->IrqEnabled)
picint(1 << bl->Irq);
BuslogicInterrupt(bl, 1);
}
bl->Command = 0xFF;
@@ -653,7 +682,7 @@ BuslogicRaiseInterrupt(Buslogic_t *bl, uint8_t Interrupt)
bl->Interrupt = Interrupt;
pclog("Raising IRQ %i\n", bl->Irq);
if (bl->IrqEnabled)
picint(1 << bl->Irq);
BuslogicInterrupt(bl, 1);
}
}
@@ -1339,7 +1368,7 @@ BuslogicWrite(uint16_t Port, uint8_t Val, void *p)
else
bl->IrqEnabled = 1;
pclog("Lowering IRQ %i\n", bl->Irq);
picintc(1 << bl->Irq);
BuslogicInterrupt(bl, 0);
break;
case 0x81:
@@ -2186,18 +2215,13 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
}
return;
#if 0
/* Commented out until an APIC controller is emulated for the PIIX3,
* otherwise the BT-958 will not get an IRQ on boards using the PIIX3.
*/
case 0x3C:
buslogic_pci_regs[addr] = val;
if (val != 0xFF) {
buslogic_log("BusLogic IRQ now: %i\n", val);
BuslogicLog("BusLogic IRQ now: %i\n", val);
bl->Irq = val;
}
return;
#endif
}
}