Fixed SMM, overhauled the emulation of the VIA northbridges, and added the Via Apollo VP3.
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@@ -39,10 +39,13 @@
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* USA.
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*/
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#include <math.h>
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/device.h>
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@@ -132,7 +135,7 @@ const OpFn *x86_opcodes_REPE;
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const OpFn *x86_opcodes_REPNE;
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const OpFn *x86_opcodes_3DNOW;
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int in_smm = 0, smi_line = 0, smi_latched = 0;
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int in_smm = 0, smi_line = 0, smi_latched = 0, in_hlt = 0;
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uint32_t smbase = 0x30000;
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CPU *cpu_s;
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@@ -163,7 +166,7 @@ int is286,
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hascache,
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isibm486,
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israpidcad,
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is_pentium;
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is_pentium, is_k5, is_k6, is_p6;
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int hasfpu;
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@@ -237,7 +240,29 @@ int timing_misaligned;
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static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6;
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int cpu_has_feature(int feature)
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#ifdef ENABLE_CPU_LOG
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int cpu_do_log = ENABLE_CPU_LOG;
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void
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cpu_log(const char *fmt, ...)
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{
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va_list ap;
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if (cpu_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define cpu_log(fmt, ...)
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#endif
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int
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cpu_has_feature(int feature)
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{
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return cpu_features & feature;
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}
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@@ -291,7 +316,28 @@ cpu_set(void)
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is486dx = (cpu_s->cpu_type >= CPU_i486DX) && (cpu_s->cpu_type < CPU_i486DX2);
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is486dx2 = (cpu_s->cpu_type >= CPU_i486DX2) && (cpu_s->cpu_type < CPU_iDX4);
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isdx4 = (cpu_s->cpu_type >= CPU_iDX4) && (cpu_s->cpu_type < CPU_WINCHIP);
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is_pentium = (cpu_s->cpu_type >= CPU_WINCHIP);
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is_pentium = (cpu_s->cpu_type == CPU_PENTIUM) || (cpu_s->cpu_type == CPU_PENTIUMMMX);
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#if (defined(USE_NEW_DYNAREC) || (defined(DEV_BRANCH) && defined(USE_AMD_K)))
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is_k5 = (cpu_s->cpu_type == CPU_K5) || (cpu_s->cpu_type == CPU_5K86);
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#else
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is_k5 = 0;
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#endif
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#if (defined(USE_NEW_DYNAREC) || (defined(DEV_BRANCH) && defined(USE_AMD_K)))
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is_k6 = (cpu_s->cpu_type == CPU_K6);
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#else
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is_k6 = 0;
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#endif
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#ifdef USE_NEW_DYNAREC
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is_k6 = is_k6 || (cpu_s->cpu_type == CPU_K6_2) || (cpu_s->cpu_type == CPU_K6_2C) ||
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(cpu_s->cpu_type == CPU_K6_3) || (cpu_s->cpu_type == CPU_K6_2P) ||
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(cpu_s->cpu_type == CPU_K6_3P);
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#endif
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#if defined(DEV_BRANCH) && defined(USE_I686)
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is_p6 = (cpu_s->cpu_type == CPU_PENTIUMPRO) || (cpu_s->cpu_type == CPU_PENTIUM2) ||
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(cpu_s->cpu_type == CPU_PENTIUM2D);
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#else
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is_p6 = 0;
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#endif
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hasfpu = (cpu_s->cpu_type >= CPU_i486DX) || (cpu_s->cpu_type == CPU_RAPIDCAD);
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hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
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#if defined(USE_NEW_DYNAREC) || (defined(DEV_BRANCH) && defined(USE_CYRIX_6X86))
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@@ -2362,6 +2408,7 @@ void cpu_ven_reset(void)
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void cpu_RDMSR()
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{
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cpu_log("RDMSR %08X\n", ECX);
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type)
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{
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case CPU_WINCHIP:
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@@ -2833,7 +2880,7 @@ void cpu_RDMSR()
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break;
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default:
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i686_invalid_rdmsr:
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// pclog("RDMSR: Invalid MSR: %08X\n", ECX);
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cpu_log("RDMSR: Invalid MSR: %08X\n", ECX);
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x86gpf(NULL, 0);
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break;
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}
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@@ -2849,6 +2896,7 @@ void cpu_WRMSR()
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uint64_t temp;
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#endif
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cpu_log("WRMSR %08X %08X%08X\n", ECX, EDX, EAX);
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switch (machines[machine].cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type)
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{
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case CPU_WINCHIP:
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@@ -3249,7 +3297,7 @@ void cpu_WRMSR()
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break;
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default:
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i686_invalid_wrmsr:
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// pclog("WRMSR: Invalid MSR: %08X\n", ECX);
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cpu_log("WRMSR: Invalid MSR: %08X\n", ECX);
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x86gpf(NULL, 0);
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break;
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}
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