claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Fixed the SCAMP chipset emulation and the Commodore SL386SX-25 (it was using the SL386SX-16 BIOS), added the SL386-SX16 (NEAT) and the Samsung SPC-4620P, SPC-6033P, and SPC-6000A.

Browse Source
This commit is contained in:
OBattler
2020-12-28 05:34:33 +01:00
parent f8dee03b4f
commit b9b753c9aa
12 changed files with 900 additions and 680 deletions
Download Patch File Download Diff File Expand all files Collapse all files

161
src/chipset/cs8230.c
View File

@@ -32,124 +32,131 @@
typedef struct
{
int idx;
uint8_t regs[256];
int idx;
uint8_t regs[256];
} cs8230_t;
static void
shadow_control(uint32_t addr, uint32_t size, int state)
{
switch (state) {
case 0x00:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
case 0x01:
mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
break;
case 0x10:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY);
break;
case 0x11:
mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
break;
}
flushmmucache_nopc();
switch (state) {
case 0x00:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
case 0x01:
mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
break;
case 0x10:
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY);
break;
case 0x11:
mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
break;
}
flushmmucache_nopc();
}
static void
rethink_shadow_mappings(cs8230_t *cs8230)
{
int c;
int c;
for (c = 0; c < 4*8; c++) { /*Addresses 40000-bffff in 16k blocks*/
if (cs8230->regs[0xa + (c >> 3)] & (1 << (c & 7)))
mem_set_mem_state(0x40000 + c*0x4000, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /*IO channel*/
else
mem_set_mem_state(0x40000 + c*0x4000, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /*System board*/
}
for (c = 0; c < 2*8; c++) { /*Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here*/
if (cs8230->regs[0xe + (c >> 3)] & (1 << (c & 7)))
mem_set_mem_state(0xc0000 + c*0x4000, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /*IO channel*/
else
shadow_control(0xc0000 + c*0x4000, 0x4000, (cs8230->regs[9] >> (3-(c >> 2))) & 0x11);
}
for (c = 0; c < 32; c++) {
/* Addresses 40000-bffff in 16k blocks */
if (cs8230->regs[0xa + (c >> 3)] & (1 << (c & 7)))
mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /* I/O channel */
else
mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /* System board */
}
for (c = 0; c < 16; c++) {
/* Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here */
if (cs8230->regs[0xe + (c >> 3)] & (1 << (c & 7)))
mem_set_mem_state(0xc0000 + (c << 14), 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /* I/O channel */
else
shadow_control(0xc0000 + (c << 14), 0x4000, (cs8230->regs[9] >> (3 - (c >> 2))) & 0x11);
}
}
static uint8_t
cs8230_read(uint16_t port, void *p)
{
cs8230_t *cs8230 = (cs8230_t *)p;
uint8_t ret = 0xff;
cs8230_t *cs8230 = (cs8230_t *) p;
uint8_t ret = 0xff;
if (port & 1) {
switch (cs8230->idx) {
case 0x04: /*82C301 ID/version*/
ret = cs8230->regs[cs8230->idx] & ~0xe3;
break;
if (port & 1) {
switch (cs8230->idx) {
case 0x04: /* 82C301 ID/version */
ret = cs8230->regs[cs8230->idx] & ~0xe3;
break;
case 0x08: /*82C302 ID/Version*/
ret = cs8230->regs[cs8230->idx] & ~0xe0;
break;
case 0x05: case 0x06: /*82C301 registers*/
case 0x09: case 0x0a: case 0x0b: case 0x0c: /*82C302 registers*/
case 0x0d: case 0x0e: case 0x0f:
case 0x10: case 0x11: case 0x12: case 0x13:
case 0x28: case 0x29: case 0x2a:
ret = cs8230->regs[cs8230->idx];
break;
}
case 0x08: /* 82C302 ID/Version */
ret = cs8230->regs[cs8230->idx] & ~0xe0;
break;
case 0x05: case 0x06: /* 82C301 registers */
case 0x09: case 0x0a: case 0x0b: case 0x0c: /* 82C302 registers */
case 0x0d: case 0x0e: case 0x0f:
case 0x10: case 0x11: case 0x12: case 0x13:
case 0x28: case 0x29: case 0x2a:
ret = cs8230->regs[cs8230->idx];
break;
}
}
return ret;
return ret;
}
static void
cs8230_write(uint16_t port, uint8_t val, void *p)
{
cs8230_t *cs8230 = (cs8230_t *)p;
if (!(port & 1))
cs8230->idx = val;
else {
cs8230->regs[cs8230->idx] = val;
switch (cs8230->idx) {
case 0x09: /*RAM/ROM Configuration in boot area*/
case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: /*Address maps*/
rethink_shadow_mappings(cs8230);
break;
}
cs8230_t *cs8230 = (cs8230_t *)p;
if (!(port & 1))
cs8230->idx = val;
else {
cs8230->regs[cs8230->idx] = val;
switch (cs8230->idx) {
case 0x09: /* RAM/ROM Configuration in boot area */
case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: /* Address maps */
rethink_shadow_mappings(cs8230);
break;
}
}
}
static void
cs8230_close(void *priv)
{
cs8230_t *cs8230 = (cs8230_t *)priv;
free(cs8230);
cs8230_t *cs8230 = (cs8230_t *)priv;
free(cs8230);
}
static void
*cs8230_init(const device_t *info)
{
cs8230_t *cs8230 = (cs8230_t *)malloc(sizeof(cs8230_t));
memset(cs8230, 0, sizeof(cs8230_t));
cs8230_t *cs8230 = (cs8230_t *)malloc(sizeof(cs8230_t));
memset(cs8230, 0, sizeof(cs8230_t));
io_sethandler(0x0022, 0x0002,
cs8230_read, NULL, NULL,
cs8230_write, NULL, NULL,
cs8230);
io_sethandler(0x0022, 0x0002, cs8230_read, NULL, NULL, cs8230_write, NULL, NULL, cs8230);
if (mem_size > 768) {
mem_mapping_set_addr(&ram_mid_mapping, 0xa0000, mem_size > 1024 ? 0x60000 : 0x20000 + (mem_size - 768) * 1024);
mem_mapping_set_exec(&ram_mid_mapping, ram + 0xa0000);
}
if (mem_size > 768) {
mem_mapping_set_addr(&ram_mid_mapping, 0xa0000, mem_size > 1024 ? 0x60000 : 0x20000 + (mem_size - 768) * 1024);
mem_mapping_set_exec(&ram_mid_mapping, ram + 0xa0000);
}
return cs8230;
return cs8230;
}
const device_t cs8230_device = {
"C&T CS8230 (386/AT)",
0,
@@ -157,4 +164,4 @@ const device_t cs8230_device = {
cs8230_init, cs8230_close, NULL,
{ NULL }, NULL, NULL,
NULL
};
};

1146
src/chipset/scamp.c
View File

File diff suppressed because it is too large Load Diff